diff --git a/[refs] b/[refs] index f51b0a07429a..4fe71cd37c61 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: c48f2295a96d12c1c57d4655890af9984d3c061c +refs/heads/master: d8e2f53ac99f4ce7d63807a84f98d1b80df598cf diff --git a/trunk/arch/mips/Kconfig b/trunk/arch/mips/Kconfig index 09b1287a92ce..998e5db8cc0f 100644 --- a/trunk/arch/mips/Kconfig +++ b/trunk/arch/mips/Kconfig @@ -1411,12 +1411,13 @@ config PAGE_SIZE_4KB config PAGE_SIZE_8KB bool "8kB" - depends on (EXPERIMENTAL && CPU_R8000) || CPU_CAVIUM_OCTEON + depends on EXPERIMENTAL && CPU_R8000 help Using 8kB page size will result in higher performance kernel at the price of higher memory consumption. This option is available - only on R8000 and cnMIPS processors. Note that you will need a - suitable Linux distribution to support this. + only on the R8000 processor. Not that at the time of this writing + this option is still high experimental; there are also issues with + compatibility of user applications. config PAGE_SIZE_16KB bool "16kB" @@ -1427,15 +1428,6 @@ config PAGE_SIZE_16KB all non-R3000 family processors. Note that you will need a suitable Linux distribution to support this. -config PAGE_SIZE_32KB - bool "32kB" - depends on CPU_CAVIUM_OCTEON - help - Using 32kB page size will result in higher performance kernel at - the price of higher memory consumption. This option is available - only on cnMIPS cores. Note that you will need a suitable Linux - distribution to support this. - config PAGE_SIZE_64KB bool "64kB" depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX @@ -1966,6 +1958,10 @@ config SECCOMP endmenu +config RWSEM_GENERIC_SPINLOCK + bool + default y + config LOCKDEP_SUPPORT bool default y diff --git a/trunk/arch/mips/Makefile b/trunk/arch/mips/Makefile index 26947ab85260..8d544c7c9fe9 100644 --- a/trunk/arch/mips/Makefile +++ b/trunk/arch/mips/Makefile @@ -14,6 +14,8 @@ KBUILD_DEFCONFIG := ip22_defconfig +cflags-y := -ffunction-sections + # # Select the object file format to substitute into the linker script. # @@ -48,9 +50,6 @@ ifneq ($(SUBARCH),$(ARCH)) endif endif -cflags-y := -ffunction-sections -cflags-y += $(call cc-option, -mno-check-zero-division) - ifdef CONFIG_32BIT ld-emul = $(32bit-emul) vmlinux-32 = vmlinux diff --git a/trunk/arch/mips/alchemy/common/time.c b/trunk/arch/mips/alchemy/common/time.c index 33fbae79af5e..f58d4ffb8945 100644 --- a/trunk/arch/mips/alchemy/common/time.c +++ b/trunk/arch/mips/alchemy/common/time.c @@ -44,7 +44,7 @@ extern int allow_au1k_wait; /* default off for CP0 Counter */ -static cycle_t au1x_counter1_read(struct clocksource *cs) +static cycle_t au1x_counter1_read(void) { return au_readl(SYS_RTCREAD); } diff --git a/trunk/arch/mips/cavium-octeon/csrc-octeon.c b/trunk/arch/mips/cavium-octeon/csrc-octeon.c index 96110f217dcd..70fd92c31657 100644 --- a/trunk/arch/mips/cavium-octeon/csrc-octeon.c +++ b/trunk/arch/mips/cavium-octeon/csrc-octeon.c @@ -38,7 +38,7 @@ void octeon_init_cvmcount(void) local_irq_restore(flags); } -static cycle_t octeon_cvmcount_read(struct clocksource *cs) +static cycle_t octeon_cvmcount_read(void) { return read_c0_cvmcount(); } diff --git a/trunk/arch/mips/include/asm/bitops.h b/trunk/arch/mips/include/asm/bitops.h index b1e9e97a9c78..bac4a960b24c 100644 --- a/trunk/arch/mips/include/asm/bitops.h +++ b/trunk/arch/mips/include/asm/bitops.h @@ -567,7 +567,7 @@ static inline unsigned long __fls(unsigned long word) int num; if (BITS_PER_LONG == 32 && - __builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { + __builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r) { __asm__( " .set push \n" " .set mips32 \n" @@ -644,7 +644,7 @@ static inline int fls(int x) { int r; - if (__builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { + if (__builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r) { __asm__("clz %0, %1" : "=r" (x) : "r" (x)); return 32 - x; diff --git a/trunk/arch/mips/include/asm/checksum.h b/trunk/arch/mips/include/asm/checksum.h index f2f7c6c264da..290485ac5407 100644 --- a/trunk/arch/mips/include/asm/checksum.h +++ b/trunk/arch/mips/include/asm/checksum.h @@ -40,7 +40,7 @@ static inline __wsum csum_partial_copy_from_user(const void __user *src, void *dst, int len, __wsum sum, int *err_ptr) { - might_fault(); + might_sleep(); return __csum_partial_copy_user((__force void *)src, dst, len, sum, err_ptr); } @@ -53,7 +53,7 @@ static inline __wsum csum_and_copy_to_user(const void *src, void __user *dst, int len, __wsum sum, int *err_ptr) { - might_fault(); + might_sleep(); if (access_ok(VERIFY_WRITE, dst, len)) return __csum_partial_copy_user(src, (__force void *)dst, len, sum, err_ptr); diff --git a/trunk/arch/mips/include/asm/compat.h b/trunk/arch/mips/include/asm/compat.h index f58aed354bfd..6c5b40905dd6 100644 --- a/trunk/arch/mips/include/asm/compat.h +++ b/trunk/arch/mips/include/asm/compat.h @@ -3,6 +3,7 @@ /* * Architecture specific compatibility types */ +#include #include #include #include diff --git a/trunk/arch/mips/include/asm/cpu-features.h b/trunk/arch/mips/include/asm/cpu-features.h index c0047f861337..a0d14f85b781 100644 --- a/trunk/arch/mips/include/asm/cpu-features.h +++ b/trunk/arch/mips/include/asm/cpu-features.h @@ -147,15 +147,6 @@ #define cpu_has_mips_r (cpu_has_mips32r1 | cpu_has_mips32r2 | \ cpu_has_mips64r1 | cpu_has_mips64r2) -/* - * MIPS32, MIPS64, VR5500, IDT32332, IDT32334 and maybe a few other - * pre-MIPS32/MIPS53 processors have CLO, CLZ. For 64-bit kernels - * cpu_has_clo_clz also indicates the availability of DCLO and DCLZ. - */ -# ifndef cpu_has_clo_clz -# define cpu_has_clo_clz cpu_has_mips_r -# endif - #ifndef cpu_has_dsp #define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP) #endif diff --git a/trunk/arch/mips/include/asm/div64.h b/trunk/arch/mips/include/asm/div64.h index dc5ea5736440..d1d699105c11 100644 --- a/trunk/arch/mips/include/asm/div64.h +++ b/trunk/arch/mips/include/asm/div64.h @@ -6,63 +6,105 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. */ -#ifndef __ASM_DIV64_H -#define __ASM_DIV64_H +#ifndef _ASM_DIV64_H +#define _ASM_DIV64_H -#include +#include -#if BITS_PER_LONG == 64 +#if (_MIPS_SZLONG == 32) -#include +#include /* * No traps on overflows for any of these... */ -#define __div64_32(n, base) \ -({ \ - unsigned long __cf, __tmp, __tmp2, __i; \ - unsigned long __quot32, __mod32; \ - unsigned long __high, __low; \ - unsigned long long __n; \ - \ - __high = *__n >> 32; \ - __low = __n; \ - __asm__( \ - " .set push \n" \ - " .set noat \n" \ - " .set noreorder \n" \ - " move %2, $0 \n" \ - " move %3, $0 \n" \ - " b 1f \n" \ - " li %4, 0x21 \n" \ - "0: \n" \ - " sll $1, %0, 0x1 \n" \ - " srl %3, %0, 0x1f \n" \ - " or %0, $1, %5 \n" \ - " sll %1, %1, 0x1 \n" \ - " sll %2, %2, 0x1 \n" \ - "1: \n" \ - " bnez %3, 2f \n" \ - " sltu %5, %0, %z6 \n" \ - " bnez %5, 3f \n" \ - "2: \n" \ - " addiu %4, %4, -1 \n" \ - " subu %0, %0, %z6 \n" \ - " addiu %2, %2, 1 \n" \ - "3: \n" \ - " bnez %4, 0b\n\t" \ - " srl %5, %1, 0x1f\n\t" \ - " .set pop" \ - : "=&r" (__mod32), "=&r" (__tmp), \ - "=&r" (__quot32), "=&r" (__cf), \ - "=&r" (__i), "=&r" (__tmp2) \ - : "Jr" (base), "0" (__high), "1" (__low)); \ - \ - (__n) = __quot32; \ - __mod32; \ -}) +#define do_div64_32(res, high, low, base) ({ \ + unsigned long __quot32, __mod32; \ + unsigned long __cf, __tmp, __tmp2, __i; \ + \ + __asm__(".set push\n\t" \ + ".set noat\n\t" \ + ".set noreorder\n\t" \ + "move %2, $0\n\t" \ + "move %3, $0\n\t" \ + "b 1f\n\t" \ + " li %4, 0x21\n" \ + "0:\n\t" \ + "sll $1, %0, 0x1\n\t" \ + "srl %3, %0, 0x1f\n\t" \ + "or %0, $1, %5\n\t" \ + "sll %1, %1, 0x1\n\t" \ + "sll %2, %2, 0x1\n" \ + "1:\n\t" \ + "bnez %3, 2f\n\t" \ + " sltu %5, %0, %z6\n\t" \ + "bnez %5, 3f\n" \ + "2:\n\t" \ + " addiu %4, %4, -1\n\t" \ + "subu %0, %0, %z6\n\t" \ + "addiu %2, %2, 1\n" \ + "3:\n\t" \ + "bnez %4, 0b\n\t" \ + " srl %5, %1, 0x1f\n\t" \ + ".set pop" \ + : "=&r" (__mod32), "=&r" (__tmp), \ + "=&r" (__quot32), "=&r" (__cf), \ + "=&r" (__i), "=&r" (__tmp2) \ + : "Jr" (base), "0" (high), "1" (low)); \ + \ + (res) = __quot32; \ + __mod32; }) + +#define do_div(n, base) ({ \ + unsigned long long __quot; \ + unsigned long __mod; \ + unsigned long long __div; \ + unsigned long __upper, __low, __high, __base; \ + \ + __div = (n); \ + __base = (base); \ + \ + __high = __div >> 32; \ + __low = __div; \ + __upper = __high; \ + \ + if (__high) \ + __asm__("divu $0, %z2, %z3" \ + : "=h" (__upper), "=l" (__high) \ + : "Jr" (__high), "Jr" (__base) \ + : GCC_REG_ACCUM); \ + \ + __mod = do_div64_32(__low, __upper, __low, __base); \ + \ + __quot = __high; \ + __quot = __quot << 32 | __low; \ + (n) = __quot; \ + __mod; }) + +#endif /* (_MIPS_SZLONG == 32) */ + +#if (_MIPS_SZLONG == 64) + +/* + * Hey, we're already 64-bit, no + * need to play games.. + */ +#define do_div(n, base) ({ \ + unsigned long __quot; \ + unsigned int __mod; \ + unsigned long __div; \ + unsigned int __base; \ + \ + __div = (n); \ + __base = (base); \ + \ + __mod = __div % __base; \ + __quot = __div / __base; \ + \ + (n) = __quot; \ + __mod; }) -#endif /* BITS_PER_LONG == 64 */ +#endif /* (_MIPS_SZLONG == 64) */ -#endif /* __ASM_DIV64_H */ +#endif /* _ASM_DIV64_H */ diff --git a/trunk/arch/mips/include/asm/dma-mapping.h b/trunk/arch/mips/include/asm/dma-mapping.h index d16afddb09a9..c64afb40cd06 100644 --- a/trunk/arch/mips/include/asm/dma-mapping.h +++ b/trunk/arch/mips/include/asm/dma-mapping.h @@ -24,13 +24,8 @@ extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction); extern dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset, size_t size, enum dma_data_direction direction); - -static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, - size_t size, enum dma_data_direction direction) -{ - dma_unmap_single(dev, dma_address, size, direction); -} - +extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address, + size_t size, enum dma_data_direction direction); extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, enum dma_data_direction direction); extern void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, diff --git a/trunk/arch/mips/include/asm/fixmap.h b/trunk/arch/mips/include/asm/fixmap.h index 0f5caa1307f1..9cc8522a394f 100644 --- a/trunk/arch/mips/include/asm/fixmap.h +++ b/trunk/arch/mips/include/asm/fixmap.h @@ -108,9 +108,6 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr) return __virt_to_fix(vaddr); } -#define kmap_get_fixmap_pte(vaddr) \ - pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr)) - /* * Called from pgtable_init() */ diff --git a/trunk/arch/mips/include/asm/hazards.h b/trunk/arch/mips/include/asm/hazards.h index 0eaf77ffbc4f..a12d971db4f9 100644 --- a/trunk/arch/mips/include/asm/hazards.h +++ b/trunk/arch/mips/include/asm/hazards.h @@ -138,9 +138,8 @@ do { \ __instruction_hazard(); \ } while (0) -#elif defined(CONFIG_MACH_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \ - defined(CONFIG_CPU_LOONGSON2) || defined(CONFIG_CPU_R10000) || \ - defined(CONFIG_CPU_R5500) +#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \ + defined(CONFIG_CPU_R5500) || defined(CONFIG_MACH_ALCHEMY) /* * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. diff --git a/trunk/arch/mips/include/asm/highmem.h b/trunk/arch/mips/include/asm/highmem.h index 25adfb02923d..4374ab2adc75 100644 --- a/trunk/arch/mips/include/asm/highmem.h +++ b/trunk/arch/mips/include/asm/highmem.h @@ -30,6 +30,8 @@ /* declarations for highmem.c */ extern unsigned long highstart_pfn, highend_pfn; +extern pte_t *kmap_pte; +extern pgprot_t kmap_prot; extern pte_t *pkmap_page_table; /* @@ -60,10 +62,6 @@ extern struct page *__kmap_atomic_to_page(void *ptr); #define flush_cache_kmaps() flush_cache_all() -extern void kmap_init(void); - -#define kmap_prot PAGE_KERNEL - #endif /* __KERNEL__ */ #endif /* _ASM_HIGHMEM_H */ diff --git a/trunk/arch/mips/include/asm/mach-au1x00/au1000.h b/trunk/arch/mips/include/asm/mach-au1x00/au1000.h index 854e95f1b07c..62f91f50b5b5 100644 --- a/trunk/arch/mips/include/asm/mach-au1x00/au1000.h +++ b/trunk/arch/mips/include/asm/mach-au1x00/au1000.h @@ -715,7 +715,7 @@ enum soc_au1500_ints { #ifdef CONFIG_SOC_AU1100 enum soc_au1100_ints { AU1100_FIRST_INT = MIPS_CPU_IRQ_BASE + 8, - AU1100_UART0_INT = AU1100_FIRST_INT, + AU1100_UART0_INT, AU1100_UART1_INT, AU1100_SD_INT, AU1100_UART3_INT, @@ -902,8 +902,8 @@ enum soc_au1200_ints { AU1000_RTC_MATCH0_INT, AU1000_RTC_MATCH1_INT, AU1000_RTC_MATCH2_INT, - AU1200_GPIO_203, - AU1200_NAND_INT, + + AU1200_NAND_INT = AU1200_FIRST_INT + 23, AU1200_GPIO_204, AU1200_GPIO_205, AU1200_GPIO_206, diff --git a/trunk/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h b/trunk/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h index 5656c72de6d3..60638b8969ba 100644 --- a/trunk/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h +++ b/trunk/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h @@ -46,6 +46,20 @@ #define CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON 0 #endif +#ifdef CONFIG_PM +/* + * This will enable the device to be powered up when write() or read() + * is called. If this is not defined, the driver will return -EBUSY. + */ +#define WAKE_ON_ACCESS 1 + +typedef struct { + spinlock_t lock; /* Used to block on state transitions */ + au1xxx_power_dev_t *dev; /* Power Managers device structure */ + unsigned stopped; /* Used to signal device is stopped */ +} pm_state; +#endif + typedef struct { u32 tx_dev_id, rx_dev_id, target_dev_id; u32 tx_chan, rx_chan; @@ -58,6 +72,9 @@ typedef struct { #endif int irq; u32 regbase; +#ifdef CONFIG_PM + pm_state pm; +#endif } _auide_hwif; /******************************************************************************/ diff --git a/trunk/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h deleted file mode 100644 index 550a10dc9dba..000000000000 --- a/trunk/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2009 Wu Zhangjin - * Copyright (C) 2009 Philippe Vachon - * Copyright (C) 2009 Zhang Le - * - * reference: /proc/cpuinfo, - * arch/mips/kernel/cpu-probe.c(cpu_probe_legacy), - * arch/mips/kernel/proc.c(show_cpuinfo), - * loongson2f user manual. - */ - -#ifndef __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H -#define __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H - -#define cpu_dcache_line_size() 32 -#define cpu_icache_line_size() 32 -#define cpu_scache_line_size() 32 - - -#define cpu_has_32fpr 1 -#define cpu_has_3k_cache 0 -#define cpu_has_4k_cache 1 -#define cpu_has_4kex 1 -#define cpu_has_64bits 1 -#define cpu_has_cache_cdex_p 0 -#define cpu_has_cache_cdex_s 0 -#define cpu_has_counter 1 -#define cpu_has_dc_aliases 1 -#define cpu_has_divec 0 -#define cpu_has_dsp 0 -#define cpu_has_ejtag 0 -#define cpu_has_fpu 1 -#define cpu_has_ic_fills_f_dc 0 -#define cpu_has_inclusive_pcaches 1 -#define cpu_has_llsc 1 -#define cpu_has_mcheck 0 -#define cpu_has_mdmx 0 -#define cpu_has_mips16 0 -#define cpu_has_mips32r1 0 -#define cpu_has_mips32r2 0 -#define cpu_has_mips3d 0 -#define cpu_has_mips64r1 0 -#define cpu_has_mips64r2 0 -#define cpu_has_mipsmt 0 -#define cpu_has_prefetch 0 -#define cpu_has_smartmips 0 -#define cpu_has_tlb 1 -#define cpu_has_tx39_cache 0 -#define cpu_has_userlocal 0 -#define cpu_has_vce 0 -#define cpu_has_vtag_icache 0 -#define cpu_has_watch 1 -#define cpu_icache_snoops_remote_store 1 - -#endif /* __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H */ diff --git a/trunk/arch/mips/include/asm/mipsregs.h b/trunk/arch/mips/include/asm/mipsregs.h index 32ef8bec5c85..526f327475ce 100644 --- a/trunk/arch/mips/include/asm/mipsregs.h +++ b/trunk/arch/mips/include/asm/mipsregs.h @@ -184,19 +184,12 @@ #else #define PM_4K 0x00000000 -#define PM_8K 0x00002000 #define PM_16K 0x00006000 -#define PM_32K 0x0000e000 #define PM_64K 0x0001e000 -#define PM_128K 0x0003e000 #define PM_256K 0x0007e000 -#define PM_512K 0x000fe000 #define PM_1M 0x001fe000 -#define PM_2M 0x003fe000 #define PM_4M 0x007fe000 -#define PM_8M 0x00ffe000 #define PM_16M 0x01ffe000 -#define PM_32M 0x03ffe000 #define PM_64M 0x07ffe000 #define PM_256M 0x1fffe000 #define PM_1G 0x7fffe000 @@ -208,12 +201,8 @@ */ #ifdef CONFIG_PAGE_SIZE_4KB #define PM_DEFAULT_MASK PM_4K -#elif defined(CONFIG_PAGE_SIZE_8KB) -#define PM_DEFAULT_MASK PM_8K #elif defined(CONFIG_PAGE_SIZE_16KB) #define PM_DEFAULT_MASK PM_16K -#elif defined(CONFIG_PAGE_SIZE_32KB) -#define PM_DEFAULT_MASK PM_32K #elif defined(CONFIG_PAGE_SIZE_64KB) #define PM_DEFAULT_MASK PM_64K #else @@ -728,8 +717,8 @@ do { \ ".set\tmips64\n\t" \ "dmfc0\t%M0, " #source "\n\t" \ "dsll\t%L0, %M0, 32\n\t" \ - "dsra\t%M0, %M0, 32\n\t" \ - "dsra\t%L0, %L0, 32\n\t" \ + "dsrl\t%M0, %M0, 32\n\t" \ + "dsrl\t%L0, %L0, 32\n\t" \ ".set\tmips0" \ : "=r" (__val)); \ else \ @@ -737,8 +726,8 @@ do { \ ".set\tmips64\n\t" \ "dmfc0\t%M0, " #source ", " #sel "\n\t" \ "dsll\t%L0, %M0, 32\n\t" \ - "dsra\t%M0, %M0, 32\n\t" \ - "dsra\t%L0, %L0, 32\n\t" \ + "dsrl\t%M0, %M0, 32\n\t" \ + "dsrl\t%L0, %L0, 32\n\t" \ ".set\tmips0" \ : "=r" (__val)); \ local_irq_restore(__flags); \ @@ -1495,15 +1484,14 @@ static inline unsigned int \ set_c0_##name(unsigned int set) \ { \ unsigned int res; \ - unsigned int new; \ unsigned int omt; \ unsigned long flags; \ \ local_irq_save(flags); \ omt = __dmt(); \ res = read_c0_##name(); \ - new = res | set; \ - write_c0_##name(new); \ + res |= set; \ + write_c0_##name(res); \ __emt(omt); \ local_irq_restore(flags); \ \ @@ -1514,15 +1502,14 @@ static inline unsigned int \ clear_c0_##name(unsigned int clear) \ { \ unsigned int res; \ - unsigned int new; \ unsigned int omt; \ unsigned long flags; \ \ local_irq_save(flags); \ omt = __dmt(); \ res = read_c0_##name(); \ - new = res & ~clear; \ - write_c0_##name(new); \ + res &= ~clear; \ + write_c0_##name(res); \ __emt(omt); \ local_irq_restore(flags); \ \ @@ -1530,10 +1517,9 @@ clear_c0_##name(unsigned int clear) \ } \ \ static inline unsigned int \ -change_c0_##name(unsigned int change, unsigned int newbits) \ +change_c0_##name(unsigned int change, unsigned int new) \ { \ unsigned int res; \ - unsigned int new; \ unsigned int omt; \ unsigned long flags; \ \ @@ -1541,9 +1527,9 @@ change_c0_##name(unsigned int change, unsigned int newbits) \ \ omt = __dmt(); \ res = read_c0_##name(); \ - new = res & ~change; \ - new |= (newbits & change); \ - write_c0_##name(new); \ + res &= ~change; \ + res |= (new & change); \ + write_c0_##name(res); \ __emt(omt); \ local_irq_restore(flags); \ \ diff --git a/trunk/arch/mips/include/asm/page.h b/trunk/arch/mips/include/asm/page.h index 9f946e4ca057..fe7a88ea066e 100644 --- a/trunk/arch/mips/include/asm/page.h +++ b/trunk/arch/mips/include/asm/page.h @@ -23,9 +23,6 @@ #ifdef CONFIG_PAGE_SIZE_16KB #define PAGE_SHIFT 14 #endif -#ifdef CONFIG_PAGE_SIZE_32KB -#define PAGE_SHIFT 15 -#endif #ifdef CONFIG_PAGE_SIZE_64KB #define PAGE_SHIFT 16 #endif diff --git a/trunk/arch/mips/include/asm/pgtable-64.h b/trunk/arch/mips/include/asm/pgtable-64.h index 4ed9d1bba2ba..943515f0ef87 100644 --- a/trunk/arch/mips/include/asm/pgtable-64.h +++ b/trunk/arch/mips/include/asm/pgtable-64.h @@ -83,12 +83,6 @@ #define PMD_ORDER 0 #define PTE_ORDER 0 #endif -#ifdef CONFIG_PAGE_SIZE_32KB -#define PGD_ORDER 0 -#define PUD_ORDER aieeee_attempt_to_allocate_pud -#define PMD_ORDER 0 -#define PTE_ORDER 0 -#endif #ifdef CONFIG_PAGE_SIZE_64KB #define PGD_ORDER 0 #define PUD_ORDER aieeee_attempt_to_allocate_pud diff --git a/trunk/arch/mips/include/asm/sn/addrs.h b/trunk/arch/mips/include/asm/sn/addrs.h index 3a56d90abfa6..fec9bdd34913 100644 --- a/trunk/arch/mips/include/asm/sn/addrs.h +++ b/trunk/arch/mips/include/asm/sn/addrs.h @@ -359,11 +359,11 @@ TO_NODE_UNCAC((nasid), LAUNCH_OFFSET(nasid, slice)) #define LAUNCH_SIZE(nasid) KLD_LAUNCH(nasid)->size -#define SN_NMI_OFFSET(nasid, slice) \ +#define NMI_OFFSET(nasid, slice) \ (KLD_NMI(nasid)->offset + \ KLD_NMI(nasid)->stride * (slice)) #define NMI_ADDR(nasid, slice) \ - TO_NODE_UNCAC((nasid), SN_NMI_OFFSET(nasid, slice)) + TO_NODE_UNCAC((nasid), NMI_OFFSET(nasid, slice)) #define NMI_SIZE(nasid) KLD_NMI(nasid)->size #define KLCONFIG_OFFSET(nasid) KLD_KLCONFIG(nasid)->offset diff --git a/trunk/arch/mips/include/asm/sn/nmi.h b/trunk/arch/mips/include/asm/sn/nmi.h index 1af49897d4e1..6b7b0b5f3729 100644 --- a/trunk/arch/mips/include/asm/sn/nmi.h +++ b/trunk/arch/mips/include/asm/sn/nmi.h @@ -3,13 +3,13 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Derived from IRIX , Revision 1.5. - * * Copyright (C) 1992 - 1997 Silicon Graphics, Inc. */ #ifndef __ASM_SN_NMI_H #define __ASM_SN_NMI_H +#ident "$Revision: 1.5 $" + #include /* diff --git a/trunk/arch/mips/include/asm/thread_info.h b/trunk/arch/mips/include/asm/thread_info.h index 143a48136a4b..676aa2ae1913 100644 --- a/trunk/arch/mips/include/asm/thread_info.h +++ b/trunk/arch/mips/include/asm/thread_info.h @@ -75,9 +75,6 @@ register struct thread_info *__current_thread_info __asm__("$28"); #ifdef CONFIG_PAGE_SIZE_16KB #define THREAD_SIZE_ORDER (0) #endif -#ifdef CONFIG_PAGE_SIZE_32KB -#define THREAD_SIZE_ORDER (0) -#endif #ifdef CONFIG_PAGE_SIZE_64KB #define THREAD_SIZE_ORDER (0) #endif diff --git a/trunk/arch/mips/include/asm/time.h b/trunk/arch/mips/include/asm/time.h index df6a430de5eb..38a30d2ee959 100644 --- a/trunk/arch/mips/include/asm/time.h +++ b/trunk/arch/mips/include/asm/time.h @@ -57,11 +57,7 @@ extern int r4k_clockevent_init(void); static inline int mips_clockevent_init(void) { -#ifdef CONFIG_MIPS_MT_SMTC - extern int smtc_clockevent_init(void); - - return smtc_clockevent_init(); -#elif defined(CONFIG_CEVT_R4K) +#ifdef CONFIG_CEVT_R4K return r4k_clockevent_init(); #else return -ENXIO; diff --git a/trunk/arch/mips/include/asm/uaccess.h b/trunk/arch/mips/include/asm/uaccess.h index 8de858f5449f..09ff5bb17445 100644 --- a/trunk/arch/mips/include/asm/uaccess.h +++ b/trunk/arch/mips/include/asm/uaccess.h @@ -105,20 +105,10 @@ #define __access_mask get_fs().seg #define __access_ok(addr, size, mask) \ -({ \ - unsigned long __addr = (unsigned long) (addr); \ - unsigned long __size = size; \ - unsigned long __mask = mask; \ - unsigned long __ok; \ - \ - __chk_user_ptr(addr); \ - __ok = (signed long)(__mask & (__addr | (__addr + __size) | \ - __ua_size(__size))); \ - __ok == 0; \ -}) + (((signed long)((mask) & ((addr) | ((addr) + (size)) | __ua_size(size)))) == 0) #define access_ok(type, addr, size) \ - likely(__access_ok((addr), (size), __access_mask)) + likely(__access_ok((unsigned long)(addr), (size), __access_mask)) /* * put_user: - Write a simple value into user space. @@ -235,7 +225,6 @@ do { \ ({ \ int __gu_err; \ \ - __chk_user_ptr(ptr); \ __get_user_common((x), size, ptr); \ __gu_err; \ }) @@ -245,7 +234,6 @@ do { \ int __gu_err = -EFAULT; \ const __typeof__(*(ptr)) __user * __gu_ptr = (ptr); \ \ - might_fault(); \ if (likely(access_ok(VERIFY_READ, __gu_ptr, size))) \ __get_user_common((x), size, __gu_ptr); \ \ @@ -317,7 +305,6 @@ do { \ __typeof__(*(ptr)) __pu_val; \ int __pu_err = 0; \ \ - __chk_user_ptr(ptr); \ __pu_val = (x); \ switch (size) { \ case 1: __put_user_asm("sb", ptr); break; \ @@ -335,7 +322,6 @@ do { \ __typeof__(*(ptr)) __pu_val = (x); \ int __pu_err = -EFAULT; \ \ - might_fault(); \ if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) { \ switch (size) { \ case 1: __put_user_asm("sb", __pu_addr); break; \ @@ -710,10 +696,10 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n); const void *__cu_from; \ long __cu_len; \ \ + might_sleep(); \ __cu_to = (to); \ __cu_from = (from); \ __cu_len = (n); \ - might_fault(); \ __cu_len = __invoke_copy_to_user(__cu_to, __cu_from, __cu_len); \ __cu_len; \ }) @@ -766,14 +752,13 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n); const void *__cu_from; \ long __cu_len; \ \ + might_sleep(); \ __cu_to = (to); \ __cu_from = (from); \ __cu_len = (n); \ - if (access_ok(VERIFY_WRITE, __cu_to, __cu_len)) { \ - might_fault(); \ + if (access_ok(VERIFY_WRITE, __cu_to, __cu_len)) \ __cu_len = __invoke_copy_to_user(__cu_to, __cu_from, \ __cu_len); \ - } \ __cu_len; \ }) @@ -846,10 +831,10 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n); const void __user *__cu_from; \ long __cu_len; \ \ + might_sleep(); \ __cu_to = (to); \ __cu_from = (from); \ __cu_len = (n); \ - might_fault(); \ __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \ __cu_len); \ __cu_len; \ @@ -877,31 +862,17 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n); const void __user *__cu_from; \ long __cu_len; \ \ + might_sleep(); \ __cu_to = (to); \ __cu_from = (from); \ __cu_len = (n); \ - if (access_ok(VERIFY_READ, __cu_from, __cu_len)) { \ - might_fault(); \ + if (access_ok(VERIFY_READ, __cu_from, __cu_len)) \ __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \ __cu_len); \ - } \ __cu_len; \ }) -#define __copy_in_user(to, from, n) \ -({ \ - void __user *__cu_to; \ - const void __user *__cu_from; \ - long __cu_len; \ - \ - __cu_to = (to); \ - __cu_from = (from); \ - __cu_len = (n); \ - might_fault(); \ - __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \ - __cu_len); \ - __cu_len; \ -}) +#define __copy_in_user(to, from, n) __copy_from_user(to, from, n) #define copy_in_user(to, from, n) \ ({ \ @@ -909,15 +880,14 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n); const void __user *__cu_from; \ long __cu_len; \ \ + might_sleep(); \ __cu_to = (to); \ __cu_from = (from); \ __cu_len = (n); \ if (likely(access_ok(VERIFY_READ, __cu_from, __cu_len) && \ - access_ok(VERIFY_WRITE, __cu_to, __cu_len))) { \ - might_fault(); \ + access_ok(VERIFY_WRITE, __cu_to, __cu_len))) \ __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \ __cu_len); \ - } \ __cu_len; \ }) @@ -937,7 +907,7 @@ __clear_user(void __user *addr, __kernel_size_t size) { __kernel_size_t res; - might_fault(); + might_sleep(); __asm__ __volatile__( "move\t$4, %1\n\t" "move\t$5, $0\n\t" @@ -986,7 +956,7 @@ __strncpy_from_user(char *__to, const char __user *__from, long __len) { long res; - might_fault(); + might_sleep(); __asm__ __volatile__( "move\t$4, %1\n\t" "move\t$5, %2\n\t" @@ -1023,7 +993,7 @@ strncpy_from_user(char *__to, const char __user *__from, long __len) { long res; - might_fault(); + might_sleep(); __asm__ __volatile__( "move\t$4, %1\n\t" "move\t$5, %2\n\t" @@ -1042,7 +1012,7 @@ static inline long __strlen_user(const char __user *s) { long res; - might_fault(); + might_sleep(); __asm__ __volatile__( "move\t$4, %1\n\t" __MODULE_JAL(__strlen_user_nocheck_asm) @@ -1072,7 +1042,7 @@ static inline long strlen_user(const char __user *s) { long res; - might_fault(); + might_sleep(); __asm__ __volatile__( "move\t$4, %1\n\t" __MODULE_JAL(__strlen_user_asm) @@ -1089,7 +1059,7 @@ static inline long __strnlen_user(const char __user *s, long n) { long res; - might_fault(); + might_sleep(); __asm__ __volatile__( "move\t$4, %1\n\t" "move\t$5, %2\n\t" @@ -1120,7 +1090,7 @@ static inline long strnlen_user(const char __user *s, long n) { long res; - might_fault(); + might_sleep(); __asm__ __volatile__( "move\t$4, %1\n\t" "move\t$5, %2\n\t" diff --git a/trunk/arch/mips/kernel/cevt-smtc.c b/trunk/arch/mips/kernel/cevt-smtc.c index df6f5bc60572..6d45e24db5bf 100644 --- a/trunk/arch/mips/kernel/cevt-smtc.c +++ b/trunk/arch/mips/kernel/cevt-smtc.c @@ -245,7 +245,7 @@ irqreturn_t c0_compare_interrupt(int irq, void *dev_id) } -int __cpuinit smtc_clockevent_init(void) +int __cpuinit mips_clockevent_init(void) { uint64_t mips_freq = mips_hpt_frequency; unsigned int cpu = smp_processor_id(); diff --git a/trunk/arch/mips/kernel/scall64-n32.S b/trunk/arch/mips/kernel/scall64-n32.S index 93cc672f4522..c2c16ef9218f 100644 --- a/trunk/arch/mips/kernel/scall64-n32.S +++ b/trunk/arch/mips/kernel/scall64-n32.S @@ -405,8 +405,8 @@ EXPORT(sysn32_call_table) PTR sys_eventfd PTR sys_fallocate PTR sys_timerfd_create - PTR compat_sys_timerfd_gettime /* 5285 */ - PTR compat_sys_timerfd_settime + PTR sys_timerfd_gettime /* 5285 */ + PTR sys_timerfd_settime PTR sys_signalfd4 PTR sys_eventfd2 PTR sys_epoll_create1 diff --git a/trunk/arch/mips/kernel/scall64-o32.S b/trunk/arch/mips/kernel/scall64-o32.S index a5598b2339dd..002fac27021e 100644 --- a/trunk/arch/mips/kernel/scall64-o32.S +++ b/trunk/arch/mips/kernel/scall64-o32.S @@ -525,8 +525,8 @@ sys_call_table: PTR sys_eventfd PTR sys32_fallocate /* 4320 */ PTR sys_timerfd_create - PTR compat_sys_timerfd_gettime - PTR compat_sys_timerfd_settime + PTR sys_timerfd_gettime + PTR sys_timerfd_settime PTR compat_sys_signalfd4 PTR sys_eventfd2 /* 4325 */ PTR sys_epoll_create1 diff --git a/trunk/arch/mips/kernel/unaligned.c b/trunk/arch/mips/kernel/unaligned.c index 67bd626942ab..bf4c4a979abb 100644 --- a/trunk/arch/mips/kernel/unaligned.c +++ b/trunk/arch/mips/kernel/unaligned.c @@ -482,19 +482,19 @@ static void emulate_load_store_insn(struct pt_regs *regs, return; die_if_kernel("Unhandled kernel unaligned access", regs); - force_sig(SIGSEGV, current); + send_sig(SIGSEGV, current, 1); return; sigbus: die_if_kernel("Unhandled kernel unaligned access", regs); - force_sig(SIGBUS, current); + send_sig(SIGBUS, current, 1); return; sigill: die_if_kernel("Unhandled kernel unaligned access or invalid instruction", regs); - force_sig(SIGILL, current); + send_sig(SIGILL, current, 1); } asmlinkage void do_ade(struct pt_regs *regs) diff --git a/trunk/arch/mips/lib/dump_tlb.c b/trunk/arch/mips/lib/dump_tlb.c index 3f69725556af..779821cd54ab 100644 --- a/trunk/arch/mips/lib/dump_tlb.c +++ b/trunk/arch/mips/lib/dump_tlb.c @@ -19,15 +19,6 @@ static inline const char *msk2str(unsigned int mask) case PM_16K: return "16kb"; case PM_64K: return "64kb"; case PM_256K: return "256kb"; -#ifdef CONFIG_CPU_CAVIUM_OCTEON - case PM_8K: return "8kb"; - case PM_32K: return "32kb"; - case PM_128K: return "128kb"; - case PM_512K: return "512kb"; - case PM_2M: return "2Mb"; - case PM_8M: return "8Mb"; - case PM_32M: return "32Mb"; -#endif #ifndef CONFIG_CPU_VR41XX case PM_1M: return "1Mb"; case PM_4M: return "4Mb"; diff --git a/trunk/arch/mips/mm/c-r4k.c b/trunk/arch/mips/mm/c-r4k.c index 171951d2305b..58d9075e86fe 100644 --- a/trunk/arch/mips/mm/c-r4k.c +++ b/trunk/arch/mips/mm/c-r4k.c @@ -1041,7 +1041,7 @@ static void __cpuinit probe_pcache(void) printk("Primary instruction cache %ldkB, %s, %s, linesize %d bytes.\n", icache_size >> 10, - c->icache.flags & MIPS_CACHE_VTAG ? "VIVT" : "VIPT", + cpu_has_vtag_icache ? "VIVT" : "VIPT", way_string[c->icache.ways], c->icache.linesz); printk("Primary data cache %ldkB, %s, %s, %s, linesize %d bytes\n", diff --git a/trunk/arch/mips/mm/dma-default.c b/trunk/arch/mips/mm/dma-default.c index 4fdb7f5216b9..bed56f1ac837 100644 --- a/trunk/arch/mips/mm/dma-default.c +++ b/trunk/arch/mips/mm/dma-default.c @@ -209,7 +209,7 @@ dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long addr; addr = (unsigned long) page_address(page) + offset; - __dma_sync(addr, size, direction); + dma_cache_wback_inv(addr, size); } return plat_map_dma_mem_page(dev, page) + offset; @@ -217,6 +217,23 @@ dma_addr_t dma_map_page(struct device *dev, struct page *page, EXPORT_SYMBOL(dma_map_page); +void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, + enum dma_data_direction direction) +{ + BUG_ON(direction == DMA_NONE); + + if (!plat_device_is_coherent(dev) && direction != DMA_TO_DEVICE) { + unsigned long addr; + + addr = dma_addr_to_virt(dma_address); + dma_cache_wback_inv(addr, size); + } + + plat_unmap_dma_mem(dev, dma_address); +} + +EXPORT_SYMBOL(dma_unmap_page); + void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, enum dma_data_direction direction) { diff --git a/trunk/arch/mips/mm/highmem.c b/trunk/arch/mips/mm/highmem.c index 2b1309b2580a..4481656d1065 100644 --- a/trunk/arch/mips/mm/highmem.c +++ b/trunk/arch/mips/mm/highmem.c @@ -1,12 +1,7 @@ #include #include -#include #include -static pte_t *kmap_pte; - -unsigned long highstart_pfn, highend_pfn; - void *__kmap(struct page *page) { void *addr; @@ -19,7 +14,6 @@ void *__kmap(struct page *page) return addr; } -EXPORT_SYMBOL(__kmap); void __kunmap(struct page *page) { @@ -28,7 +22,6 @@ void __kunmap(struct page *page) return; kunmap_high(page); } -EXPORT_SYMBOL(__kunmap); /* * kmap_atomic/kunmap_atomic is significantly faster than kmap/kunmap because @@ -55,12 +48,11 @@ void *__kmap_atomic(struct page *page, enum km_type type) #ifdef CONFIG_DEBUG_HIGHMEM BUG_ON(!pte_none(*(kmap_pte - idx))); #endif - set_pte(kmap_pte-idx, mk_pte(page, PAGE_KERNEL)); + set_pte(kmap_pte-idx, mk_pte(page, kmap_prot)); local_flush_tlb_one((unsigned long)vaddr); return (void*) vaddr; } -EXPORT_SYMBOL(__kmap_atomic); void __kunmap_atomic(void *kvaddr, enum km_type type) { @@ -85,7 +77,6 @@ void __kunmap_atomic(void *kvaddr, enum km_type type) pagefault_enable(); } -EXPORT_SYMBOL(__kunmap_atomic); /* * This is the same as kmap_atomic() but can map memory that doesn't @@ -101,7 +92,7 @@ void *kmap_atomic_pfn(unsigned long pfn, enum km_type type) debug_kmap_atomic(type); idx = type + KM_TYPE_NR*smp_processor_id(); vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); - set_pte(kmap_pte-idx, pfn_pte(pfn, PAGE_KERNEL)); + set_pte(kmap_pte-idx, pfn_pte(pfn, kmap_prot)); flush_tlb_one(vaddr); return (void*) vaddr; @@ -120,11 +111,7 @@ struct page *__kmap_atomic_to_page(void *ptr) return pte_page(*pte); } -void __init kmap_init(void) -{ - unsigned long kmap_vstart; - - /* cache the first kmap pte */ - kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN); - kmap_pte = kmap_get_fixmap_pte(kmap_vstart); -} +EXPORT_SYMBOL(__kmap); +EXPORT_SYMBOL(__kunmap); +EXPORT_SYMBOL(__kmap_atomic); +EXPORT_SYMBOL(__kunmap_atomic); diff --git a/trunk/arch/mips/mm/init.c b/trunk/arch/mips/mm/init.c index c5511294a9ee..d9348946a19e 100644 --- a/trunk/arch/mips/mm/init.c +++ b/trunk/arch/mips/mm/init.c @@ -104,6 +104,14 @@ unsigned long setup_zero_pages(void) return 1UL << order; } +/* + * These are almost like kmap_atomic / kunmap_atmic except they take an + * additional address argument as the hint. + */ + +#define kmap_get_fixmap_pte(vaddr) \ + pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr)) + #ifdef CONFIG_MIPS_MT_SMTC static pte_t *kmap_coherent_pte; static void __init kmap_coherent_init(void) @@ -256,6 +264,24 @@ void copy_from_user_page(struct vm_area_struct *vma, } } +#ifdef CONFIG_HIGHMEM +unsigned long highstart_pfn, highend_pfn; + +pte_t *kmap_pte; +pgprot_t kmap_prot; + +static void __init kmap_init(void) +{ + unsigned long kmap_vstart; + + /* cache the first kmap pte */ + kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN); + kmap_pte = kmap_get_fixmap_pte(kmap_vstart); + + kmap_prot = PAGE_KERNEL; +} +#endif /* CONFIG_HIGHMEM */ + void __init fixrange_init(unsigned long start, unsigned long end, pgd_t *pgd_base) { diff --git a/trunk/arch/mips/mm/sc-rm7k.c b/trunk/arch/mips/mm/sc-rm7k.c index de69bfbf506e..e3abfb2d7e86 100644 --- a/trunk/arch/mips/mm/sc-rm7k.c +++ b/trunk/arch/mips/mm/sc-rm7k.c @@ -29,7 +29,7 @@ extern unsigned long icache_way_size, dcache_way_size; #include -static int rm7k_tcache_enabled; +int rm7k_tcache_enabled; /* * Writeback and invalidate the primary cache dcache before DMA. @@ -121,7 +121,7 @@ static void rm7k_sc_disable(void) clear_c0_config(RM7K_CONF_SE); } -static struct bcache_ops rm7k_sc_ops = { +struct bcache_ops rm7k_sc_ops = { .bc_enable = rm7k_sc_enable, .bc_disable = rm7k_sc_disable, .bc_wback_inv = rm7k_sc_wback_inv, diff --git a/trunk/arch/mips/pmc-sierra/Kconfig b/trunk/arch/mips/pmc-sierra/Kconfig index c139988bb85d..90261b83db04 100644 --- a/trunk/arch/mips/pmc-sierra/Kconfig +++ b/trunk/arch/mips/pmc-sierra/Kconfig @@ -36,6 +36,18 @@ config PMC_MSP7120_FPGA endchoice +menu "Options for PMC-Sierra MSP chipsets" + depends on PMC_MSP + +config PMC_MSP_EMBEDDED_ROOTFS + bool "Root filesystem embedded in kernel image" + select MTD + select MTD_BLOCK + select MTD_PMC_MSP_RAMROOT + select MTD_RAM + +endmenu + config HYPERTRANSPORT bool "Hypertransport Support for PMC-Sierra Yosemite" depends on PMC_YOSEMITE diff --git a/trunk/arch/mips/pmc-sierra/msp71xx/msp_prom.c b/trunk/arch/mips/pmc-sierra/msp71xx/msp_prom.c index c317a3623ce9..e5bd5481d8db 100644 --- a/trunk/arch/mips/pmc-sierra/msp71xx/msp_prom.c +++ b/trunk/arch/mips/pmc-sierra/msp71xx/msp_prom.c @@ -40,6 +40,12 @@ #include #include #include +#ifdef CONFIG_CRAMFS +#include +#endif +#ifdef CONFIG_SQUASHFS +#include +#endif #include #include @@ -429,6 +435,10 @@ struct prom_pmemblock *__init prom_getmdesc(void) char *str; unsigned int memsize; unsigned int heaptop; +#ifdef CONFIG_MTD_PMC_MSP_RAMROOT + void *ramroot_start; + unsigned long ramroot_size; +#endif int i; str = prom_getenv(memsz_env); @@ -496,7 +506,19 @@ struct prom_pmemblock *__init prom_getmdesc(void) i++; /* 3 */ mdesc[i].type = BOOT_MEM_RESERVED; mdesc[i].base = CPHYSADDR((u32)_text); - mdesc[i].size = CPHYSADDR(PAGE_ALIGN((u32)_end)) - mdesc[i].base; +#ifdef CONFIG_MTD_PMC_MSP_RAMROOT + if (get_ramroot(&ramroot_start, &ramroot_size)) { + /* + * Rootfs in RAM -- follows kernel + * Combine rootfs image with kernel block so a + * page (4k) isn't wasted between memory blocks + */ + mdesc[i].size = CPHYSADDR(PAGE_ALIGN( + (u32)ramroot_start + ramroot_size)) - mdesc[i].base; + } else +#endif + mdesc[i].size = CPHYSADDR(PAGE_ALIGN( + (u32)_end)) - mdesc[i].base; /* Remainder of RAM -- under memsize */ i++; /* 5 */ @@ -506,3 +528,39 @@ struct prom_pmemblock *__init prom_getmdesc(void) return &mdesc[0]; } + +/* rootfs functions */ +#ifdef CONFIG_MTD_PMC_MSP_RAMROOT +bool get_ramroot(void **start, unsigned long *size) +{ + extern char _end[]; + + /* Check for start following the end of the kernel */ + void *check_start = (void *)_end; + + /* Check for supported rootfs types */ +#ifdef CONFIG_CRAMFS + if (*(__u32 *)check_start == CRAMFS_MAGIC) { + /* Get CRAMFS size */ + *start = check_start; + *size = PAGE_ALIGN(((struct cramfs_super *) + check_start)->size); + + return true; + } +#endif +#ifdef CONFIG_SQUASHFS + if (*((unsigned int *)check_start) == SQUASHFS_MAGIC) { + /* Get SQUASHFS size */ + *start = check_start; + *size = PAGE_ALIGN(((struct squashfs_super_block *) + check_start)->bytes_used); + + return true; + } +#endif + + return false; +} +EXPORT_SYMBOL(get_ramroot); +#endif diff --git a/trunk/arch/mips/pmc-sierra/msp71xx/msp_setup.c b/trunk/arch/mips/pmc-sierra/msp71xx/msp_setup.c index a54e85b3cf29..c93675615f5d 100644 --- a/trunk/arch/mips/pmc-sierra/msp71xx/msp_setup.c +++ b/trunk/arch/mips/pmc-sierra/msp71xx/msp_setup.c @@ -21,6 +21,7 @@ #if defined(CONFIG_PMC_MSP7120_GW) #include +#include #define MSP_BOARD_RESET_GPIO 9 #endif @@ -87,8 +88,11 @@ void msp7120_reset(void) * as GPIO char driver may not be enabled and it would look up * data inRAM! */ - set_value_reg32(GPIO_CFG3_REG, 0xf000, 0x8000); - set_reg32(GPIO_DATA3_REG, 8); + set_value_reg32(GPIO_CFG3_REG, + basic_mode_mask(MSP_BOARD_RESET_GPIO), + basic_mode(MSP_GPIO_OUTPUT, MSP_BOARD_RESET_GPIO)); + set_reg32(GPIO_DATA3_REG, + basic_data_mask(MSP_BOARD_RESET_GPIO)); /* * In case GPIO9 doesn't reset the board (jumper configurable!) diff --git a/trunk/arch/mips/pmc-sierra/msp71xx/msp_time.c b/trunk/arch/mips/pmc-sierra/msp71xx/msp_time.c index cca64e15f57f..7cfeda5a651b 100644 --- a/trunk/arch/mips/pmc-sierra/msp71xx/msp_time.c +++ b/trunk/arch/mips/pmc-sierra/msp71xx/msp_time.c @@ -81,7 +81,10 @@ void __init plat_time_init(void) mips_hpt_frequency = cpu_rate/2; } -unsigned int __init get_c0_compare_int(void) +void __init plat_timer_setup(struct irqaction *irq) { - return MSP_INT_VPE0_TIMER; +#ifdef CONFIG_IRQ_MSP_CIC + /* we are using the vpe0 counter for timer interrupts */ + setup_irq(MSP_INT_VPE0_TIMER, irq); +#endif } diff --git a/trunk/arch/mips/sgi-ip32/ip32-berr.c b/trunk/arch/mips/sgi-ip32/ip32-berr.c index afc1cadbba37..a278e918a019 100644 --- a/trunk/arch/mips/sgi-ip32/ip32-berr.c +++ b/trunk/arch/mips/sgi-ip32/ip32-berr.c @@ -16,7 +16,7 @@ #include #include -static int ip32_be_handler(struct pt_regs *regs, int is_fixup) +int ip32_be_handler(struct pt_regs *regs, int is_fixup) { int data = regs->cp0_cause & 4; diff --git a/trunk/arch/mips/sgi-ip32/ip32-irq.c b/trunk/arch/mips/sgi-ip32/ip32-irq.c index 5c2bf111ca67..83a0b3c359da 100644 --- a/trunk/arch/mips/sgi-ip32/ip32-irq.c +++ b/trunk/arch/mips/sgi-ip32/ip32-irq.c @@ -112,13 +112,13 @@ static void inline flush_mace_bus(void) extern irqreturn_t crime_memerr_intr(int irq, void *dev_id); extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id); -static struct irqaction memerr_irq = { +struct irqaction memerr_irq = { .handler = crime_memerr_intr, .flags = IRQF_DISABLED, .name = "CRIME memory error", }; -static struct irqaction cpuerr_irq = { +struct irqaction cpuerr_irq = { .handler = crime_cpuerr_intr, .flags = IRQF_DISABLED, .name = "CRIME CPU error", diff --git a/trunk/arch/mips/sibyte/bcm1480/irq.c b/trunk/arch/mips/sibyte/bcm1480/irq.c index c147c4b35d3f..352352b3cb2f 100644 --- a/trunk/arch/mips/sibyte/bcm1480/irq.c +++ b/trunk/arch/mips/sibyte/bcm1480/irq.c @@ -113,6 +113,7 @@ static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) { int i = 0, old_cpu, cpu, int_on, k; u64 cur_ints; + struct irq_desc *desc = irq_desc + irq; unsigned long flags; unsigned int irq_dirty; @@ -126,7 +127,8 @@ static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) cpu = cpu_logical_map(i); /* Protect against other affinity changers and IMR manipulation */ - spin_lock_irqsave(&bcm1480_imr_lock, flags); + spin_lock_irqsave(&desc->lock, flags); + spin_lock(&bcm1480_imr_lock); /* Swizzle each CPU's IMR (but leave the IP selection alone) */ old_cpu = bcm1480_irq_owner[irq]; @@ -151,7 +153,8 @@ static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); } } - spin_unlock_irqrestore(&bcm1480_imr_lock, flags); + spin_unlock(&bcm1480_imr_lock); + spin_unlock_irqrestore(&desc->lock, flags); } #endif diff --git a/trunk/arch/mips/sibyte/sb1250/irq.c b/trunk/arch/mips/sibyte/sb1250/irq.c index 38cb998ade22..c08ff582da6f 100644 --- a/trunk/arch/mips/sibyte/sb1250/irq.c +++ b/trunk/arch/mips/sibyte/sb1250/irq.c @@ -107,6 +107,7 @@ static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) { int i = 0, old_cpu, cpu, int_on; u64 cur_ints; + struct irq_desc *desc = irq_desc + irq; unsigned long flags; i = cpumask_first(mask); @@ -120,7 +121,8 @@ static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) cpu = cpu_logical_map(i); /* Protect against other affinity changers and IMR manipulation */ - spin_lock_irqsave(&sb1250_imr_lock, flags); + spin_lock_irqsave(&desc->lock, flags); + spin_lock(&sb1250_imr_lock); /* Swizzle each CPU's IMR (but leave the IP selection alone) */ old_cpu = sb1250_irq_owner[irq]; @@ -142,7 +144,8 @@ static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK)); } - spin_unlock_irqrestore(&sb1250_imr_lock, flags); + spin_unlock(&sb1250_imr_lock); + spin_unlock_irqrestore(&desc->lock, flags); } #endif diff --git a/trunk/arch/mips/txx9/generic/setup_tx4927.c b/trunk/arch/mips/txx9/generic/setup_tx4927.c index 1093549df1a8..914e93c62639 100644 --- a/trunk/arch/mips/txx9/generic/setup_tx4927.c +++ b/trunk/arch/mips/txx9/generic/setup_tx4927.c @@ -88,7 +88,7 @@ void __init tx4927_setup(void) { int i; __u32 divmode; - unsigned int cpuclk = 0; + int cpuclk = 0; u64 ccfg; txx9_reg_res_init(TX4927_REV_PCODE(), TX4927_REG_BASE, diff --git a/trunk/arch/mips/txx9/generic/setup_tx4938.c b/trunk/arch/mips/txx9/generic/setup_tx4938.c index 3925219b8973..f0844f891f0b 100644 --- a/trunk/arch/mips/txx9/generic/setup_tx4938.c +++ b/trunk/arch/mips/txx9/generic/setup_tx4938.c @@ -93,7 +93,7 @@ void __init tx4938_setup(void) { int i; __u32 divmode; - unsigned int cpuclk = 0; + int cpuclk = 0; u64 ccfg; txx9_reg_res_init(TX4938_REV_PCODE(), TX4938_REG_BASE, diff --git a/trunk/arch/mips/txx9/generic/setup_tx4939.c b/trunk/arch/mips/txx9/generic/setup_tx4939.c index c2bf150c8838..7a25b573e9b0 100644 --- a/trunk/arch/mips/txx9/generic/setup_tx4939.c +++ b/trunk/arch/mips/txx9/generic/setup_tx4939.c @@ -114,7 +114,7 @@ void __init tx4939_setup(void) int i; __u32 divmode; __u64 pcfg; - unsigned int cpuclk = 0; + int cpuclk = 0; txx9_reg_res_init(TX4939_REV_PCODE(), TX4939_REG_BASE, TX4939_REG_SIZE); diff --git a/trunk/arch/mips/txx9/rbtx4939/setup.c b/trunk/arch/mips/txx9/rbtx4939/setup.c index 4199c6fd4d1d..011e1e332f47 100644 --- a/trunk/arch/mips/txx9/rbtx4939/setup.c +++ b/trunk/arch/mips/txx9/rbtx4939/setup.c @@ -536,7 +536,7 @@ static void __init rbtx4939_setup(void) } struct txx9_board_vec rbtx4939_vec __initdata = { - .system = "Toshiba RBTX4939", + .system = "Tothiba RBTX4939", .prom_init = rbtx4939_prom_init, .mem_setup = rbtx4939_setup, .irq_setup = rbtx4939_irq_setup, diff --git a/trunk/drivers/video/gbefb.c b/trunk/drivers/video/gbefb.c index 1a83709f9611..fe5b519860b1 100644 --- a/trunk/drivers/video/gbefb.c +++ b/trunk/drivers/video/gbefb.c @@ -75,7 +75,7 @@ struct gbefb_par { static unsigned int gbe_mem_size = CONFIG_FB_GBE_MEM * 1024*1024; static void *gbe_mem; static dma_addr_t gbe_dma_addr; -static unsigned long gbe_mem_phys; +unsigned long gbe_mem_phys; static struct { uint16_t *cpu; @@ -185,8 +185,8 @@ static struct fb_videomode default_mode_LCD __initdata = { .vmode = FB_VMODE_NONINTERLACED, }; -static struct fb_videomode *default_mode __initdata = &default_mode_CRT; -static struct fb_var_screeninfo *default_var __initdata = &default_var_CRT; +struct fb_videomode *default_mode __initdata = &default_mode_CRT; +struct fb_var_screeninfo *default_var __initdata = &default_var_CRT; static int flat_panel_enabled = 0; @@ -205,7 +205,7 @@ static void gbe_reset(void) * console. */ -static void gbe_turn_off(void) +void gbe_turn_off(void) { int i; unsigned int val, x, y, vpixen_off; @@ -1097,7 +1097,7 @@ static void gbefb_create_sysfs(struct device *dev) * Initialization */ -static int __init gbefb_setup(char *options) +int __init gbefb_setup(char *options) { char *this_opt; @@ -1283,7 +1283,7 @@ static struct platform_driver gbefb_driver = { static struct platform_device *gbefb_device; -static int __init gbefb_init(void) +int __init gbefb_init(void) { int ret = platform_driver_register(&gbefb_driver); if (!ret) { @@ -1301,7 +1301,7 @@ static int __init gbefb_init(void) return ret; } -static void __exit gbefb_exit(void) +void __exit gbefb_exit(void) { platform_device_unregister(gbefb_device); platform_driver_unregister(&gbefb_driver); diff --git a/trunk/fs/btrfs/ctree.c b/trunk/fs/btrfs/ctree.c index fedf8b9f03a2..a99f1c2a710d 100644 --- a/trunk/fs/btrfs/ctree.c +++ b/trunk/fs/btrfs/ctree.c @@ -1469,7 +1469,6 @@ read_block_for_search(struct btrfs_trans_handle *trans, u32 blocksize; struct extent_buffer *b = *eb_ret; struct extent_buffer *tmp; - int ret; blocknr = btrfs_node_blockptr(b, slot); gen = btrfs_node_ptr_generation(b, slot); @@ -1477,10 +1476,6 @@ read_block_for_search(struct btrfs_trans_handle *trans, tmp = btrfs_find_tree_block(root, blocknr, blocksize); if (tmp && btrfs_buffer_uptodate(tmp, gen)) { - /* - * we found an up to date block without sleeping, return - * right away - */ *eb_ret = tmp; return 0; } @@ -1488,9 +1483,7 @@ read_block_for_search(struct btrfs_trans_handle *trans, /* * reduce lock contention at high levels * of the btree by dropping locks before - * we read. Don't release the lock on the current - * level because we need to walk this node to figure - * out which blocks to read. + * we read. */ btrfs_unlock_up_safe(p, level + 1); btrfs_set_path_blocking(p); @@ -1501,21 +1494,10 @@ read_block_for_search(struct btrfs_trans_handle *trans, reada_for_search(root, p, level, slot, key->objectid); btrfs_release_path(NULL, p); - - ret = -EAGAIN; tmp = read_tree_block(root, blocknr, blocksize, gen); - if (tmp) { - /* - * If the read above didn't mark this buffer up to date, - * it will never end up being up to date. Set ret to EIO now - * and give up so that our caller doesn't loop forever - * on our EAGAINs. - */ - if (!btrfs_buffer_uptodate(tmp, 0)) - ret = -EIO; + if (tmp) free_extent_buffer(tmp); - } - return ret; + return -EAGAIN; } /* @@ -1714,9 +1696,6 @@ int btrfs_search_slot(struct btrfs_trans_handle *trans, struct btrfs_root if (ret == -EAGAIN) goto again; - if (ret == -EIO) - goto done; - if (!p->skip_locking) { int lret; @@ -1759,8 +1738,6 @@ int btrfs_search_slot(struct btrfs_trans_handle *trans, struct btrfs_root */ if (!p->leave_spinning) btrfs_set_path_blocking(p); - if (ret < 0) - btrfs_release_path(root, p); return ret; } @@ -4235,11 +4212,6 @@ int btrfs_next_leaf(struct btrfs_root *root, struct btrfs_path *path) if (ret == -EAGAIN) goto again; - if (ret < 0) { - btrfs_release_path(root, path); - goto done; - } - if (!path->skip_locking) { ret = btrfs_try_spin_lock(next); if (!ret) { @@ -4274,11 +4246,6 @@ int btrfs_next_leaf(struct btrfs_root *root, struct btrfs_path *path) if (ret == -EAGAIN) goto again; - if (ret < 0) { - btrfs_release_path(root, path); - goto done; - } - if (!path->skip_locking) { btrfs_assert_tree_locked(path->nodes[level]); ret = btrfs_try_spin_lock(next); diff --git a/trunk/fs/btrfs/disk-io.c b/trunk/fs/btrfs/disk-io.c index 4b0ea0b80c23..0ff16d3331da 100644 --- a/trunk/fs/btrfs/disk-io.c +++ b/trunk/fs/btrfs/disk-io.c @@ -848,6 +848,8 @@ struct extent_buffer *read_tree_block(struct btrfs_root *root, u64 bytenr, if (ret == 0) set_bit(EXTENT_BUFFER_UPTODATE, &buf->bflags); + else + WARN_ON(1); return buf; } diff --git a/trunk/fs/btrfs/extent-tree.c b/trunk/fs/btrfs/extent-tree.c index 3e2c7c738f23..e4966444811b 100644 --- a/trunk/fs/btrfs/extent-tree.c +++ b/trunk/fs/btrfs/extent-tree.c @@ -312,7 +312,7 @@ btrfs_lookup_first_block_group(struct btrfs_fs_info *info, u64 bytenr) } /* - * return the block group that contains the given bytenr + * return the block group that contains teh given bytenr */ struct btrfs_block_group_cache *btrfs_lookup_block_group( struct btrfs_fs_info *info, diff --git a/trunk/fs/btrfs/inode.c b/trunk/fs/btrfs/inode.c index 1c8b0190d031..90c23eb28829 100644 --- a/trunk/fs/btrfs/inode.c +++ b/trunk/fs/btrfs/inode.c @@ -3122,7 +3122,6 @@ static noinline void init_btrfs_i(struct inode *inode) bi->flags = 0; bi->index_cnt = (u64)-1; bi->last_unlink_trans = 0; - bi->ordered_data_close = 0; extent_map_tree_init(&BTRFS_I(inode)->extent_tree, GFP_NOFS); extent_io_tree_init(&BTRFS_I(inode)->io_tree, inode->i_mapping, GFP_NOFS); @@ -4296,6 +4295,7 @@ struct extent_map *btrfs_get_extent(struct inode *inode, struct page *page, } if (err) { free_extent_map(em); + WARN_ON(1); return ERR_PTR(err); } return em; diff --git a/trunk/fs/btrfs/ioctl.c b/trunk/fs/btrfs/ioctl.c index 2624b53ea783..5e94ea6e1cbe 100644 --- a/trunk/fs/btrfs/ioctl.c +++ b/trunk/fs/btrfs/ioctl.c @@ -437,6 +437,10 @@ static int btrfs_defrag_file(struct file *file) return 0; } +/* + * Called inside transaction, so use GFP_NOFS + */ + static int btrfs_ioctl_resize(struct btrfs_root *root, void __user *arg) { u64 new_size; diff --git a/trunk/fs/btrfs/super.c b/trunk/fs/btrfs/super.c index 2ff7cd2db25f..6dfae5b28f59 100644 --- a/trunk/fs/btrfs/super.c +++ b/trunk/fs/btrfs/super.c @@ -436,9 +436,9 @@ static int btrfs_show_options(struct seq_file *seq, struct vfsmount *vfs) if (btrfs_test_opt(root, SSD)) seq_puts(seq, ",ssd"); if (btrfs_test_opt(root, NOTREELOG)) - seq_puts(seq, ",notreelog"); + seq_puts(seq, ",no-treelog"); if (btrfs_test_opt(root, FLUSHONCOMMIT)) - seq_puts(seq, ",flushoncommit"); + seq_puts(seq, ",flush-on-commit"); if (!(root->fs_info->sb->s_flags & MS_POSIXACL)) seq_puts(seq, ",noacl"); return 0; diff --git a/trunk/fs/cifs/cifssmb.c b/trunk/fs/cifs/cifssmb.c index 75e6623a8635..5759ba53dc96 100644 --- a/trunk/fs/cifs/cifssmb.c +++ b/trunk/fs/cifs/cifssmb.c @@ -3976,9 +3976,8 @@ parse_DFS_referrals(TRANSACTION2_GET_DFS_REFER_RSP *pSMBr, max_len = data_end - temp; node->path_name = cifs_strndup_from_ucs(temp, max_len, is_unicode, nls_codepage); - if (IS_ERR(node->path_name)) { - rc = PTR_ERR(node->path_name); - node->path_name = NULL; + if (!node->path_name) { + rc = -ENOMEM; goto parse_DFS_referrals_exit; } @@ -3987,11 +3986,8 @@ parse_DFS_referrals(TRANSACTION2_GET_DFS_REFER_RSP *pSMBr, max_len = data_end - temp; node->node_name = cifs_strndup_from_ucs(temp, max_len, is_unicode, nls_codepage); - if (IS_ERR(node->node_name)) { - rc = PTR_ERR(node->node_name); - node->node_name = NULL; - goto parse_DFS_referrals_exit; - } + if (!node->node_name) + rc = -ENOMEM; } parse_DFS_referrals_exit: