From 5b5e4877d731213bbe40fcea820651aa1fecd5bd Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 10 Jan 2011 00:29:03 +0100 Subject: [PATCH] --- yaml --- r: 231384 b: refs/heads/master c: b6aec3a5d6d8e898baef3ed0d1b2911ee5e718a3 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-pxa/clock-pxa3xx.c | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 105fe157267d..98276e62eaa4 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: bc3e55c69c404158ef3c5b1a6515f5e9f1294403 +refs/heads/master: b6aec3a5d6d8e898baef3ed0d1b2911ee5e718a3 diff --git a/trunk/arch/arm/mach-pxa/clock-pxa3xx.c b/trunk/arch/arm/mach-pxa/clock-pxa3xx.c index 1b08a34ab234..3f864cd0bd28 100644 --- a/trunk/arch/arm/mach-pxa/clock-pxa3xx.c +++ b/trunk/arch/arm/mach-pxa/clock-pxa3xx.c @@ -115,7 +115,6 @@ static unsigned long clk_pxa3xx_smemc_getrate(struct clk *clk) { unsigned long acsr = ACSR; unsigned long memclkcfg = __raw_readl(MEMCLKCFG); - unsigned int smcfs = (acsr >> 23) & 0x7; return BASE_CLK * smcfs_mult[(acsr >> 23) & 0x7] / df_clkdiv[(memclkcfg >> 16) & 0x3];