From 5d494e9700ab7908dc3c42732f44d4da974047ae Mon Sep 17 00:00:00 2001
From: Andrew Chew <achew@nvidia.com>
Date: Tue, 12 Mar 2013 16:40:50 -0700
Subject: [PATCH] --- yaml --- r: 373987 b: refs/heads/master c:
 6c716db57fc74dac501ef722d4c98af60b33732e h: refs/heads/master i:   373985:
 0e774dc77a371f8acf96bf5931e6c28acdd2068d   373983:
 8f4b5b6ae2eba4e161d758ea9e1764ef14ee9d0d v: v3

---
 [refs]                                | 2 +-
 trunk/arch/arm/boot/dts/tegra114.dtsi | 8 ++++++++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index d494f9c5ab91..f0af6fea730a 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: b69cd984efba767788d18206a84ce37b7584fea8
+refs/heads/master: 6c716db57fc74dac501ef722d4c98af60b33732e
diff --git a/trunk/arch/arm/boot/dts/tegra114.dtsi b/trunk/arch/arm/boot/dts/tegra114.dtsi
index 400a2752a7e1..9f3d5e4e31f7 100644
--- a/trunk/arch/arm/boot/dts/tegra114.dtsi
+++ b/trunk/arch/arm/boot/dts/tegra114.dtsi
@@ -97,6 +97,14 @@
 		clocks = <&tegra_car 65>;
 	};
 
+	pwm: pwm {
+		compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm";
+		reg = <0x7000a000 0x100>;
+		#pwm-cells = <2>;
+		clocks = <&tegra_car 17>;
+		status = "disabled";
+	};
+
 	rtc {
 		compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc";
 		reg = <0x7000e000 0x100>;