From 5de434355b1ccc8736ab2a81b7f54404ed0efc67 Mon Sep 17 00:00:00 2001
From: Michal Simek <monstr@monstr.eu>
Date: Tue, 21 Apr 2009 14:07:00 +0200
Subject: [PATCH] --- yaml --- r: 144147 b: refs/heads/master c:
 6dfb79aa114ac69032f3931235ffc90799e9630b h: refs/heads/master i:   144145:
 0676b10394660fe189e2ccaa2246a71edc3fdf66   144143:
 91f5364e5e51e86d700e622f19066199172a1c40 v: v3

---
 [refs]                                   | 2 +-
 trunk/arch/microblaze/kernel/cpu/cache.c | 3 ---
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/[refs] b/[refs]
index 1a0bc0306da7..b9ebf784138c 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: fbeda67782689bf80109512b16ac47264a282d01
+refs/heads/master: 6dfb79aa114ac69032f3931235ffc90799e9630b
diff --git a/trunk/arch/microblaze/kernel/cpu/cache.c b/trunk/arch/microblaze/kernel/cpu/cache.c
index be9fecca4f91..af866a450125 100644
--- a/trunk/arch/microblaze/kernel/cpu/cache.c
+++ b/trunk/arch/microblaze/kernel/cpu/cache.c
@@ -100,7 +100,6 @@ void _enable_dcache(void)
 
 void _disable_dcache(void)
 {
-	if (cpuinfo.use_dcache) {
 #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
 		__asm__ __volatile__ ("					\
 				msrclr	r0, %0;				\
@@ -119,12 +118,10 @@ void _disable_dcache(void)
 				: "i" (MSR_DCE)			\
 				: "memory", "r12");
 #endif
-	}
 }
 
 void _invalidate_dcache(unsigned int addr)
 {
-	if (cpuinfo.use_dcache)
 		__asm__ __volatile__ ("					\
 				wdc	%0, r0"				\
 				:					\