From 5e7c9653408a90d1e26ac94b14a8dafda8674938 Mon Sep 17 00:00:00 2001 From: Myron Stowe Date: Fri, 1 Jun 2012 15:16:25 -0600 Subject: [PATCH] --- yaml --- r: 316468 b: refs/heads/master c: c32823f82b42abc1f08b365085862fd1d57c0b61 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/alpha/kernel/pci.c | 2 +- trunk/arch/arm/kernel/bios32.c | 2 +- trunk/arch/ia64/pci/pci.c | 4 +- trunk/arch/microblaze/pci/pci-common.c | 4 +- trunk/arch/mips/pci/pci.c | 2 +- trunk/arch/powerpc/include/asm/pci-bridge.h | 1 - trunk/arch/powerpc/kernel/pci-common.c | 17 +- trunk/arch/powerpc/kernel/pci_64.c | 2 +- trunk/arch/powerpc/kernel/pci_of_scan.c | 2 +- .../arch/powerpc/platforms/powernv/pci-ioda.c | 8 +- .../powerpc/platforms/pseries/pci_dlpar.c | 2 +- trunk/arch/sh/drivers/pci/pci.c | 2 +- trunk/arch/sparc/kernel/pci.c | 8 +- trunk/arch/sparc/kernel/pci_impl.h | 1 - trunk/arch/tile/kernel/pci.c | 9 +- trunk/arch/x86/pci/acpi.c | 9 +- trunk/arch/x86/pci/amd_bus.c | 7 +- trunk/arch/x86/pci/bus_numa.c | 22 +- trunk/arch/x86/pci/bus_numa.h | 3 +- trunk/arch/xtensa/kernel/pci.c | 2 +- trunk/drivers/iommu/intel-iommu.c | 2 +- trunk/drivers/net/ethernet/broadcom/tg3.c | 4 +- trunk/drivers/parisc/dino.c | 16 +- trunk/drivers/parisc/iosapic.c | 2 +- trunk/drivers/parisc/lba_pci.c | 26 +-- trunk/drivers/pci/access.c | 6 +- trunk/drivers/pci/hotplug-pci.c | 30 +-- trunk/drivers/pci/hotplug/acpiphp_glue.c | 51 ++--- trunk/drivers/pci/hotplug/cpci_hotplug_pci.c | 35 +++- trunk/drivers/pci/hotplug/cpqphp_pci.c | 8 +- trunk/drivers/pci/hotplug/ibmphp_core.c | 8 +- trunk/drivers/pci/hotplug/pciehp_pci.c | 28 ++- trunk/drivers/pci/hotplug/sgi_hotplug.c | 12 +- trunk/drivers/pci/hotplug/shpchp_pci.c | 45 +++-- trunk/drivers/pci/hotplug/shpchp_sysfs.c | 6 +- trunk/drivers/pci/iov.c | 4 +- trunk/drivers/pci/pci.c | 141 +++++++------ trunk/drivers/pci/pci.h | 9 +- trunk/drivers/pci/pcie/aer/aerdrv_acpi.c | 2 +- trunk/drivers/pci/probe.c | 191 +++--------------- trunk/drivers/pci/quirks.c | 84 -------- trunk/drivers/pci/remove.c | 1 - trunk/drivers/pci/search.c | 2 - trunk/drivers/pci/setup-bus.c | 24 +-- trunk/drivers/pcmcia/cardbus.c | 2 +- trunk/drivers/pcmcia/yenta_socket.c | 26 +-- trunk/drivers/xen/xen-pciback/conf_space.c | 6 +- trunk/include/linux/pci.h | 63 +----- trunk/include/linux/pci_regs.h | 113 ++--------- trunk/kernel/resource.c | 13 +- 51 files changed, 352 insertions(+), 719 deletions(-) diff --git a/[refs] b/[refs] index fa47f9067c33..756439092707 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: cc2fa3fa320d5f40a12713c104bbe5d3da4636e4 +refs/heads/master: c32823f82b42abc1f08b365085862fd1d57c0b61 diff --git a/trunk/arch/alpha/kernel/pci.c b/trunk/arch/alpha/kernel/pci.c index 53229a496311..1a629636cc16 100644 --- a/trunk/arch/alpha/kernel/pci.c +++ b/trunk/arch/alpha/kernel/pci.c @@ -359,7 +359,7 @@ common_init_pci(void) hose, &resources); hose->bus = bus; hose->need_domain_info = need_domain_info; - next_busno = bus->busn_res.end + 1; + next_busno = bus->subordinate + 1; /* Don't allow 8-bit bus number overflow inside the hose - reserve some space for bridges. */ if (next_busno > 224) { diff --git a/trunk/arch/arm/kernel/bios32.c b/trunk/arch/arm/kernel/bios32.c index f07710849b58..25552508c3fd 100644 --- a/trunk/arch/arm/kernel/bios32.c +++ b/trunk/arch/arm/kernel/bios32.c @@ -461,7 +461,7 @@ static void __init pcibios_init_hw(struct hw_pci *hw, struct list_head *head) if (!sys->bus) panic("PCI: unable to scan bus!"); - busnr = sys->bus->busn_res.end + 1; + busnr = sys->bus->subordinate + 1; list_add(&sys->node, head); } else { diff --git a/trunk/arch/ia64/pci/pci.c b/trunk/arch/ia64/pci/pci.c index d173a88d744a..524df4295c90 100644 --- a/trunk/arch/ia64/pci/pci.c +++ b/trunk/arch/ia64/pci/pci.c @@ -351,8 +351,6 @@ pci_acpi_scan_root(struct acpi_pci_root *root) #endif INIT_LIST_HEAD(&info.resources); - /* insert busn resource at first */ - pci_add_resource(&info.resources, &root->secondary); acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_window, &windows); if (windows) { @@ -386,7 +384,7 @@ pci_acpi_scan_root(struct acpi_pci_root *root) return NULL; } - pci_scan_child_bus(pbus); + pbus->subordinate = pci_scan_child_bus(pbus); return pbus; out3: diff --git a/trunk/arch/microblaze/pci/pci-common.c b/trunk/arch/microblaze/pci/pci-common.c index 9b32483cd0c0..ed22bfc5db14 100644 --- a/trunk/arch/microblaze/pci/pci-common.c +++ b/trunk/arch/microblaze/pci/pci-common.c @@ -1506,10 +1506,10 @@ static void __devinit pcibios_scan_phb(struct pci_controller *hose) pci_free_resource_list(&resources); return; } - bus->busn_res.start = hose->first_busno; + bus->secondary = hose->first_busno; hose->bus = bus; - hose->last_busno = bus->busn_res.end; + hose->last_busno = bus->subordinate; } static int __init pcibios_init(void) diff --git a/trunk/arch/mips/pci/pci.c b/trunk/arch/mips/pci/pci.c index 0a9bf778edb5..271e8c4a54c7 100644 --- a/trunk/arch/mips/pci/pci.c +++ b/trunk/arch/mips/pci/pci.c @@ -102,7 +102,7 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose) need_domain_info = need_domain_info || hose->index; hose->need_domain_info = need_domain_info; if (bus) { - next_busno = bus->busn_res.end + 1; + next_busno = bus->subordinate + 1; /* Don't allow 8-bit bus number overflow inside the hose - reserve some space for bridges. */ if (next_busno > 224) { diff --git a/trunk/arch/powerpc/include/asm/pci-bridge.h b/trunk/arch/powerpc/include/asm/pci-bridge.h index 8cccbee61519..ac39e6a3b25a 100644 --- a/trunk/arch/powerpc/include/asm/pci-bridge.h +++ b/trunk/arch/powerpc/include/asm/pci-bridge.h @@ -30,7 +30,6 @@ struct pci_controller { int first_busno; int last_busno; int self_busno; - struct resource busn; void __iomem *io_base_virt; #ifdef CONFIG_PPC64 diff --git a/trunk/arch/powerpc/kernel/pci-common.c b/trunk/arch/powerpc/kernel/pci-common.c index 7320f3685523..8e78e93c8185 100644 --- a/trunk/arch/powerpc/kernel/pci-common.c +++ b/trunk/arch/powerpc/kernel/pci-common.c @@ -1637,11 +1637,6 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose) /* Wire up PHB bus resources */ pcibios_setup_phb_resources(hose, &resources); - hose->busn.start = hose->first_busno; - hose->busn.end = hose->last_busno; - hose->busn.flags = IORESOURCE_BUS; - pci_add_resource(&resources, &hose->busn); - /* Create an empty bus for the toplevel */ bus = pci_create_root_bus(hose->parent, hose->first_busno, hose->ops, hose, &resources); @@ -1651,6 +1646,7 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose) pci_free_resource_list(&resources); return; } + bus->secondary = hose->first_busno; hose->bus = bus; /* Get probe mode and perform scan */ @@ -1658,15 +1654,14 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose) if (node && ppc_md.pci_probe_mode) mode = ppc_md.pci_probe_mode(bus); pr_debug(" probe mode: %d\n", mode); - if (mode == PCI_PROBE_DEVTREE) + if (mode == PCI_PROBE_DEVTREE) { + bus->subordinate = hose->last_busno; of_scan_bus(node, bus); - - if (mode == PCI_PROBE_NORMAL) { - pci_bus_update_busn_res_end(bus, 255); - hose->last_busno = pci_scan_child_bus(bus); - pci_bus_update_busn_res_end(bus, hose->last_busno); } + if (mode == PCI_PROBE_NORMAL) + hose->last_busno = bus->subordinate = pci_scan_child_bus(bus); + /* Platform gets a chance to do some global fixups before * we proceed to resource allocation */ diff --git a/trunk/arch/powerpc/kernel/pci_64.c b/trunk/arch/powerpc/kernel/pci_64.c index 4ff190ff24a0..94a54f61d341 100644 --- a/trunk/arch/powerpc/kernel/pci_64.c +++ b/trunk/arch/powerpc/kernel/pci_64.c @@ -236,7 +236,7 @@ long sys_pciconfig_iobase(long which, unsigned long in_bus, for (ln = pci_root_buses.next; ln != &pci_root_buses; ln = ln->next) { bus = pci_bus_b(ln); - if (in_bus >= bus->number && in_bus <= bus->busn_res.end) + if (in_bus >= bus->number && in_bus <= bus->subordinate) break; bus = NULL; } diff --git a/trunk/arch/powerpc/kernel/pci_of_scan.c b/trunk/arch/powerpc/kernel/pci_of_scan.c index ae5ea5e04d65..89dde171a6fa 100644 --- a/trunk/arch/powerpc/kernel/pci_of_scan.c +++ b/trunk/arch/powerpc/kernel/pci_of_scan.c @@ -240,7 +240,7 @@ void __devinit of_scan_pci_bridge(struct pci_dev *dev) } bus->primary = dev->bus->number; - pci_bus_insert_busn_res(bus, busrange[0], busrange[1]); + bus->subordinate = busrange[1]; bus->bridge_ctl = 0; /* parse ranges property */ diff --git a/trunk/arch/powerpc/platforms/powernv/pci-ioda.c b/trunk/arch/powerpc/platforms/powernv/pci-ioda.c index 9cda6a1ad0cf..fbdd74dac3ac 100644 --- a/trunk/arch/powerpc/platforms/powernv/pci-ioda.c +++ b/trunk/arch/powerpc/platforms/powernv/pci-ioda.c @@ -589,7 +589,7 @@ static int __devinit pnv_ioda_configure_pe(struct pnv_phb *phb, dcomp = OPAL_IGNORE_RID_DEVICE_NUMBER; fcomp = OPAL_IGNORE_RID_FUNCTION_NUMBER; parent = pe->pbus->self; - count = pe->pbus->busn_res.end - pe->pbus->busn_res.start + 1; + count = pe->pbus->subordinate - pe->pbus->secondary + 1; switch(count) { case 1: bcomp = OpalPciBusAll; break; case 2: bcomp = OpalPciBus7Bits; break; @@ -816,11 +816,11 @@ static void __devinit pnv_ioda_setup_bus_PE(struct pci_dev *dev, pe->pdev = NULL; pe->tce32_seg = -1; pe->mve_number = -1; - pe->rid = bus->busn_res.start << 8; + pe->rid = bus->secondary << 8; pe->dma_weight = 0; - pe_info(pe, "Secondary busses %pR associated with PE\n", - &bus->busn_res); + pe_info(pe, "Secondary busses %d..%d associated with PE\n", + bus->secondary, bus->subordinate); if (pnv_ioda_configure_pe(phb, pe)) { /* XXX What do we do here ? */ diff --git a/trunk/arch/powerpc/platforms/pseries/pci_dlpar.c b/trunk/arch/powerpc/platforms/pseries/pci_dlpar.c index 3ccebc83dc02..8b7bafa489c2 100644 --- a/trunk/arch/powerpc/platforms/pseries/pci_dlpar.c +++ b/trunk/arch/powerpc/platforms/pseries/pci_dlpar.c @@ -121,7 +121,7 @@ void pcibios_add_pci_devices(struct pci_bus * bus) if (!num) return; pcibios_setup_bus_devices(bus); - max = bus->busn_res.start; + max = bus->secondary; for (pass=0; pass < 2; pass++) list_for_each_entry(dev, &bus->devices, bus_list) { if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || diff --git a/trunk/arch/sh/drivers/pci/pci.c b/trunk/arch/sh/drivers/pci/pci.c index 43068dcb451c..9d10a3cb8797 100644 --- a/trunk/arch/sh/drivers/pci/pci.c +++ b/trunk/arch/sh/drivers/pci/pci.c @@ -59,7 +59,7 @@ static void __devinit pcibios_scanbus(struct pci_channel *hose) need_domain_info = need_domain_info || hose->index; hose->need_domain_info = need_domain_info; if (bus) { - next_busno = bus->busn_res.end + 1; + next_busno = bus->subordinate + 1; /* Don't allow 8-bit bus number overflow inside the hose - reserve some space for bridges. */ if (next_busno > 224) { diff --git a/trunk/arch/sparc/kernel/pci.c b/trunk/arch/sparc/kernel/pci.c index 4f92a9aba358..fdaf21811670 100644 --- a/trunk/arch/sparc/kernel/pci.c +++ b/trunk/arch/sparc/kernel/pci.c @@ -535,7 +535,7 @@ static void __devinit of_scan_pci_bridge(struct pci_pbm_info *pbm, } bus->primary = dev->bus->number; - pci_bus_insert_busn_res(bus, busrange[0], busrange[1]); + bus->subordinate = busrange[1]; bus->bridge_ctl = 0; /* parse ranges property, or cook one up by hand for Simba */ @@ -685,10 +685,6 @@ struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm, pbm->io_space.start); pci_add_resource_offset(&resources, &pbm->mem_space, pbm->mem_space.start); - pbm->busn.start = pbm->pci_first_busno; - pbm->busn.end = pbm->pci_last_busno; - pbm->busn.flags = IORESOURCE_BUS; - pci_add_resource(&resources, &pbm->busn); bus = pci_create_root_bus(parent, pbm->pci_first_busno, pbm->pci_ops, pbm, &resources); if (!bus) { @@ -697,6 +693,8 @@ struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm, pci_free_resource_list(&resources); return NULL; } + bus->secondary = pbm->pci_first_busno; + bus->subordinate = pbm->pci_last_busno; pci_of_scan_bus(pbm, node, bus); pci_bus_add_devices(bus); diff --git a/trunk/arch/sparc/kernel/pci_impl.h b/trunk/arch/sparc/kernel/pci_impl.h index 918a2031c8bb..6beb60df31d0 100644 --- a/trunk/arch/sparc/kernel/pci_impl.h +++ b/trunk/arch/sparc/kernel/pci_impl.h @@ -97,7 +97,6 @@ struct pci_pbm_info { /* PBM I/O and Memory space resources. */ struct resource io_space; struct resource mem_space; - struct resource busn; /* Base of PCI Config space, can be per-PBM or shared. */ unsigned long config_space; diff --git a/trunk/arch/tile/kernel/pci.c b/trunk/arch/tile/kernel/pci.c index 87422ed7b834..b56d12bf5900 100644 --- a/trunk/arch/tile/kernel/pci.c +++ b/trunk/arch/tile/kernel/pci.c @@ -310,7 +310,6 @@ int __init pcibios_init(void) if (pci_scan_flags[i] == 0 && controllers[i].ops != NULL) { struct pci_controller *controller = &controllers[i]; struct pci_bus *bus; - LIST_HEAD(resources); if (tile_init_irqs(i, controller)) { pr_err("PCI: Could not initialize IRQs\n"); @@ -328,11 +327,9 @@ int __init pcibios_init(void) * This is inlined in linux/pci.h and calls into * pci_scan_bus_parented() in probe.c. */ - pci_add_resource(&resources, &ioport_resource); - pci_add_resource(&resources, &iomem_resource); - bus = pci_scan_root_bus(NULL, 0, controller->ops, controller, &resources); + bus = pci_scan_bus(0, controller->ops, controller); controller->root_bus = bus; - controller->last_busno = bus->busn_res.end; + controller->last_busno = bus->subordinate; } } @@ -369,7 +366,7 @@ int __init pcibios_init(void) */ if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && (PCI_SLOT(dev->devfn) == 0)) { - next_bus = dev->busn_res.end; + next_bus = dev->subordinate; controllers[i].mem_resources[0] = *next_bus->resource[0]; controllers[i].mem_resources[1] = diff --git a/trunk/arch/x86/pci/acpi.c b/trunk/arch/x86/pci/acpi.c index 2bb885afe103..fc09c2754e08 100644 --- a/trunk/arch/x86/pci/acpi.c +++ b/trunk/arch/x86/pci/acpi.c @@ -12,6 +12,7 @@ struct pci_root_info { char name[16]; unsigned int res_num; struct resource *res; + int busnum; struct pci_sysdata sd; }; @@ -346,9 +347,7 @@ probe_pci_root_info(struct pci_root_info *info, struct acpi_device *device, { size_t size; - sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum); info->bridge = device; - info->res_num = 0; acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource, info); @@ -361,6 +360,8 @@ probe_pci_root_info(struct pci_root_info *info, struct acpi_device *device, if (!info->res) return; + sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum); + acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource, info); } @@ -425,8 +426,6 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root) } else { probe_pci_root_info(info, device, busnum, domain); - /* insert busn res at first */ - pci_add_resource(&resources, &root->secondary); /* * _CRS with no apertures is normal, so only fall back to * defaults or native bridge info if we're ignoring _CRS. @@ -441,7 +440,7 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root) bus = pci_create_root_bus(NULL, busnum, &pci_root_ops, sd, &resources); if (bus) { - pci_scan_child_bus(bus); + bus->subordinate = pci_scan_child_bus(bus); pci_set_host_bridge_release( to_pci_host_bridge(bus->bridge), release_pci_root_info, info); diff --git a/trunk/arch/x86/pci/amd_bus.c b/trunk/arch/x86/pci/amd_bus.c index e9e6ed5cdf94..5aed49bff058 100644 --- a/trunk/arch/x86/pci/amd_bus.c +++ b/trunk/arch/x86/pci/amd_bus.c @@ -121,6 +121,7 @@ static int __init early_fill_mp_bus_info(void) link = (reg >> 8) & 0x03; info = alloc_pci_root_info(min_bus, max_bus, node, link); + sprintf(info->name, "PCI Bus #%02x", min_bus); } /* get the default node and link for left over res */ @@ -299,9 +300,9 @@ static int __init early_fill_mp_bus_info(void) int busnum; struct pci_root_res *root_res; - busnum = info->busn.start; - printk(KERN_DEBUG "bus: %pR on node %x link %x\n", - &info->busn, info->node, info->link); + busnum = info->bus_min; + printk(KERN_DEBUG "bus: [%02x, %02x] on node %x link %x\n", + info->bus_min, info->bus_max, info->node, info->link); list_for_each_entry(root_res, &info->resources, list) printk(KERN_DEBUG "bus: %02x %pR\n", busnum, &root_res->res); diff --git a/trunk/arch/x86/pci/bus_numa.c b/trunk/arch/x86/pci/bus_numa.c index d37e2fec97e5..306579f7d0fd 100644 --- a/trunk/arch/x86/pci/bus_numa.c +++ b/trunk/arch/x86/pci/bus_numa.c @@ -14,7 +14,7 @@ static struct pci_root_info *x86_find_pci_root_info(int bus) return NULL; list_for_each_entry(info, &pci_root_infos, list) - if (info->busn.start == bus) + if (info->bus_min == bus) return info; return NULL; @@ -24,8 +24,6 @@ void x86_pci_root_bus_resources(int bus, struct list_head *resources) { struct pci_root_info *info = x86_find_pci_root_info(bus); struct pci_root_res *root_res; - struct pci_host_bridge_window *window; - bool found = false; if (!info) goto default_resources; @@ -33,16 +31,6 @@ void x86_pci_root_bus_resources(int bus, struct list_head *resources) printk(KERN_DEBUG "PCI: root bus %02x: hardware-probed resources\n", bus); - /* already added by acpi ? */ - list_for_each_entry(window, resources, list) - if (window->res->flags & IORESOURCE_BUS) { - found = true; - break; - } - - if (!found) - pci_add_resource(resources, &info->busn); - list_for_each_entry(root_res, &info->resources, list) { struct resource *res; struct resource *root; @@ -78,13 +66,9 @@ struct pci_root_info __init *alloc_pci_root_info(int bus_min, int bus_max, if (!info) return info; - sprintf(info->name, "PCI Bus #%02x", bus_min); - INIT_LIST_HEAD(&info->resources); - info->busn.name = info->name; - info->busn.start = bus_min; - info->busn.end = bus_max; - info->busn.flags = IORESOURCE_BUS; + info->bus_min = bus_min; + info->bus_max = bus_max; info->node = node; info->link = link; diff --git a/trunk/arch/x86/pci/bus_numa.h b/trunk/arch/x86/pci/bus_numa.h index ff8f65b04574..226a466b2b2b 100644 --- a/trunk/arch/x86/pci/bus_numa.h +++ b/trunk/arch/x86/pci/bus_numa.h @@ -13,7 +13,8 @@ struct pci_root_info { struct list_head list; char name[12]; struct list_head resources; - struct resource busn; + int bus_min; + int bus_max; int node; int link; }; diff --git a/trunk/arch/xtensa/kernel/pci.c b/trunk/arch/xtensa/kernel/pci.c index 9c57c1e6870c..eb30e356f5be 100644 --- a/trunk/arch/xtensa/kernel/pci.c +++ b/trunk/arch/xtensa/kernel/pci.c @@ -187,7 +187,7 @@ static int __init pcibios_init(void) bus = pci_scan_root_bus(NULL, pci_ctrl->first_busno, pci_ctrl->ops, pci_ctrl, &resources); pci_ctrl->bus = bus; - pci_ctrl->last_busno = bus->busn_res.end; + pci_ctrl->last_busno = bus->subordinate; if (next_busno <= pci_ctrl->last_busno) next_busno = pci_ctrl->last_busno+1; } diff --git a/trunk/drivers/iommu/intel-iommu.c b/trunk/drivers/iommu/intel-iommu.c index 2fb7d1598a68..b12af2ff8c54 100644 --- a/trunk/drivers/iommu/intel-iommu.c +++ b/trunk/drivers/iommu/intel-iommu.c @@ -661,7 +661,7 @@ static struct intel_iommu *device_to_iommu(int segment, u8 bus, u8 devfn) if (drhd->devices[i] && drhd->devices[i]->subordinate && drhd->devices[i]->subordinate->number <= bus && - drhd->devices[i]->subordinate->busn_res.end >= bus) + drhd->devices[i]->subordinate->subordinate >= bus) return drhd->iommu; } diff --git a/trunk/drivers/net/ethernet/broadcom/tg3.c b/trunk/drivers/net/ethernet/broadcom/tg3.c index 09fa3c687a1f..edeeb516807a 100644 --- a/trunk/drivers/net/ethernet/broadcom/tg3.c +++ b/trunk/drivers/net/ethernet/broadcom/tg3.c @@ -14168,7 +14168,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) if (bridge->subordinate && (bridge->subordinate->number <= tp->pdev->bus->number) && - (bridge->subordinate->busn_res.end >= + (bridge->subordinate->subordinate >= tp->pdev->bus->number)) { tg3_flag_set(tp, 5701_DMA_BUG); pci_dev_put(bridge); @@ -14196,7 +14196,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) if (bridge && bridge->subordinate && (bridge->subordinate->number <= tp->pdev->bus->number) && - (bridge->subordinate->busn_res.end >= + (bridge->subordinate->subordinate >= tp->pdev->bus->number)) { tg3_flag_set(tp, 40BIT_DMA_BUG); pci_dev_put(bridge); diff --git a/trunk/drivers/parisc/dino.c b/trunk/drivers/parisc/dino.c index ffddc4f64268..432d4bbcc62a 100644 --- a/trunk/drivers/parisc/dino.c +++ b/trunk/drivers/parisc/dino.c @@ -174,7 +174,7 @@ static int dino_cfg_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) { struct dino_device *d = DINO_DEV(parisc_walk_tree(bus->bridge)); - u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start; + u32 local_bus = (bus->parent == NULL) ? 0 : bus->secondary; u32 v = DINO_CFG_TOK(local_bus, devfn, where & ~3); void __iomem *base_addr = d->hba.base_addr; unsigned long flags; @@ -209,7 +209,7 @@ static int dino_cfg_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) { struct dino_device *d = DINO_DEV(parisc_walk_tree(bus->bridge)); - u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start; + u32 local_bus = (bus->parent == NULL) ? 0 : bus->secondary; u32 v = DINO_CFG_TOK(local_bus, devfn, where & ~3); void __iomem *base_addr = d->hba.base_addr; unsigned long flags; @@ -554,7 +554,7 @@ dino_fixup_bus(struct pci_bus *bus) struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge)); DBG(KERN_WARNING "%s(0x%p) bus %d platform_data 0x%p\n", - __func__, bus, bus->busn_res.start, + __func__, bus, bus->secondary, bus->bridge->platform_data); /* Firmware doesn't set up card-mode dino, so we have to */ @@ -898,7 +898,6 @@ static int __init dino_probe(struct parisc_device *dev) LIST_HEAD(resources); struct pci_bus *bus; unsigned long hpa = dev->hpa.start; - int max; name = "Dino"; if (is_card_dino(&dev->id)) { @@ -984,10 +983,6 @@ static int __init dino_probe(struct parisc_device *dev) if (dino_dev->hba.gmmio_space.flags) pci_add_resource(&resources, &dino_dev->hba.gmmio_space); - dino_dev->hba.bus_num.start = dino_current_bus; - dino_dev->hba.bus_num.end = 255; - dino_dev->hba.bus_num.flags = IORESOURCE_BUS; - pci_add_resource(&resources, &dino_dev->hba.bus_num); /* ** It's not used to avoid chicken/egg problems ** with configuration accessor functions. @@ -1003,13 +998,12 @@ static int __init dino_probe(struct parisc_device *dev) return 0; } - max = pci_scan_child_bus(bus); - pci_bus_update_busn_res_end(bus, max); + bus->subordinate = pci_scan_child_bus(bus); /* This code *depends* on scanning being single threaded * if it isn't, this global bus number count will fail */ - dino_current_bus = max + 1; + dino_current_bus = bus->subordinate + 1; pci_bus_assign_resources(bus); pci_bus_add_devices(bus); return 0; diff --git a/trunk/drivers/parisc/iosapic.c b/trunk/drivers/parisc/iosapic.c index 83380c8fcb6b..1f9e9fefb8e7 100644 --- a/trunk/drivers/parisc/iosapic.c +++ b/trunk/drivers/parisc/iosapic.c @@ -532,7 +532,7 @@ iosapic_xlate_pin(struct iosapic_info *isi, struct pci_dev *pcidev) intr_slot = PCI_SLOT(pcidev->devfn); } DBG_IRT("iosapic_xlate_pin: bus %d slot %d pin %d\n", - pcidev->bus->busn_res.start, intr_slot, intr_pin); + pcidev->bus->secondary, intr_slot, intr_pin); return irt_find_irqline(isi, intr_slot, intr_pin); } diff --git a/trunk/drivers/parisc/lba_pci.c b/trunk/drivers/parisc/lba_pci.c index 4f9cf2456f4e..052fa230bc77 100644 --- a/trunk/drivers/parisc/lba_pci.c +++ b/trunk/drivers/parisc/lba_pci.c @@ -189,8 +189,8 @@ lba_dump_res(struct resource *r, int d) static int lba_device_present(u8 bus, u8 dfn, struct lba_device *d) { - u8 first_bus = d->hba.hba_bus->busn_res.start; - u8 last_sub_bus = d->hba.hba_bus->busn_res.end; + u8 first_bus = d->hba.hba_bus->secondary; + u8 last_sub_bus = d->hba.hba_bus->subordinate; if ((bus < first_bus) || (bus > last_sub_bus) || @@ -364,7 +364,7 @@ lba_rd_cfg(struct lba_device *d, u32 tok, u8 reg, u32 size) static int elroy_cfg_read(struct pci_bus *bus, unsigned int devfn, int pos, int size, u32 *data) { struct lba_device *d = LBA_DEV(parisc_walk_tree(bus->bridge)); - u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start; + u32 local_bus = (bus->parent == NULL) ? 0 : bus->secondary; u32 tok = LBA_CFG_TOK(local_bus, devfn); void __iomem *data_reg = d->hba.base_addr + LBA_PCI_CFG_DATA; @@ -380,7 +380,7 @@ static int elroy_cfg_read(struct pci_bus *bus, unsigned int devfn, int pos, int return 0; } - if (LBA_SKIP_PROBE(d) && !lba_device_present(bus->busn_res.start, devfn, d)) { + if (LBA_SKIP_PROBE(d) && !lba_device_present(bus->secondary, devfn, d)) { DBG_CFG("%s(%x+%2x) -> -1 (b)\n", __func__, tok, pos); /* either don't want to look or know device isn't present. */ *data = ~0U; @@ -431,7 +431,7 @@ lba_wr_cfg(struct lba_device *d, u32 tok, u8 reg, u32 data, u32 size) static int elroy_cfg_write(struct pci_bus *bus, unsigned int devfn, int pos, int size, u32 data) { struct lba_device *d = LBA_DEV(parisc_walk_tree(bus->bridge)); - u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start; + u32 local_bus = (bus->parent == NULL) ? 0 : bus->secondary; u32 tok = LBA_CFG_TOK(local_bus,devfn); if ((pos > 255) || (devfn > 255)) @@ -444,7 +444,7 @@ static int elroy_cfg_write(struct pci_bus *bus, unsigned int devfn, int pos, int return 0; } - if (LBA_SKIP_PROBE(d) && (!lba_device_present(bus->busn_res.start, devfn, d))) { + if (LBA_SKIP_PROBE(d) && (!lba_device_present(bus->secondary, devfn, d))) { DBG_CFG("%s(%x+%2x) = 0x%x (b)\n", __func__, tok, pos,data); return 1; /* New Workaround */ } @@ -481,7 +481,7 @@ static struct pci_ops elroy_cfg_ops = { static int mercury_cfg_read(struct pci_bus *bus, unsigned int devfn, int pos, int size, u32 *data) { struct lba_device *d = LBA_DEV(parisc_walk_tree(bus->bridge)); - u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start; + u32 local_bus = (bus->parent == NULL) ? 0 : bus->secondary; u32 tok = LBA_CFG_TOK(local_bus, devfn); void __iomem *data_reg = d->hba.base_addr + LBA_PCI_CFG_DATA; @@ -514,7 +514,7 @@ static int mercury_cfg_write(struct pci_bus *bus, unsigned int devfn, int pos, i { struct lba_device *d = LBA_DEV(parisc_walk_tree(bus->bridge)); void __iomem *data_reg = d->hba.base_addr + LBA_PCI_CFG_DATA; - u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start; + u32 local_bus = (bus->parent == NULL) ? 0 : bus->secondary; u32 tok = LBA_CFG_TOK(local_bus,devfn); if ((pos > 255) || (devfn > 255)) @@ -636,7 +636,7 @@ lba_fixup_bus(struct pci_bus *bus) struct lba_device *ldev = LBA_DEV(parisc_walk_tree(bus->bridge)); DBG("lba_fixup_bus(0x%p) bus %d platform_data 0x%p\n", - bus, (int)bus->busn_res.start, bus->bridge->platform_data); + bus, bus->secondary, bus->bridge->platform_data); /* ** Properly Setup MMIO resources for this bus. @@ -989,7 +989,6 @@ lba_pat_resources(struct parisc_device *pa_dev, struct lba_device *lba_dev) case PAT_PBNUM: lba_dev->hba.bus_num.start = p->start; lba_dev->hba.bus_num.end = p->end; - lba_dev->hba.bus_num.flags = IORESOURCE_BUS; break; case PAT_LMMIO: @@ -1367,7 +1366,6 @@ lba_driver_probe(struct parisc_device *dev) void *tmp_obj; char *version; void __iomem *addr = ioremap_nocache(dev->hpa.start, 4096); - int max; /* Read HW Rev First */ func_class = READ_REG32(addr + LBA_FCLASS); @@ -1504,8 +1502,6 @@ lba_driver_probe(struct parisc_device *dev) if (lba_dev->hba.gmmio_space.flags) pci_add_resource(&resources, &lba_dev->hba.gmmio_space); - pci_add_resource(&resources, &lba_dev->hba.bus_num); - dev->dev.platform_data = lba_dev; lba_bus = lba_dev->hba.hba_bus = pci_create_root_bus(&dev->dev, lba_dev->hba.bus_num.start, @@ -1515,7 +1511,7 @@ lba_driver_probe(struct parisc_device *dev) return 0; } - max = pci_scan_child_bus(lba_bus); + lba_bus->subordinate = pci_scan_child_bus(lba_bus); /* This is in lieu of calling pci_assign_unassigned_resources() */ if (is_pdc_pat()) { @@ -1545,7 +1541,7 @@ lba_driver_probe(struct parisc_device *dev) lba_dev->flags |= LBA_FLAG_SKIP_PROBE; } - lba_next_bus = max + 1; + lba_next_bus = lba_bus->subordinate + 1; pci_bus_add_devices(lba_bus); /* Whew! Finally done! Tell services we got this one covered. */ diff --git a/trunk/drivers/pci/access.c b/trunk/drivers/pci/access.c index ba91a7e17519..2a581642c237 100644 --- a/trunk/drivers/pci/access.c +++ b/trunk/drivers/pci/access.c @@ -162,8 +162,7 @@ int pci_user_read_config_##size \ if (ret > 0) \ ret = -EINVAL; \ return ret; \ -} \ -EXPORT_SYMBOL_GPL(pci_user_read_config_##size); +} /* Returns 0 on success, negative values indicate error. */ #define PCI_USER_WRITE_CONFIG(size,type) \ @@ -182,8 +181,7 @@ int pci_user_write_config_##size \ if (ret > 0) \ ret = -EINVAL; \ return ret; \ -} \ -EXPORT_SYMBOL_GPL(pci_user_write_config_##size); +} PCI_USER_READ_CONFIG(byte, u8) PCI_USER_READ_CONFIG(word, u16) diff --git a/trunk/drivers/pci/hotplug-pci.c b/trunk/drivers/pci/hotplug-pci.c index 6258dc260d9f..d3509cdeb554 100644 --- a/trunk/drivers/pci/hotplug-pci.c +++ b/trunk/drivers/pci/hotplug-pci.c @@ -4,26 +4,18 @@ #include #include "pci.h" -int __ref pci_hp_add_bridge(struct pci_dev *dev) + +unsigned int __devinit pci_do_scan_bus(struct pci_bus *bus) { - struct pci_bus *parent = dev->bus; - int pass, busnr, start = parent->busn_res.start; - int end = parent->busn_res.end; + unsigned int max; + + max = pci_scan_child_bus(bus); - for (busnr = start; busnr <= end; busnr++) { - if (!pci_find_bus(pci_domain_nr(parent), busnr)) - break; - } - if (busnr-- > end) { - printk(KERN_ERR "No bus number available for hot-added bridge %s\n", - pci_name(dev)); - return -1; - } - for (pass = 0; pass < 2; pass++) - busnr = pci_scan_bridge(parent, dev, busnr, pass); - if (!dev->subordinate) - return -1; + /* + * Make the discovered devices available. + */ + pci_bus_add_devices(bus); - return 0; + return max; } -EXPORT_SYMBOL_GPL(pci_hp_add_bridge); +EXPORT_SYMBOL(pci_do_scan_bus); diff --git a/trunk/drivers/pci/hotplug/acpiphp_glue.c b/trunk/drivers/pci/hotplug/acpiphp_glue.c index 73af3374e915..806c44fa645a 100644 --- a/trunk/drivers/pci/hotplug/acpiphp_glue.c +++ b/trunk/drivers/pci/hotplug/acpiphp_glue.c @@ -100,11 +100,11 @@ static int post_dock_fixups(struct notifier_block *nb, unsigned long val, PCI_PRIMARY_BUS, &buses); - if (((buses >> 8) & 0xff) != bus->busn_res.start) { + if (((buses >> 8) & 0xff) != bus->secondary) { buses = (buses & 0xff000000) | ((unsigned int)(bus->primary) << 0) - | ((unsigned int)(bus->busn_res.start) << 8) - | ((unsigned int)(bus->busn_res.end) << 16); + | ((unsigned int)(bus->secondary) << 8) + | ((unsigned int)(bus->subordinate) << 16); pci_write_config_dword(bus->self, PCI_PRIMARY_BUS, buses); } return NOTIFY_OK; @@ -692,7 +692,7 @@ static unsigned char acpiphp_max_busnr(struct pci_bus *bus) * bus->subordinate value because it could have * padding in it. */ - max = bus->busn_res.start; + max = bus->secondary; list_for_each(tmp, &bus->children) { n = pci_bus_max_busnr(pci_bus_b(tmp)); @@ -878,24 +878,6 @@ static void disable_bridges(struct pci_bus *bus) } } -/* return first device in slot, acquiring a reference on it */ -static struct pci_dev *dev_in_slot(struct acpiphp_slot *slot) -{ - struct pci_bus *bus = slot->bridge->pci_bus; - struct pci_dev *dev; - struct pci_dev *ret = NULL; - - down_read(&pci_bus_sem); - list_for_each_entry(dev, &bus->devices, bus_list) - if (PCI_SLOT(dev->devfn) == slot->device) { - ret = pci_dev_get(dev); - break; - } - up_read(&pci_bus_sem); - - return ret; -} - /** * disable_device - disable a slot * @slot: ACPI PHP slot @@ -911,7 +893,6 @@ static int disable_device(struct acpiphp_slot *slot) pdev = pci_get_slot(bus, PCI_DEVFN(slot->device, 0)); if (!pdev) goto err_exit; - pci_dev_put(pdev); list_for_each_entry(func, &slot->funcs, sibling) { if (func->bridge) { @@ -920,22 +901,18 @@ static int disable_device(struct acpiphp_slot *slot) (u32)1, NULL, NULL); func->bridge = NULL; } - } - /* - * enable_device() enumerates all functions in this device via - * pci_scan_slot(), whether they have associated ACPI hotplug - * methods (_EJ0, etc.) or not. Therefore, we remove all functions - * here. - */ - while ((pdev = dev_in_slot(slot))) { - pci_stop_bus_device(pdev); - if (pdev->subordinate) { - disable_bridges(pdev->subordinate); - pci_disable_device(pdev); + pdev = pci_get_slot(slot->bridge->pci_bus, + PCI_DEVFN(slot->device, func->function)); + if (pdev) { + pci_stop_bus_device(pdev); + if (pdev->subordinate) { + disable_bridges(pdev->subordinate); + pci_disable_device(pdev); + } + __pci_remove_bus_device(pdev); + pci_dev_put(pdev); } - __pci_remove_bus_device(pdev); - pci_dev_put(pdev); } list_for_each_entry(func, &slot->funcs, sibling) { diff --git a/trunk/drivers/pci/hotplug/cpci_hotplug_pci.c b/trunk/drivers/pci/hotplug/cpci_hotplug_pci.c index dcc75c785443..ae853ccd0cd5 100644 --- a/trunk/drivers/pci/hotplug/cpci_hotplug_pci.c +++ b/trunk/drivers/pci/hotplug/cpci_hotplug_pci.c @@ -285,19 +285,42 @@ int __ref cpci_configure_slot(struct slot *slot) for (fn = 0; fn < 8; fn++) { struct pci_dev *dev; - dev = pci_get_slot(parent, - PCI_DEVFN(PCI_SLOT(slot->devfn), fn)); + dev = pci_get_slot(parent, PCI_DEVFN(PCI_SLOT(slot->devfn), fn)); if (!dev) continue; if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) || - (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) - pci_hp_add_bridge(dev); + (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) { + /* Find an unused bus number for the new bridge */ + struct pci_bus *child; + unsigned char busnr, start = parent->secondary; + unsigned char end = parent->subordinate; + + for (busnr = start; busnr <= end; busnr++) { + if (!pci_find_bus(pci_domain_nr(parent), + busnr)) + break; + } + if (busnr >= end) { + err("No free bus for hot-added bridge\n"); + pci_dev_put(dev); + continue; + } + child = pci_add_new_bus(parent, dev, busnr); + if (!child) { + err("Cannot add new bus for %s\n", + pci_name(dev)); + pci_dev_put(dev); + continue; + } + child->subordinate = pci_do_scan_bus(child); + pci_bus_size_bridges(child); + } pci_dev_put(dev); } - pci_assign_unassigned_bridge_resources(parent->self); - + pci_bus_assign_resources(parent); pci_bus_add_devices(parent); + pci_enable_bridges(parent); dbg("%s - exit", __func__); return 0; diff --git a/trunk/drivers/pci/hotplug/cpqphp_pci.c b/trunk/drivers/pci/hotplug/cpqphp_pci.c index 09801c6945ce..1c8494021a42 100644 --- a/trunk/drivers/pci/hotplug/cpqphp_pci.c +++ b/trunk/drivers/pci/hotplug/cpqphp_pci.c @@ -83,6 +83,7 @@ static void __iomem *detect_HRT_floating_pointer(void __iomem *begin, void __iom int cpqhp_configure_device (struct controller* ctrl, struct pci_func* func) { + unsigned char bus; struct pci_bus *child; int num; @@ -105,10 +106,9 @@ int cpqhp_configure_device (struct controller* ctrl, struct pci_func* func) } if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) { - pci_hp_add_bridge(func->pci_dev); - child = func->pci_dev->subordinate; - if (child) - pci_bus_add_devices(child); + pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus); + child = (struct pci_bus*) pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus); + pci_do_scan_bus(child); } pci_dev_put(func->pci_dev); diff --git a/trunk/drivers/pci/hotplug/ibmphp_core.c b/trunk/drivers/pci/hotplug/ibmphp_core.c index 7dccad5fc891..4fda7e6a86a7 100644 --- a/trunk/drivers/pci/hotplug/ibmphp_core.c +++ b/trunk/drivers/pci/hotplug/ibmphp_core.c @@ -775,6 +775,7 @@ static u8 bus_structure_fixup(u8 busno) static int ibm_configure_device(struct pci_func *func) { + unsigned char bus; struct pci_bus *child; int num; int flag = 0; /* this is to make sure we don't double scan the bus, @@ -804,10 +805,9 @@ static int ibm_configure_device(struct pci_func *func) } } if (!(flag) && (func->dev->hdr_type == PCI_HEADER_TYPE_BRIDGE)) { - pci_hp_add_bridge(func->dev); - child = func->dev->subordinate; - if (child) - pci_bus_add_devices(child); + pci_read_config_byte(func->dev, PCI_SECONDARY_BUS, &bus); + child = pci_add_new_bus(func->dev->bus, func->dev, bus); + pci_do_scan_bus(child); } return 0; diff --git a/trunk/drivers/pci/hotplug/pciehp_pci.c b/trunk/drivers/pci/hotplug/pciehp_pci.c index 09cecaf450c5..47d9dc06b109 100644 --- a/trunk/drivers/pci/hotplug/pciehp_pci.c +++ b/trunk/drivers/pci/hotplug/pciehp_pci.c @@ -34,6 +34,29 @@ #include "../pci.h" #include "pciehp.h" +static int __ref pciehp_add_bridge(struct pci_dev *dev) +{ + struct pci_bus *parent = dev->bus; + int pass, busnr, start = parent->secondary; + int end = parent->subordinate; + + for (busnr = start; busnr <= end; busnr++) { + if (!pci_find_bus(pci_domain_nr(parent), busnr)) + break; + } + if (busnr-- > end) { + err("No bus number available for hot-added bridge %s\n", + pci_name(dev)); + return -1; + } + for (pass = 0; pass < 2; pass++) + busnr = pci_scan_bridge(parent, dev, busnr, pass); + if (!dev->subordinate) + return -1; + + return 0; +} + int pciehp_configure_device(struct slot *p_slot) { struct pci_dev *dev; @@ -62,8 +85,9 @@ int pciehp_configure_device(struct slot *p_slot) if (!dev) continue; if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) || - (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) - pci_hp_add_bridge(dev); + (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) { + pciehp_add_bridge(dev); + } pci_dev_put(dev); } diff --git a/trunk/drivers/pci/hotplug/sgi_hotplug.c b/trunk/drivers/pci/hotplug/sgi_hotplug.c index f64ca92253da..de573113c102 100644 --- a/trunk/drivers/pci/hotplug/sgi_hotplug.c +++ b/trunk/drivers/pci/hotplug/sgi_hotplug.c @@ -397,11 +397,13 @@ static int enable_slot(struct hotplug_slot *bss_hotplug_slot) else sn_io_slot_fixup(dev); if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) { - pci_hp_add_bridge(dev); - if (dev->subordinate) { - new_bus = dev->subordinate; - new_ppb = 1; - } + unsigned char sec_bus; + pci_read_config_byte(dev, PCI_SECONDARY_BUS, + &sec_bus); + new_bus = pci_add_new_bus(dev->bus, dev, + sec_bus); + pci_scan_child_bus(new_bus); + new_ppb = 1; } pci_dev_put(dev); } diff --git a/trunk/drivers/pci/hotplug/shpchp_pci.c b/trunk/drivers/pci/hotplug/shpchp_pci.c index c627ed9957d1..df7e4bfadae3 100644 --- a/trunk/drivers/pci/hotplug/shpchp_pci.c +++ b/trunk/drivers/pci/hotplug/shpchp_pci.c @@ -37,10 +37,9 @@ int __ref shpchp_configure_device(struct slot *p_slot) { struct pci_dev *dev; - struct controller *ctrl = p_slot->ctrl; - struct pci_dev *bridge = ctrl->pci_dev; - struct pci_bus *parent = bridge->subordinate; + struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate; int num, fn; + struct controller *ctrl = p_slot->ctrl; dev = pci_get_slot(parent, PCI_DEVFN(p_slot->device, 0)); if (dev) { @@ -62,23 +61,39 @@ int __ref shpchp_configure_device(struct slot *p_slot) if (!dev) continue; if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) || - (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) - pci_hp_add_bridge(dev); - pci_dev_put(dev); - } - - pci_assign_unassigned_bridge_resources(bridge); - - for (fn = 0; fn < 8; fn++) { - dev = pci_get_slot(parent, PCI_DEVFN(p_slot->device, fn)); - if (!dev) - continue; + (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) { + /* Find an unused bus number for the new bridge */ + struct pci_bus *child; + unsigned char busnr, start = parent->secondary; + unsigned char end = parent->subordinate; + for (busnr = start; busnr <= end; busnr++) { + if (!pci_find_bus(pci_domain_nr(parent), + busnr)) + break; + } + if (busnr > end) { + ctrl_err(ctrl, + "No free bus for hot-added bridge\n"); + pci_dev_put(dev); + continue; + } + child = pci_add_new_bus(parent, dev, busnr); + if (!child) { + ctrl_err(ctrl, "Cannot add new bus for %s\n", + pci_name(dev)); + pci_dev_put(dev); + continue; + } + child->subordinate = pci_do_scan_bus(child); + pci_bus_size_bridges(child); + } pci_configure_slot(dev); pci_dev_put(dev); } + pci_bus_assign_resources(parent); pci_bus_add_devices(parent); - + pci_enable_bridges(parent); return 0; } diff --git a/trunk/drivers/pci/hotplug/shpchp_sysfs.c b/trunk/drivers/pci/hotplug/shpchp_sysfs.c index eeb23ceae4a8..efa30da1ae8f 100644 --- a/trunk/drivers/pci/hotplug/shpchp_sysfs.c +++ b/trunk/drivers/pci/hotplug/shpchp_sysfs.c @@ -73,13 +73,13 @@ static ssize_t show_ctrl (struct device *dev, struct device_attribute *attr, cha } } out += sprintf(out, "Free resources: bus numbers\n"); - for (busnr = bus->busn_res.start; busnr <= bus->busn_res.end; busnr++) { + for (busnr = bus->secondary; busnr <= bus->subordinate; busnr++) { if (!pci_find_bus(pci_domain_nr(bus), busnr)) break; } - if (busnr < bus->busn_res.end) + if (busnr < bus->subordinate) out += sprintf(out, "start = %8.8x, length = %8.8x\n", - busnr, (int)(bus->busn_res.end - busnr)); + busnr, (bus->subordinate - busnr)); return out - buf; } diff --git a/trunk/drivers/pci/iov.c b/trunk/drivers/pci/iov.c index 74bbaf82638d..6554e1a0f634 100644 --- a/trunk/drivers/pci/iov.c +++ b/trunk/drivers/pci/iov.c @@ -47,7 +47,7 @@ static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr) if (!child) return NULL; - pci_bus_insert_busn_res(child, busnr, busnr); + child->subordinate = busnr; child->dev.parent = bus->bridge; rc = pci_bus_add_child(child); if (rc) { @@ -327,7 +327,7 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn) iov->offset = offset; iov->stride = stride; - if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->busn_res.end) { + if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->subordinate) { dev_err(&dev->dev, "SR-IOV: bus number out of range\n"); return -ENOMEM; } diff --git a/trunk/drivers/pci/pci.c b/trunk/drivers/pci/pci.c index b743a9afb4dd..847e0c35cdb7 100644 --- a/trunk/drivers/pci/pci.c +++ b/trunk/drivers/pci/pci.c @@ -110,7 +110,7 @@ unsigned char pci_bus_max_busnr(struct pci_bus* bus) struct list_head *tmp; unsigned char max, n; - max = bus->busn_res.end; + max = bus->subordinate; list_for_each(tmp, &bus->children) { n = pci_bus_max_busnr(pci_bus_b(tmp)); if(n > max) @@ -136,6 +136,30 @@ void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar) EXPORT_SYMBOL_GPL(pci_ioremap_bar); #endif +#if 0 +/** + * pci_max_busnr - returns maximum PCI bus number + * + * Returns the highest PCI bus number present in the system global list of + * PCI buses. + */ +unsigned char __devinit +pci_max_busnr(void) +{ + struct pci_bus *bus = NULL; + unsigned char max, n; + + max = 0; + while ((bus = pci_find_next_bus(bus)) != NULL) { + n = pci_bus_max_busnr(bus); + if(n > max) + max = n; + } + return max; +} + +#endif /* 0 */ + #define PCI_FIND_CAP_TTL 48 static int __pci_find_next_cap_ttl(struct pci_bus *bus, unsigned int devfn, @@ -305,6 +329,49 @@ int pci_find_ext_capability(struct pci_dev *dev, int cap) } EXPORT_SYMBOL_GPL(pci_find_ext_capability); +/** + * pci_bus_find_ext_capability - find an extended capability + * @bus: the PCI bus to query + * @devfn: PCI device to query + * @cap: capability code + * + * Like pci_find_ext_capability() but works for pci devices that do not have a + * pci_dev structure set up yet. + * + * Returns the address of the requested capability structure within the + * device's PCI configuration space or 0 in case the device does not + * support it. + */ +int pci_bus_find_ext_capability(struct pci_bus *bus, unsigned int devfn, + int cap) +{ + u32 header; + int ttl; + int pos = PCI_CFG_SPACE_SIZE; + + /* minimum 8 bytes per capability */ + ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8; + + if (!pci_bus_read_config_dword(bus, devfn, pos, &header)) + return 0; + if (header == 0xffffffff || header == 0) + return 0; + + while (ttl-- > 0) { + if (PCI_EXT_CAP_ID(header) == cap) + return pos; + + pos = PCI_EXT_CAP_NEXT(header); + if (pos < PCI_CFG_SPACE_SIZE) + break; + + if (!pci_bus_read_config_dword(bus, devfn, pos, &header)) + break; + } + + return 0; +} + static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap) { int rc, ttl = PCI_FIND_CAP_TTL; @@ -2102,7 +2169,7 @@ EXPORT_SYMBOL(pci_disable_obff); * RETURNS: * True if @dev supports latency tolerance reporting, false otherwise. */ -bool pci_ltr_supported(struct pci_dev *dev) +static bool pci_ltr_supported(struct pci_dev *dev) { int pos; u32 cap; @@ -2118,7 +2185,6 @@ bool pci_ltr_supported(struct pci_dev *dev) return cap & PCI_EXP_DEVCAP2_LTR; } -EXPORT_SYMBOL(pci_ltr_supported); /** * pci_enable_ltr - enable latency tolerance reporting @@ -2292,75 +2358,6 @@ void pci_enable_acs(struct pci_dev *dev) pci_write_config_word(dev, pos + PCI_ACS_CTRL, ctrl); } -/** - * pci_acs_enabled - test ACS against required flags for a given device - * @pdev: device to test - * @acs_flags: required PCI ACS flags - * - * Return true if the device supports the provided flags. Automatically - * filters out flags that are not implemented on multifunction devices. - */ -bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags) -{ - int pos, ret; - u16 ctrl; - - ret = pci_dev_specific_acs_enabled(pdev, acs_flags); - if (ret >= 0) - return ret > 0; - - if (!pci_is_pcie(pdev)) - return false; - - /* Filter out flags not applicable to multifunction */ - if (pdev->multifunction) - acs_flags &= (PCI_ACS_RR | PCI_ACS_CR | - PCI_ACS_EC | PCI_ACS_DT); - - if (pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM || - pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT || - pdev->multifunction) { - pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ACS); - if (!pos) - return false; - - pci_read_config_word(pdev, pos + PCI_ACS_CTRL, &ctrl); - if ((ctrl & acs_flags) != acs_flags) - return false; - } - - return true; -} - -/** - * pci_acs_path_enable - test ACS flags from start to end in a hierarchy - * @start: starting downstream device - * @end: ending upstream device or NULL to search to the root bus - * @acs_flags: required flags - * - * Walk up a device tree from start to end testing PCI ACS support. If - * any step along the way does not support the required flags, return false. - */ -bool pci_acs_path_enabled(struct pci_dev *start, - struct pci_dev *end, u16 acs_flags) -{ - struct pci_dev *pdev, *parent = start; - - do { - pdev = parent; - - if (!pci_acs_enabled(pdev, acs_flags)) - return false; - - if (pci_is_root_bus(pdev->bus)) - return (end == NULL); - - parent = pdev->bus->self; - } while (pdev != end); - - return true; -} - /** * pci_swizzle_interrupt_pin - swizzle INTx for device behind bridge * @dev: the PCI device diff --git a/trunk/drivers/pci/pci.h b/trunk/drivers/pci/pci.h index 4884d77d33b6..e4943479b234 100644 --- a/trunk/drivers/pci/pci.h +++ b/trunk/drivers/pci/pci.h @@ -86,6 +86,13 @@ static inline bool pci_is_bridge(struct pci_dev *pci_dev) return !!(pci_dev->subordinate); } +extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val); +extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val); +extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val); +extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val); +extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val); +extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val); + struct pci_vpd_ops { ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf); ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); @@ -117,7 +124,7 @@ static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } #endif /* Functions for PCI Hotplug drivers to use */ -int pci_hp_add_bridge(struct pci_dev *dev); +extern unsigned int pci_do_scan_bus(struct pci_bus *bus); #ifdef HAVE_PCI_LEGACY extern void pci_create_legacy_files(struct pci_bus *bus); diff --git a/trunk/drivers/pci/pcie/aer/aerdrv_acpi.c b/trunk/drivers/pci/pcie/aer/aerdrv_acpi.c index 124f20ff11b2..275bf158ffa7 100644 --- a/trunk/drivers/pci/pcie/aer/aerdrv_acpi.c +++ b/trunk/drivers/pci/pcie/aer/aerdrv_acpi.c @@ -59,7 +59,7 @@ static int aer_hest_parse(struct acpi_hest_header *hest_hdr, void *data) p = (struct acpi_hest_aer_common *)(hest_hdr + 1); if (p->flags & ACPI_HEST_GLOBAL) { - if ((pci_is_pcie(info->pci_dev) && + if ((info->pci_dev->is_pcie && info->pci_dev->pcie_type == pcie_type) || bridge) ff = !!(p->flags & ACPI_HEST_FIRMWARE_FIRST); } else diff --git a/trunk/drivers/pci/probe.c b/trunk/drivers/pci/probe.c index 08404098080b..658ac977cb56 100644 --- a/trunk/drivers/pci/probe.c +++ b/trunk/drivers/pci/probe.c @@ -16,47 +16,10 @@ #define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */ #define CARDBUS_RESERVE_BUSNR 3 -struct resource busn_resource = { - .name = "PCI busn", - .start = 0, - .end = 255, - .flags = IORESOURCE_BUS, -}; - /* Ugh. Need to stop exporting this to modules. */ LIST_HEAD(pci_root_buses); EXPORT_SYMBOL(pci_root_buses); -static LIST_HEAD(pci_domain_busn_res_list); - -struct pci_domain_busn_res { - struct list_head list; - struct resource res; - int domain_nr; -}; - -static struct resource *get_pci_domain_busn_res(int domain_nr) -{ - struct pci_domain_busn_res *r; - - list_for_each_entry(r, &pci_domain_busn_res_list, list) - if (r->domain_nr == domain_nr) - return &r->res; - - r = kzalloc(sizeof(*r), GFP_KERNEL); - if (!r) - return NULL; - - r->domain_nr = domain_nr; - r->res.start = 0; - r->res.end = 0xff; - r->res.flags = IORESOURCE_BUS | IORESOURCE_PCI_FIXED; - - list_add_tail(&r->list, &pci_domain_busn_res_list); - - return &r->res; -} - static int find_anything(struct device *dev, void *data) { return 1; @@ -418,8 +381,8 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child) if (pci_is_root_bus(child)) /* It's a host bus, nothing to read */ return; - dev_info(&dev->dev, "PCI bridge to %pR%s\n", - &child->busn_res, + dev_info(&dev->dev, "PCI bridge to [bus %02x-%02x]%s\n", + child->secondary, child->subordinate, dev->transparent ? " (subtractive decode)" : ""); pci_bus_remove_resources(child); @@ -636,9 +599,9 @@ static struct pci_bus *pci_alloc_child_bus(struct pci_bus *parent, * Set up the primary, secondary and subordinate * bus numbers. */ - child->number = child->busn_res.start = busnr; - child->primary = parent->busn_res.start; - child->busn_res.end = 0xff; + child->number = child->secondary = busnr; + child->primary = parent->secondary; + child->subordinate = 0xff; if (!bridge) return child; @@ -680,8 +643,8 @@ static void pci_fixup_parent_subordinate_busnr(struct pci_bus *child, int max) if (!pcibios_assign_all_busses()) return; - while (parent->parent && parent->busn_res.end < max) { - parent->busn_res.end = max; + while (parent->parent && parent->subordinate < max) { + parent->subordinate = max; pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS, max); parent = parent->parent; } @@ -755,15 +718,15 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, if (!child) goto out; child->primary = primary; - pci_bus_insert_busn_res(child, secondary, subordinate); + child->subordinate = subordinate; child->bridge_ctl = bctl; } cmax = pci_scan_child_bus(child); if (cmax > max) max = cmax; - if (child->busn_res.end > max) - max = child->busn_res.end; + if (child->subordinate > max) + max = child->subordinate; } else { /* * We need to assign a number to this bus which we always @@ -793,12 +756,11 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, child = pci_add_new_bus(bus, dev, ++max); if (!child) goto out; - pci_bus_insert_busn_res(child, max, 0xff); } buses = (buses & 0xff000000) | ((unsigned int)(child->primary) << 0) - | ((unsigned int)(child->busn_res.start) << 8) - | ((unsigned int)(child->busn_res.end) << 16); + | ((unsigned int)(child->secondary) << 8) + | ((unsigned int)(child->subordinate) << 16); /* * yenta.c forces a secondary latency timer of 176. @@ -843,8 +805,8 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, break; while (parent->parent) { if ((!pcibios_assign_all_busses()) && - (parent->busn_res.end > max) && - (parent->busn_res.end <= max+i)) { + (parent->subordinate > max) && + (parent->subordinate <= max+i)) { j = 1; } parent = parent->parent; @@ -865,7 +827,7 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, /* * Set the subordinate bus number to its real value. */ - pci_bus_update_busn_res_end(child, max); + child->subordinate = max; pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max); } @@ -875,19 +837,19 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, /* Has only triggered on CardBus, fixup is in yenta_socket */ while (bus->parent) { - if ((child->busn_res.end > bus->busn_res.end) || - (child->number > bus->busn_res.end) || + if ((child->subordinate > bus->subordinate) || + (child->number > bus->subordinate) || (child->number < bus->number) || - (child->busn_res.end < bus->number)) { - dev_info(&child->dev, "%pR %s " - "hidden behind%s bridge %s %pR\n", - &child->busn_res, - (bus->number > child->busn_res.end && - bus->busn_res.end < child->number) ? + (child->subordinate < bus->number)) { + dev_info(&child->dev, "[bus %02x-%02x] %s " + "hidden behind%s bridge %s [bus %02x-%02x]\n", + child->number, child->subordinate, + (bus->number > child->subordinate && + bus->subordinate < child->number) ? "wholly" : "partially", bus->self->transparent ? " transparent" : "", dev_name(&bus->dev), - &bus->busn_res); + bus->number, bus->subordinate); } bus = bus->parent; } @@ -1586,7 +1548,7 @@ EXPORT_SYMBOL_GPL(pcie_bus_configure_settings); unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus) { - unsigned int devfn, pass, max = bus->busn_res.start; + unsigned int devfn, pass, max = bus->secondary; struct pci_dev *dev; dev_dbg(&bus->dev, "scanning bus\n"); @@ -1680,7 +1642,7 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus, /* Create legacy_io and legacy_mem files for this bus */ pci_create_legacy_files(b); - b->number = b->busn_res.start = bus; + b->number = b->secondary = bus; if (parent) dev_info(parent, "PCI host bridge to bus %s\n", dev_name(&b->dev)); @@ -1692,10 +1654,7 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus, list_move_tail(&window->list, &bridge->windows); res = window->res; offset = window->offset; - if (res->flags & IORESOURCE_BUS) - pci_bus_insert_busn_res(b, bus, res->end); - else - pci_bus_add_resource(b, res, 0); + pci_bus_add_resource(b, res, 0); if (offset) { if (resource_type(res) == IORESOURCE_IO) fmt = " (bus address [%#06llx-%#06llx])"; @@ -1725,104 +1684,16 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus, return NULL; } -int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int bus_max) -{ - struct resource *res = &b->busn_res; - struct resource *parent_res, *conflict; - - res->start = bus; - res->end = bus_max; - res->flags = IORESOURCE_BUS; - - if (!pci_is_root_bus(b)) - parent_res = &b->parent->busn_res; - else { - parent_res = get_pci_domain_busn_res(pci_domain_nr(b)); - res->flags |= IORESOURCE_PCI_FIXED; - } - - conflict = insert_resource_conflict(parent_res, res); - - if (conflict) - dev_printk(KERN_DEBUG, &b->dev, - "busn_res: can not insert %pR under %s%pR (conflicts with %s %pR)\n", - res, pci_is_root_bus(b) ? "domain " : "", - parent_res, conflict->name, conflict); - else - dev_printk(KERN_DEBUG, &b->dev, - "busn_res: %pR is inserted under %s%pR\n", - res, pci_is_root_bus(b) ? "domain " : "", - parent_res); - - return conflict == NULL; -} - -int pci_bus_update_busn_res_end(struct pci_bus *b, int bus_max) -{ - struct resource *res = &b->busn_res; - struct resource old_res = *res; - resource_size_t size; - int ret; - - if (res->start > bus_max) - return -EINVAL; - - size = bus_max - res->start + 1; - ret = adjust_resource(res, res->start, size); - dev_printk(KERN_DEBUG, &b->dev, - "busn_res: %pR end %s updated to %02x\n", - &old_res, ret ? "can not be" : "is", bus_max); - - if (!ret && !res->parent) - pci_bus_insert_busn_res(b, res->start, res->end); - - return ret; -} - -void pci_bus_release_busn_res(struct pci_bus *b) -{ - struct resource *res = &b->busn_res; - int ret; - - if (!res->flags || !res->parent) - return; - - ret = release_resource(res); - dev_printk(KERN_DEBUG, &b->dev, - "busn_res: %pR %s released\n", - res, ret ? "can not be" : "is"); -} - struct pci_bus * __devinit pci_scan_root_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata, struct list_head *resources) { - struct pci_host_bridge_window *window; - bool found = false; struct pci_bus *b; - int max; - - list_for_each_entry(window, resources, list) - if (window->res->flags & IORESOURCE_BUS) { - found = true; - break; - } b = pci_create_root_bus(parent, bus, ops, sysdata, resources); if (!b) return NULL; - if (!found) { - dev_info(&b->dev, - "No busn resource found for root bus, will use [bus %02x-ff]\n", - bus); - pci_bus_insert_busn_res(b, bus, 255); - } - - max = pci_scan_child_bus(b); - - if (!found) - pci_bus_update_busn_res_end(b, max); - + b->subordinate = pci_scan_child_bus(b); pci_bus_add_devices(b); return b; } @@ -1837,10 +1708,9 @@ struct pci_bus * __devinit pci_scan_bus_parented(struct device *parent, pci_add_resource(&resources, &ioport_resource); pci_add_resource(&resources, &iomem_resource); - pci_add_resource(&resources, &busn_resource); b = pci_create_root_bus(parent, bus, ops, sysdata, &resources); if (b) - pci_scan_child_bus(b); + b->subordinate = pci_scan_child_bus(b); else pci_free_resource_list(&resources); return b; @@ -1855,10 +1725,9 @@ struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops, pci_add_resource(&resources, &ioport_resource); pci_add_resource(&resources, &iomem_resource); - pci_add_resource(&resources, &busn_resource); b = pci_create_root_bus(NULL, bus, ops, sysdata, &resources); if (b) { - pci_scan_child_bus(b); + b->subordinate = pci_scan_child_bus(b); pci_bus_add_devices(b); } else { pci_free_resource_list(&resources); diff --git a/trunk/drivers/pci/quirks.c b/trunk/drivers/pci/quirks.c index 27e2c8f4ec73..2a7521677541 100644 --- a/trunk/drivers/pci/quirks.c +++ b/trunk/drivers/pci/quirks.c @@ -3179,87 +3179,3 @@ int pci_dev_specific_reset(struct pci_dev *dev, int probe) return -ENOTTY; } - -static struct pci_dev *pci_func_0_dma_source(struct pci_dev *dev) -{ - if (!PCI_FUNC(dev->devfn)) - return pci_dev_get(dev); - - return pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0)); -} - -static const struct pci_dev_dma_source { - u16 vendor; - u16 device; - struct pci_dev *(*dma_source)(struct pci_dev *dev); -} pci_dev_dma_source[] = { - /* - * https://bugzilla.redhat.com/show_bug.cgi?id=605888 - * - * Some Ricoh devices use the function 0 source ID for DMA on - * other functions of a multifunction device. The DMA devices - * is therefore function 0, which will have implications of the - * iommu grouping of these devices. - */ - { PCI_VENDOR_ID_RICOH, 0xe822, pci_func_0_dma_source }, - { PCI_VENDOR_ID_RICOH, 0xe230, pci_func_0_dma_source }, - { PCI_VENDOR_ID_RICOH, 0xe832, pci_func_0_dma_source }, - { PCI_VENDOR_ID_RICOH, 0xe476, pci_func_0_dma_source }, - { 0 } -}; - -/* - * IOMMUs with isolation capabilities need to be programmed with the - * correct source ID of a device. In most cases, the source ID matches - * the device doing the DMA, but sometimes hardware is broken and will - * tag the DMA as being sourced from a different device. This function - * allows that translation. Note that the reference count of the - * returned device is incremented on all paths. - */ -struct pci_dev *pci_get_dma_source(struct pci_dev *dev) -{ - const struct pci_dev_dma_source *i; - - for (i = pci_dev_dma_source; i->dma_source; i++) { - if ((i->vendor == dev->vendor || - i->vendor == (u16)PCI_ANY_ID) && - (i->device == dev->device || - i->device == (u16)PCI_ANY_ID)) - return i->dma_source(dev); - } - - return pci_dev_get(dev); -} - -static const struct pci_dev_acs_enabled { - u16 vendor; - u16 device; - int (*acs_enabled)(struct pci_dev *dev, u16 acs_flags); -} pci_dev_acs_enabled[] = { - { 0 } -}; - -int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags) -{ - const struct pci_dev_acs_enabled *i; - int ret; - - /* - * Allow devices that do not expose standard PCIe ACS capabilities - * or control to indicate their support here. Multi-function express - * devices which do not allow internal peer-to-peer between functions, - * but do not implement PCIe ACS may wish to return true here. - */ - for (i = pci_dev_acs_enabled; i->acs_enabled; i++) { - if ((i->vendor == dev->vendor || - i->vendor == (u16)PCI_ANY_ID) && - (i->device == dev->device || - i->device == (u16)PCI_ANY_ID)) { - ret = i->acs_enabled(dev, acs_flags); - if (ret >= 0) - return ret; - } - } - - return -ENOTTY; -} diff --git a/trunk/drivers/pci/remove.c b/trunk/drivers/pci/remove.c index 04a4861b4749..fd77e2bde2e8 100644 --- a/trunk/drivers/pci/remove.c +++ b/trunk/drivers/pci/remove.c @@ -68,7 +68,6 @@ void pci_remove_bus(struct pci_bus *pci_bus) down_write(&pci_bus_sem); list_del(&pci_bus->node); - pci_bus_release_busn_res(pci_bus); up_write(&pci_bus_sem); if (!pci_bus->is_added) return; diff --git a/trunk/drivers/pci/search.c b/trunk/drivers/pci/search.c index 993d4a0a2469..9d75dc8ca602 100644 --- a/trunk/drivers/pci/search.c +++ b/trunk/drivers/pci/search.c @@ -15,8 +15,6 @@ #include "pci.h" DECLARE_RWSEM(pci_bus_sem); -EXPORT_SYMBOL_GPL(pci_bus_sem); - /* * find the upstream PCIe-to-PCI bridge of a PCI device * if the device is PCIE, return NULL diff --git a/trunk/drivers/pci/setup-bus.c b/trunk/drivers/pci/setup-bus.c index 192172c87b77..8fa2d4be88de 100644 --- a/trunk/drivers/pci/setup-bus.c +++ b/trunk/drivers/pci/setup-bus.c @@ -404,8 +404,8 @@ void pci_setup_cardbus(struct pci_bus *bus) struct resource *res; struct pci_bus_region region; - dev_info(&bridge->dev, "CardBus bridge to %pR\n", - &bus->busn_res); + dev_info(&bridge->dev, "CardBus bridge to [bus %02x-%02x]\n", + bus->secondary, bus->subordinate); res = bus->resource[0]; pcibios_resource_to_bus(bridge, ®ion, res); @@ -553,8 +553,8 @@ static void __pci_setup_bridge(struct pci_bus *bus, unsigned long type) { struct pci_dev *bridge = bus->self; - dev_info(&bridge->dev, "PCI bridge to %pR\n", - &bus->busn_res); + dev_info(&bridge->dev, "PCI bridge to [bus %02x-%02x]\n", + bus->secondary, bus->subordinate); if (type & IORESOURCE_IO) pci_setup_bridge_io(bus); @@ -745,8 +745,8 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size, if (!size0 && !size1) { if (b_res->start || b_res->end) dev_info(&bus->self->dev, "disabling bridge window " - "%pR to %pR (unused)\n", b_res, - &bus->busn_res); + "%pR to [bus %02x-%02x] (unused)\n", b_res, + bus->secondary, bus->subordinate); b_res->flags = 0; return; } @@ -757,8 +757,8 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size, if (size1 > size0 && realloc_head) { add_to_list(realloc_head, bus->self, b_res, size1-size0, 4096); dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window " - "%pR to %pR add_size %lx\n", b_res, - &bus->busn_res, size1-size0); + "%pR to [bus %02x-%02x] add_size %lx\n", b_res, + bus->secondary, bus->subordinate, size1-size0); } } @@ -863,8 +863,8 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, if (!size0 && !size1) { if (b_res->start || b_res->end) dev_info(&bus->self->dev, "disabling bridge window " - "%pR to %pR (unused)\n", b_res, - &bus->busn_res); + "%pR to [bus %02x-%02x] (unused)\n", b_res, + bus->secondary, bus->subordinate); b_res->flags = 0; return 1; } @@ -874,8 +874,8 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, if (size1 > size0 && realloc_head) { add_to_list(realloc_head, bus->self, b_res, size1-size0, min_align); dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window " - "%pR to %pR add_size %llx\n", b_res, - &bus->busn_res, (unsigned long long)size1-size0); + "%pR to [bus %02x-%02x] add_size %llx\n", b_res, + bus->secondary, bus->subordinate, (unsigned long long)size1-size0); } return 1; } diff --git a/trunk/drivers/pcmcia/cardbus.c b/trunk/drivers/pcmcia/cardbus.c index 24caeaf50529..6e75153c5b4f 100644 --- a/trunk/drivers/pcmcia/cardbus.c +++ b/trunk/drivers/pcmcia/cardbus.c @@ -73,7 +73,7 @@ int __ref cb_alloc(struct pcmcia_socket *s) s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0)); pci_fixup_cardbus(bus); - max = bus->busn_res.start; + max = bus->secondary; for (pass = 0; pass < 2; pass++) list_for_each_entry(dev, &bus->devices, bus_list) if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || diff --git a/trunk/drivers/pcmcia/yenta_socket.c b/trunk/drivers/pcmcia/yenta_socket.c index 667678db1153..d07f9ac8c41d 100644 --- a/trunk/drivers/pcmcia/yenta_socket.c +++ b/trunk/drivers/pcmcia/yenta_socket.c @@ -1048,8 +1048,8 @@ static void yenta_config_init(struct yenta_socket *socket) config_writeb(socket, PCI_LATENCY_TIMER, 168); config_writel(socket, PCI_PRIMARY_BUS, (176 << 24) | /* sec. latency timer */ - ((unsigned int)dev->subordinate->busn_res.end << 16) | /* subordinate bus */ - ((unsigned int)dev->subordinate->busn_res.start << 8) | /* secondary bus */ + (dev->subordinate->subordinate << 16) | /* subordinate bus */ + (dev->subordinate->secondary << 8) | /* secondary bus */ dev->subordinate->primary); /* primary bus */ /* @@ -1086,14 +1086,14 @@ static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge) struct pci_bus *bridge_to_fix = cardbus_bridge->parent; /* Check bus numbers are already set up correctly: */ - if (bridge_to_fix->busn_res.end >= cardbus_bridge->busn_res.end) + if (bridge_to_fix->subordinate >= cardbus_bridge->subordinate) return; /* The subordinate number is ok, nothing to do */ if (!bridge_to_fix->parent) return; /* Root bridges are ok */ /* stay within the limits of the bus range of the parent: */ - upper_limit = bridge_to_fix->parent->busn_res.end; + upper_limit = bridge_to_fix->parent->subordinate; /* check the bus ranges of all silbling bridges to prevent overlap */ list_for_each(tmp, &bridge_to_fix->parent->children) { @@ -1104,36 +1104,36 @@ static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge) * current upper limit, set the new upper limit to * the bus number below the silbling's range: */ - if (silbling->busn_res.start > bridge_to_fix->busn_res.end - && silbling->busn_res.start <= upper_limit) - upper_limit = silbling->busn_res.start - 1; + if (silbling->secondary > bridge_to_fix->subordinate + && silbling->secondary <= upper_limit) + upper_limit = silbling->secondary - 1; } /* Show that the wanted subordinate number is not possible: */ - if (cardbus_bridge->busn_res.end > upper_limit) + if (cardbus_bridge->subordinate > upper_limit) dev_printk(KERN_WARNING, &cardbus_bridge->dev, "Upper limit for fixing this " "bridge's parent bridge: #%02x\n", upper_limit); /* If we have room to increase the bridge's subordinate number, */ - if (bridge_to_fix->busn_res.end < upper_limit) { + if (bridge_to_fix->subordinate < upper_limit) { /* use the highest number of the hidden bus, within limits */ unsigned char subordinate_to_assign = - min_t(int, cardbus_bridge->busn_res.end, upper_limit); + min(cardbus_bridge->subordinate, upper_limit); dev_printk(KERN_INFO, &bridge_to_fix->dev, "Raising subordinate bus# of parent " "bus (#%02x) from #%02x to #%02x\n", bridge_to_fix->number, - (int)bridge_to_fix->busn_res.end, subordinate_to_assign); + bridge_to_fix->subordinate, subordinate_to_assign); /* Save the new subordinate in the bus struct of the bridge */ - bridge_to_fix->busn_res.end = subordinate_to_assign; + bridge_to_fix->subordinate = subordinate_to_assign; /* and update the PCI config space with the new subordinate */ pci_write_config_byte(bridge_to_fix->self, - PCI_SUBORDINATE_BUS, bridge_to_fix->busn_res.end); + PCI_SUBORDINATE_BUS, bridge_to_fix->subordinate); } } diff --git a/trunk/drivers/xen/xen-pciback/conf_space.c b/trunk/drivers/xen/xen-pciback/conf_space.c index 46ae0f9f02ad..30d7be026c18 100644 --- a/trunk/drivers/xen/xen-pciback/conf_space.c +++ b/trunk/drivers/xen/xen-pciback/conf_space.c @@ -124,7 +124,7 @@ static inline u32 merge_value(u32 val, u32 new_val, u32 new_val_mask, return val; } -static int xen_pcibios_err_to_errno(int err) +static int pcibios_err_to_errno(int err) { switch (err) { case PCIBIOS_SUCCESSFUL: @@ -202,7 +202,7 @@ int xen_pcibk_config_read(struct pci_dev *dev, int offset, int size, pci_name(dev), size, offset, value); *ret_val = value; - return xen_pcibios_err_to_errno(err); + return pcibios_err_to_errno(err); } int xen_pcibk_config_write(struct pci_dev *dev, int offset, int size, u32 value) @@ -290,7 +290,7 @@ int xen_pcibk_config_write(struct pci_dev *dev, int offset, int size, u32 value) } } - return xen_pcibios_err_to_errno(err); + return pcibios_err_to_errno(err); } void xen_pcibk_config_free_dyn_fields(struct pci_dev *dev) diff --git a/trunk/include/linux/pci.h b/trunk/include/linux/pci.h index 35884f279bb8..b2bec26b7f0a 100644 --- a/trunk/include/linux/pci.h +++ b/trunk/include/linux/pci.h @@ -368,8 +368,6 @@ static inline int pci_channel_offline(struct pci_dev *pdev) return (pdev->error_state != pci_channel_io_normal); } -extern struct resource busn_resource; - struct pci_host_bridge_window { struct list_head list; struct resource *res; /* host bridge aperture (CPU address) */ @@ -421,7 +419,6 @@ struct pci_bus { struct list_head slots; /* list of slots on this bus */ struct resource *resource[PCI_BRIDGE_RESOURCE_NUM]; struct list_head resources; /* address space routed to this bus */ - struct resource busn_res; /* bus numbers routed to this bus */ struct pci_ops *ops; /* configuration access functions */ void *sysdata; /* hook for sys-specific extension */ @@ -429,6 +426,8 @@ struct pci_bus { unsigned char number; /* bus number */ unsigned char primary; /* number of primary bridge */ + unsigned char secondary; /* number of secondary bridge */ + unsigned char subordinate; /* max number of subordinate buses */ unsigned char max_bus_speed; /* enum pci_bus_speed */ unsigned char cur_bus_speed; /* enum pci_bus_speed */ @@ -475,32 +474,6 @@ static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; #define PCIBIOS_SET_FAILED 0x88 #define PCIBIOS_BUFFER_TOO_SMALL 0x89 -/* - * Translate above to generic errno for passing back through non-pci. - */ -static inline int pcibios_err_to_errno(int err) -{ - if (err <= PCIBIOS_SUCCESSFUL) - return err; /* Assume already errno */ - - switch (err) { - case PCIBIOS_FUNC_NOT_SUPPORTED: - return -ENOENT; - case PCIBIOS_BAD_VENDOR_ID: - return -EINVAL; - case PCIBIOS_DEVICE_NOT_FOUND: - return -ENODEV; - case PCIBIOS_BAD_REGISTER_NUMBER: - return -EFAULT; - case PCIBIOS_SET_FAILED: - return -EIO; - case PCIBIOS_BUFFER_TOO_SMALL: - return -ENOSPC; - } - - return -ENOTTY; -} - /* Low-level architecture-dependent routines */ struct pci_ops { @@ -695,9 +668,6 @@ struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata); struct pci_bus *pci_create_root_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata, struct list_head *resources); -int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax); -int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax); -void pci_bus_release_busn_res(struct pci_bus *b); struct pci_bus * __devinit pci_scan_root_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata, struct list_head *resources); @@ -744,6 +714,8 @@ enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev); int pci_find_capability(struct pci_dev *dev, int cap); int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); int pci_find_ext_capability(struct pci_dev *dev, int cap); +int pci_bus_find_ext_capability(struct pci_bus *bus, unsigned int devfn, + int cap); int pci_find_ht_capability(struct pci_dev *dev, int ht_cap); int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap); struct pci_bus *pci_find_next_bus(const struct pci_bus *from); @@ -805,14 +777,6 @@ static inline int pci_write_config_dword(const struct pci_dev *dev, int where, return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val); } -/* user-space driven config access */ -int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val); -int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val); -int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val); -int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val); -int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val); -int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val); - int __must_check pci_enable_device(struct pci_dev *dev); int __must_check pci_enable_device_io(struct pci_dev *dev); int __must_check pci_enable_device_mem(struct pci_dev *dev); @@ -911,7 +875,6 @@ enum pci_obff_signal_type { int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type); void pci_disable_obff(struct pci_dev *dev); -bool pci_ltr_supported(struct pci_dev *dev); int pci_enable_ltr(struct pci_dev *dev); void pci_disable_ltr(struct pci_dev *dev); int pci_set_ltr(struct pci_dev *dev, int snoop_lat_ns, int nosnoop_lat_ns); @@ -1368,9 +1331,6 @@ static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } -static inline struct pci_dev *pci_dev_get(struct pci_dev *dev) -{ return NULL; } - #define dev_is_pci(d) (false) #define dev_is_pf(d) (false) #define dev_num_vf(d) (0) @@ -1525,20 +1485,9 @@ enum pci_fixup_pass { #ifdef CONFIG_PCI_QUIRKS void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev); -struct pci_dev *pci_get_dma_source(struct pci_dev *dev); -int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags); #else static inline void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev) {} -static inline struct pci_dev *pci_get_dma_source(struct pci_dev *dev) -{ - return pci_dev_get(dev); -} -static inline int pci_dev_specific_acs_enabled(struct pci_dev *dev, - u16 acs_flags) -{ - return -ENOTTY; -} #endif void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen); @@ -1641,9 +1590,7 @@ static inline bool pci_is_pcie(struct pci_dev *dev) } void pci_request_acs(void); -bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags); -bool pci_acs_path_enabled(struct pci_dev *start, - struct pci_dev *end, u16 acs_flags); + #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */ #define PCI_VPD_LRDT_ID(x) (x | PCI_VPD_LRDT) diff --git a/trunk/include/linux/pci_regs.h b/trunk/include/linux/pci_regs.h index 526d2c4bc3a6..4b608f543412 100644 --- a/trunk/include/linux/pci_regs.h +++ b/trunk/include/linux/pci_regs.h @@ -26,7 +26,6 @@ * Under PCI, each device has 256 bytes of configuration address space, * of which the first 64 bytes are standardized as follows: */ -#define PCI_STD_HEADER_SIZEOF 64 #define PCI_VENDOR_ID 0x00 /* 16 bits */ #define PCI_DEVICE_ID 0x02 /* 16 bits */ #define PCI_COMMAND 0x04 /* 16 bits */ @@ -210,12 +209,9 @@ #define PCI_CAP_ID_SHPC 0x0C /* PCI Standard Hot-Plug Controller */ #define PCI_CAP_ID_SSVID 0x0D /* Bridge subsystem vendor/device ID */ #define PCI_CAP_ID_AGP3 0x0E /* AGP Target PCI-PCI bridge */ -#define PCI_CAP_ID_SECDEV 0x0F /* Secure Device */ #define PCI_CAP_ID_EXP 0x10 /* PCI Express */ #define PCI_CAP_ID_MSIX 0x11 /* MSI-X */ -#define PCI_CAP_ID_SATA 0x12 /* SATA Data/Index Conf. */ #define PCI_CAP_ID_AF 0x13 /* PCI Advanced Features */ -#define PCI_CAP_ID_MAX PCI_CAP_ID_AF #define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */ #define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */ #define PCI_CAP_SIZEOF 4 @@ -280,7 +276,6 @@ #define PCI_VPD_ADDR_MASK 0x7fff /* Address mask */ #define PCI_VPD_ADDR_F 0x8000 /* Write 0, 1 indicates completion */ #define PCI_VPD_DATA 4 /* 32-bits of data returned here */ -#define PCI_CAP_VPD_SIZEOF 8 /* Slot Identification */ @@ -302,10 +297,8 @@ #define PCI_MSI_ADDRESS_HI 8 /* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */ #define PCI_MSI_DATA_32 8 /* 16 bits of data for 32-bit devices */ #define PCI_MSI_MASK_32 12 /* Mask bits register for 32-bit devices */ -#define PCI_MSI_PENDING_32 16 /* Pending intrs for 32-bit devices */ #define PCI_MSI_DATA_64 12 /* 16 bits of data for 64-bit devices */ #define PCI_MSI_MASK_64 16 /* Mask bits register for 64-bit devices */ -#define PCI_MSI_PENDING_64 20 /* Pending intrs for 64-bit devices */ /* MSI-X registers */ #define PCI_MSIX_FLAGS 2 @@ -315,7 +308,6 @@ #define PCI_MSIX_TABLE 4 #define PCI_MSIX_PBA 8 #define PCI_MSIX_FLAGS_BIRMASK (7 << 0) -#define PCI_CAP_MSIX_SIZEOF 12 /* size of MSIX registers */ /* MSI-X entry's format */ #define PCI_MSIX_ENTRY_SIZE 16 @@ -346,7 +338,6 @@ #define PCI_AF_CTRL_FLR 0x01 #define PCI_AF_STATUS 5 #define PCI_AF_STATUS_TP 0x01 -#define PCI_CAP_AF_SIZEOF 6 /* size of AF registers */ /* PCI-X registers */ @@ -383,10 +374,6 @@ #define PCI_X_STATUS_SPL_ERR 0x20000000 /* Rcvd Split Completion Error Msg */ #define PCI_X_STATUS_266MHZ 0x40000000 /* 266 MHz capable */ #define PCI_X_STATUS_533MHZ 0x80000000 /* 533 MHz capable */ -#define PCI_X_ECC_CSR 8 /* ECC control and status */ -#define PCI_CAP_PCIX_SIZEOF_V0 8 /* size of registers for Version 0 */ -#define PCI_CAP_PCIX_SIZEOF_V1 24 /* size for Version 1 */ -#define PCI_CAP_PCIX_SIZEOF_V2 PCI_CAP_PCIX_SIZEOF_V1 /* Same for v2 */ /* PCI Bridge Subsystem ID registers */ @@ -475,7 +462,6 @@ #define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ #define PCI_EXP_LNKSTA_LBMS 0x4000 /* Link Bandwidth Management Status */ #define PCI_EXP_LNKSTA_LABS 0x8000 /* Link Autonomous Bandwidth Status */ -#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V1 20 /* v1 endpoints end here */ #define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ #define PCI_EXP_SLTCAP_ABP 0x00000001 /* Attention Button Present */ #define PCI_EXP_SLTCAP_PCP 0x00000002 /* Power Controller Present */ @@ -535,7 +521,6 @@ #define PCI_EXP_OBFF_MSGA_EN 0x2000 /* OBFF enable with Message type A */ #define PCI_EXP_OBFF_MSGB_EN 0x4000 /* OBFF enable with Message type B */ #define PCI_EXP_OBFF_WAKE_EN 0x6000 /* OBFF using WAKE# signaling */ -#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 44 /* v2 endpoints end here */ #define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ #define PCI_EXP_SLTCTL2 56 /* Slot Control 2 */ @@ -544,43 +529,23 @@ #define PCI_EXT_CAP_VER(header) ((header >> 16) & 0xf) #define PCI_EXT_CAP_NEXT(header) ((header >> 20) & 0xffc) -#define PCI_EXT_CAP_ID_ERR 0x01 /* Advanced Error Reporting */ -#define PCI_EXT_CAP_ID_VC 0x02 /* Virtual Channel Capability */ -#define PCI_EXT_CAP_ID_DSN 0x03 /* Device Serial Number */ -#define PCI_EXT_CAP_ID_PWR 0x04 /* Power Budgeting */ -#define PCI_EXT_CAP_ID_RCLD 0x05 /* Root Complex Link Declaration */ -#define PCI_EXT_CAP_ID_RCILC 0x06 /* Root Complex Internal Link Control */ -#define PCI_EXT_CAP_ID_RCEC 0x07 /* Root Complex Event Collector */ -#define PCI_EXT_CAP_ID_MFVC 0x08 /* Multi-Function VC Capability */ -#define PCI_EXT_CAP_ID_VC9 0x09 /* same as _VC */ -#define PCI_EXT_CAP_ID_RCRB 0x0A /* Root Complex RB? */ -#define PCI_EXT_CAP_ID_VNDR 0x0B /* Vendor Specific */ -#define PCI_EXT_CAP_ID_CAC 0x0C /* Config Access - obsolete */ -#define PCI_EXT_CAP_ID_ACS 0x0D /* Access Control Services */ -#define PCI_EXT_CAP_ID_ARI 0x0E /* Alternate Routing ID */ -#define PCI_EXT_CAP_ID_ATS 0x0F /* Address Translation Services */ -#define PCI_EXT_CAP_ID_SRIOV 0x10 /* Single Root I/O Virtualization */ -#define PCI_EXT_CAP_ID_MRIOV 0x11 /* Multi Root I/O Virtualization */ -#define PCI_EXT_CAP_ID_MCAST 0x12 /* Multicast */ -#define PCI_EXT_CAP_ID_PRI 0x13 /* Page Request Interface */ -#define PCI_EXT_CAP_ID_AMD_XXX 0x14 /* reserved for AMD */ -#define PCI_EXT_CAP_ID_REBAR 0x15 /* resizable BAR */ -#define PCI_EXT_CAP_ID_DPA 0x16 /* dynamic power alloc */ -#define PCI_EXT_CAP_ID_TPH 0x17 /* TPH request */ -#define PCI_EXT_CAP_ID_LTR 0x18 /* latency tolerance reporting */ -#define PCI_EXT_CAP_ID_SECPCI 0x19 /* Secondary PCIe */ -#define PCI_EXT_CAP_ID_PMUX 0x1A /* Protocol Multiplexing */ -#define PCI_EXT_CAP_ID_PASID 0x1B /* Process Address Space ID */ -#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PASID - -#define PCI_EXT_CAP_DSN_SIZEOF 12 -#define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40 +#define PCI_EXT_CAP_ID_ERR 1 +#define PCI_EXT_CAP_ID_VC 2 +#define PCI_EXT_CAP_ID_DSN 3 +#define PCI_EXT_CAP_ID_PWR 4 +#define PCI_EXT_CAP_ID_VNDR 11 +#define PCI_EXT_CAP_ID_ACS 13 +#define PCI_EXT_CAP_ID_ARI 14 +#define PCI_EXT_CAP_ID_ATS 15 +#define PCI_EXT_CAP_ID_SRIOV 16 +#define PCI_EXT_CAP_ID_PRI 19 +#define PCI_EXT_CAP_ID_LTR 24 +#define PCI_EXT_CAP_ID_PASID 27 /* Advanced Error Reporting */ #define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */ #define PCI_ERR_UNC_TRAIN 0x00000001 /* Training */ #define PCI_ERR_UNC_DLP 0x00000010 /* Data Link Protocol */ -#define PCI_ERR_UNC_SURPDN 0x00000020 /* Surprise Down */ #define PCI_ERR_UNC_POISON_TLP 0x00001000 /* Poisoned TLP */ #define PCI_ERR_UNC_FCP 0x00002000 /* Flow Control Protocol */ #define PCI_ERR_UNC_COMP_TIME 0x00004000 /* Completion Timeout */ @@ -590,11 +555,6 @@ #define PCI_ERR_UNC_MALF_TLP 0x00040000 /* Malformed TLP */ #define PCI_ERR_UNC_ECRC 0x00080000 /* ECRC Error Status */ #define PCI_ERR_UNC_UNSUP 0x00100000 /* Unsupported Request */ -#define PCI_ERR_UNC_ACSV 0x00200000 /* ACS Violation */ -#define PCI_ERR_UNC_INTN 0x00400000 /* internal error */ -#define PCI_ERR_UNC_MCBTLP 0x00800000 /* MC blocked TLP */ -#define PCI_ERR_UNC_ATOMEG 0x01000000 /* Atomic egress blocked */ -#define PCI_ERR_UNC_TLPPRE 0x02000000 /* TLP prefix blocked */ #define PCI_ERR_UNCOR_MASK 8 /* Uncorrectable Error Mask */ /* Same bits as above */ #define PCI_ERR_UNCOR_SEVER 12 /* Uncorrectable Error Severity */ @@ -605,9 +565,6 @@ #define PCI_ERR_COR_BAD_DLLP 0x00000080 /* Bad DLLP Status */ #define PCI_ERR_COR_REP_ROLL 0x00000100 /* REPLAY_NUM Rollover */ #define PCI_ERR_COR_REP_TIMER 0x00001000 /* Replay Timer Timeout */ -#define PCI_ERR_COR_ADV_NFAT 0x00002000 /* Advisory Non-Fatal */ -#define PCI_ERR_COR_INTERNAL 0x00004000 /* Corrected Internal */ -#define PCI_ERR_COR_LOG_OVER 0x00008000 /* Header Log Overflow */ #define PCI_ERR_COR_MASK 20 /* Correctable Error Mask */ /* Same bits as above */ #define PCI_ERR_CAP 24 /* Advanced Error Capabilities */ @@ -639,18 +596,12 @@ /* Virtual Channel */ #define PCI_VC_PORT_REG1 4 -#define PCI_VC_REG1_EVCC 0x7 /* extended vc count */ #define PCI_VC_PORT_REG2 8 -#define PCI_VC_REG2_32_PHASE 0x2 -#define PCI_VC_REG2_64_PHASE 0x4 -#define PCI_VC_REG2_128_PHASE 0x8 #define PCI_VC_PORT_CTRL 12 #define PCI_VC_PORT_STATUS 14 #define PCI_VC_RES_CAP 16 #define PCI_VC_RES_CTRL 20 #define PCI_VC_RES_STATUS 26 -#define PCI_CAP_VC_BASE_SIZEOF 0x10 -#define PCI_CAP_VC_PER_VC_SIZEOF 0x0C /* Power Budgeting */ #define PCI_PWR_DSR 4 /* Data Select Register */ @@ -663,7 +614,6 @@ #define PCI_PWR_DATA_RAIL(x) (((x) >> 18) & 7) /* Power Rail */ #define PCI_PWR_CAP 12 /* Capability */ #define PCI_PWR_CAP_BUDGET(x) ((x) & 1) /* Included in system budget */ -#define PCI_EXT_CAP_PWR_SIZEOF 16 /* * Hypertransport sub capability types @@ -696,8 +646,6 @@ #define HT_CAPTYPE_ERROR_RETRY 0xC0 /* Retry on error configuration */ #define HT_CAPTYPE_GEN3 0xD0 /* Generation 3 hypertransport configuration */ #define HT_CAPTYPE_PM 0xE0 /* Hypertransport powermanagement configuration */ -#define HT_CAP_SIZEOF_LONG 28 /* slave & primary */ -#define HT_CAP_SIZEOF_SHORT 24 /* host & secondary */ /* Alternative Routing-ID Interpretation */ #define PCI_ARI_CAP 0x04 /* ARI Capability Register */ @@ -708,7 +656,6 @@ #define PCI_ARI_CTRL_MFVC 0x0001 /* MFVC Function Groups Enable */ #define PCI_ARI_CTRL_ACS 0x0002 /* ACS Function Groups Enable */ #define PCI_ARI_CTRL_FG(x) (((x) >> 4) & 7) /* Function Group */ -#define PCI_EXT_CAP_ARI_SIZEOF 8 /* Address Translation Service */ #define PCI_ATS_CAP 0x04 /* ATS Capability Register */ @@ -718,7 +665,6 @@ #define PCI_ATS_CTRL_ENABLE 0x8000 /* ATS Enable */ #define PCI_ATS_CTRL_STU(x) ((x) & 0x1f) /* Smallest Translation Unit */ #define PCI_ATS_MIN_STU 12 /* shift of minimum STU block */ -#define PCI_EXT_CAP_ATS_SIZEOF 8 /* Page Request Interface */ #define PCI_PRI_CTRL 0x04 /* PRI control register */ @@ -730,7 +676,6 @@ #define PCI_PRI_STATUS_STOPPED 0x100 /* PRI Stopped */ #define PCI_PRI_MAX_REQ 0x08 /* PRI max reqs supported */ #define PCI_PRI_ALLOC_REQ 0x0c /* PRI max reqs allowed */ -#define PCI_EXT_CAP_PRI_SIZEOF 16 /* PASID capability */ #define PCI_PASID_CAP 0x04 /* PASID feature register */ @@ -740,7 +685,6 @@ #define PCI_PASID_CTRL_ENABLE 0x01 /* Enable bit */ #define PCI_PASID_CTRL_EXEC 0x02 /* Exec permissions Enable */ #define PCI_PASID_CTRL_PRIV 0x04 /* Priviledge Mode Enable */ -#define PCI_EXT_CAP_PASID_SIZEOF 8 /* Single Root I/O Virtualization */ #define PCI_SRIOV_CAP 0x04 /* SR-IOV Capabilities */ @@ -772,14 +716,12 @@ #define PCI_SRIOV_VFM_MI 0x1 /* Dormant.MigrateIn */ #define PCI_SRIOV_VFM_MO 0x2 /* Active.MigrateOut */ #define PCI_SRIOV_VFM_AV 0x3 /* Active.Available */ -#define PCI_EXT_CAP_SRIOV_SIZEOF 64 #define PCI_LTR_MAX_SNOOP_LAT 0x4 #define PCI_LTR_MAX_NOSNOOP_LAT 0x6 #define PCI_LTR_VALUE_MASK 0x000003ff #define PCI_LTR_SCALE_MASK 0x00001c00 #define PCI_LTR_SCALE_SHIFT 10 -#define PCI_EXT_CAP_LTR_SIZEOF 8 /* Access Control Service */ #define PCI_ACS_CAP 0x04 /* ACS Capability Register */ @@ -790,38 +732,7 @@ #define PCI_ACS_UF 0x10 /* Upstream Forwarding */ #define PCI_ACS_EC 0x20 /* P2P Egress Control */ #define PCI_ACS_DT 0x40 /* Direct Translated P2P */ -#define PCI_ACS_EGRESS_BITS 0x05 /* ACS Egress Control Vector Size */ #define PCI_ACS_CTRL 0x06 /* ACS Control Register */ #define PCI_ACS_EGRESS_CTL_V 0x08 /* ACS Egress Control Vector */ -#define PCI_VSEC_HDR 4 /* extended cap - vendor specific */ -#define PCI_VSEC_HDR_LEN_SHIFT 20 /* shift for length field */ - -/* sata capability */ -#define PCI_SATA_REGS 4 /* SATA REGs specifier */ -#define PCI_SATA_REGS_MASK 0xF /* location - BAR#/inline */ -#define PCI_SATA_REGS_INLINE 0xF /* REGS in config space */ -#define PCI_SATA_SIZEOF_SHORT 8 -#define PCI_SATA_SIZEOF_LONG 16 - -/* resizable BARs */ -#define PCI_REBAR_CTRL 8 /* control register */ -#define PCI_REBAR_CTRL_NBAR_MASK (7 << 5) /* mask for # bars */ -#define PCI_REBAR_CTRL_NBAR_SHIFT 5 /* shift for # bars */ - -/* dynamic power allocation */ -#define PCI_DPA_CAP 4 /* capability register */ -#define PCI_DPA_CAP_SUBSTATE_MASK 0x1F /* # substates - 1 */ -#define PCI_DPA_BASE_SIZEOF 16 /* size with 0 substates */ - -/* TPH Requester */ -#define PCI_TPH_CAP 4 /* capability register */ -#define PCI_TPH_CAP_LOC_MASK 0x600 /* location mask */ -#define PCI_TPH_LOC_NONE 0x000 /* no location */ -#define PCI_TPH_LOC_CAP 0x200 /* in capability */ -#define PCI_TPH_LOC_MSIX 0x400 /* in MSI-X */ -#define PCI_TPH_CAP_ST_MASK 0x07FF0000 /* st table mask */ -#define PCI_TPH_CAP_ST_SHIFT 16 /* st table shift */ -#define PCI_TPH_BASE_SIZEOF 12 /* size with no st table */ - #endif /* LINUX_PCI_REGS_H */ diff --git a/trunk/kernel/resource.c b/trunk/kernel/resource.c index dc8b47764443..e1d2b8ee76d5 100644 --- a/trunk/kernel/resource.c +++ b/trunk/kernel/resource.c @@ -722,12 +722,14 @@ int adjust_resource(struct resource *res, resource_size_t start, resource_size_t write_lock(&resource_lock); - if (!parent) - goto skip; - if ((start < parent->start) || (end > parent->end)) goto out; + for (tmp = res->child; tmp; tmp = tmp->sibling) { + if ((tmp->start < start) || (tmp->end > end)) + goto out; + } + if (res->sibling && (res->sibling->start <= end)) goto out; @@ -739,11 +741,6 @@ int adjust_resource(struct resource *res, resource_size_t start, resource_size_t goto out; } -skip: - for (tmp = res->child; tmp; tmp = tmp->sibling) - if ((tmp->start < start) || (tmp->end > end)) - goto out; - res->start = start; res->end = end; result = 0;