From 5e818dcb94f5004623bda439f0a3761f52a9fbb2 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Mon, 14 Jan 2008 14:46:31 +0000 Subject: [PATCH] --- yaml --- r: 75477 b: refs/heads/master c: 2e4f95822cc17cb7095d50babe2d2fc4c043fa25 h: refs/heads/master i: 75475: 30f79c23e027389a18e4c6f7bf2bf79ca2427585 v: v3 --- [refs] | 2 +- trunk/include/asm-mips/cacheops.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 0806c03b51db..c04fa171593a 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: c43756da94863395d5ee088659676029b3ae7191 +refs/heads/master: 2e4f95822cc17cb7095d50babe2d2fc4c043fa25 diff --git a/trunk/include/asm-mips/cacheops.h b/trunk/include/asm-mips/cacheops.h index df7f2deb3b56..256ad2cc6eb8 100644 --- a/trunk/include/asm-mips/cacheops.h +++ b/trunk/include/asm-mips/cacheops.h @@ -64,7 +64,7 @@ #define Page_Invalidate_T 0x16 /* - * R1000-specific cacheops + * R10000-specific cacheops * * Cacheops 0x02, 0x06, 0x0a, 0x0c-0x0e, 0x16, 0x1a and 0x1e are unused. * Most of the _S cacheops are identical to the R4000SC _SD cacheops.