From 5e85a5d50f427dbc83171fc573f33b049094a4c5 Mon Sep 17 00:00:00 2001 From: H Hartley Sweeten Date: Tue, 26 Mar 2013 15:00:59 -0700 Subject: [PATCH] --- yaml --- r: 363799 b: refs/heads/master c: 4541b38175c0b25488599c865c918723c560fa34 h: refs/heads/master i: 363797: e5f04212f9dd3b231a86c755013c809227bce652 363795: a8ad0b10113512fc6292afb357f7ca8f72566223 363791: 110974678a7aa02fafc8218f8e4ac988c548f004 v: v3 --- [refs] | 2 +- trunk/drivers/staging/comedi/drivers/rtd520.c | 19 ++++++------------- 2 files changed, 7 insertions(+), 14 deletions(-) diff --git a/[refs] b/[refs] index 30aa28dc88fa..feddc94f4936 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 360235af62177406ae6132c0bead2d45306f26d4 +refs/heads/master: 4541b38175c0b25488599c865c918723c560fa34 diff --git a/trunk/drivers/staging/comedi/drivers/rtd520.c b/trunk/drivers/staging/comedi/drivers/rtd520.c index 43b8cebf89dd..a476a436eb7a 100644 --- a/trunk/drivers/staging/comedi/drivers/rtd520.c +++ b/trunk/drivers/staging/comedi/drivers/rtd520.c @@ -414,7 +414,6 @@ struct rtdPrivate { /* shadow registers affect other registers, but can't be read back */ /* The macros below update these on writes */ - u16 intMask; /* interrupt mask */ u16 intClearMask; /* interrupt clear mask */ u8 utcCtrl[4]; /* crtl mode for 3 utc + read back */ unsigned fifoLen; @@ -799,8 +798,7 @@ static irqreturn_t rtd_interrupt(int irq, /* interrupt number (ignored) */ writel(0, devpriv->las0 + LAS0_PACER_STOP); writel(0, devpriv->las0 + LAS0_PACER); /* stop pacer */ writel(0, devpriv->las0 + LAS0_ADC_CONVERSION); - devpriv->intMask = 0; - writew(devpriv->intMask, devpriv->las0 + LAS0_IT); + writew(0, devpriv->las0 + LAS0_IT); if (devpriv->aiCount > 0) { /* there shouldn't be anything left */ fifoStatus = readl(devpriv->las0 + LAS0_ADC); @@ -998,8 +996,7 @@ static int rtd_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) writel(0, devpriv->las0 + LAS0_PACER_STOP); writel(0, devpriv->las0 + LAS0_PACER); /* stop pacer */ writel(0, devpriv->las0 + LAS0_ADC_CONVERSION); - devpriv->intMask = 0; - writew(devpriv->intMask, devpriv->las0 + LAS0_IT); + writew(0, devpriv->las0 + LAS0_IT); writel(0, devpriv->las0 + LAS0_ADC_FIFO_CLEAR); writel(0, devpriv->las0 + LAS0_OVERRUN); @@ -1131,11 +1128,9 @@ static int rtd_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) /* TODO: allow multiple interrupt sources */ if (devpriv->transCount > 0) { /* transfer every N samples */ - devpriv->intMask = IRQM_ADC_ABOUT_CNT; - writew(devpriv->intMask, devpriv->las0 + LAS0_IT); + writew(IRQM_ADC_ABOUT_CNT, devpriv->las0 + LAS0_IT); } else { /* 1/2 FIFO transfers */ - devpriv->intMask = IRQM_ADC_ABOUT_CNT; - writew(devpriv->intMask, devpriv->las0 + LAS0_IT); + writew(IRQM_ADC_ABOUT_CNT, devpriv->las0 + LAS0_IT); } /* BUG: start_src is ASSUMED to be TRIG_NOW */ @@ -1157,8 +1152,7 @@ static int rtd_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s) writel(0, devpriv->las0 + LAS0_PACER_STOP); writel(0, devpriv->las0 + LAS0_PACER); /* stop pacer */ writel(0, devpriv->las0 + LAS0_ADC_CONVERSION); - devpriv->intMask = 0; - writew(devpriv->intMask, devpriv->las0 + LAS0_IT); + writew(0, devpriv->las0 + LAS0_IT); devpriv->aiCount = 0; /* stop and don't transfer any more */ status = readw(devpriv->las0 + LAS0_IT); overrun = readl(devpriv->las0 + LAS0_OVERRUN) & 0xffff; @@ -1313,8 +1307,7 @@ static void rtd_reset(struct comedi_device *dev) writel(0, devpriv->las0 + LAS0_BOARD_RESET); udelay(100); /* needed? */ writel(0, devpriv->lcfg + PLX_INTRCS_REG); - devpriv->intMask = 0; - writew(devpriv->intMask, devpriv->las0 + LAS0_IT); + writew(0, devpriv->las0 + LAS0_IT); devpriv->intClearMask = ~0; writew(devpriv->intClearMask, devpriv->las0 + LAS0_CLEAR); readw(devpriv->las0 + LAS0_CLEAR);