From 611a55d6f5ea2734cc67a3aa78ceb09e54cd89fa Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Tue, 16 Feb 2010 11:28:36 -0500 Subject: [PATCH] --- yaml --- r: 185582 b: refs/heads/master c: 71b10d8762b2a548c4ac2e4461b46d9b205a5c77 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/radeon/r600_cs.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 0244c67d7294..a412dd057658 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 6cb8e1f71c407930f0f07feceeea1da73881038b +refs/heads/master: 71b10d8762b2a548c4ac2e4461b46d9b205a5c77 diff --git a/trunk/drivers/gpu/drm/radeon/r600_cs.c b/trunk/drivers/gpu/drm/radeon/r600_cs.c index 00e69c585fbf..cd2c63bce501 100644 --- a/trunk/drivers/gpu/drm/radeon/r600_cs.c +++ b/trunk/drivers/gpu/drm/radeon/r600_cs.c @@ -163,7 +163,7 @@ static void r600_cs_track_init(struct r600_cs_track *track) static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i) { struct r600_cs_track *track = p->track; - u32 bpe, pitch, slice_tile_max, size, tmp, height; + u32 bpe = 0, pitch, slice_tile_max, size, tmp, height; volatile u32 *ib = p->ib->ptr; if (G_0280A0_TILE_MODE(track->cb_color_info[i])) { @@ -935,7 +935,7 @@ static inline int r600_check_texture_resource(struct radeon_cs_parser *p, u32 i struct radeon_bo *texture, struct radeon_bo *mipmap) { - u32 nfaces, nlevels, blevel, w0, h0, d0, bpe; + u32 nfaces, nlevels, blevel, w0, h0, d0, bpe = 0; u32 word0, word1, l0_size, mipmap_size; /* on legacy kernel we don't perform advanced check */