From 622ab7ca32db5b90fbe066d0aca540127d5b8b30 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Wed, 31 Mar 2010 13:38:56 +1000 Subject: [PATCH] --- yaml --- r: 189371 b: refs/heads/master c: 9e5786bd14cb9ffe29ebe66d41cedf03311b0d30 h: refs/heads/master i: 189369: 21785152aefe09c1875d2c79f685839920cb5468 189367: 7a867eda8621d58e80a7190ec494ae5bee49c633 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/radeon/r100.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index e06ae4b4e01d..a2306ab8a174 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: fb668c2fed628179c7aa409a0de39a2b96bed18c +refs/heads/master: 9e5786bd14cb9ffe29ebe66d41cedf03311b0d30 diff --git a/trunk/drivers/gpu/drm/radeon/r100.c b/trunk/drivers/gpu/drm/radeon/r100.c index 138ddd49dfc5..c8f4b0300b70 100644 --- a/trunk/drivers/gpu/drm/radeon/r100.c +++ b/trunk/drivers/gpu/drm/radeon/r100.c @@ -744,6 +744,8 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size) udelay(10); rdev->cp.rptr = RREG32(RADEON_CP_RB_RPTR); rdev->cp.wptr = RREG32(RADEON_CP_RB_WPTR); + /* protect against crazy HW on resume */ + rdev->cp.wptr &= rdev->cp.ptr_mask; /* Set cp mode to bus mastering & enable cp*/ WREG32(RADEON_CP_CSQ_MODE, REG_SET(RADEON_INDIRECT2_START, indirect2_start) |