From 629e2e43dd2fe5984680d7f297b101109c711591 Mon Sep 17 00:00:00 2001 From: Chao Xie Date: Mon, 6 Dec 2010 07:01:10 +0100 Subject: [PATCH] --- yaml --- r: 222960 b: refs/heads/master c: 87507500b7fc3620e467abb617a3452f0cccc72d h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/common/gic.c | 8 +++++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 3378fff9842b..5a71f4d929ec 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a5542a0f9aca5588a0afd0489c26d858405bfecb +refs/heads/master: 87507500b7fc3620e467abb617a3452f0cccc72d diff --git a/trunk/arch/arm/common/gic.c b/trunk/arch/arm/common/gic.c index fea1bd7249b6..e6388dcd8cfa 100644 --- a/trunk/arch/arm/common/gic.c +++ b/trunk/arch/arm/common/gic.c @@ -146,9 +146,15 @@ static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val) unsigned int shift = (irq % 4) * 8; unsigned int cpu = cpumask_first(mask_val); u32 val; + struct irq_desc *desc; spin_lock(&irq_controller_lock); - irq_desc[irq].node = cpu; + desc = irq_to_desc(irq); + if (desc == NULL) { + spin_unlock(&irq_controller_lock); + return -EINVAL; + } + desc->node = cpu; val = readl(reg) & ~(0xff << shift); val |= 1 << (cpu + shift); writel(val, reg);