From 642e4becc2068f5d4a72ea9e15cc54bbd40a0fe7 Mon Sep 17 00:00:00 2001
From: Jesse Barnes <jbarnes@virtuousgeek.org>
Date: Thu, 7 Oct 2010 16:01:17 -0700
Subject: [PATCH] --- yaml --- r: 218295 b: refs/heads/master c:
 1cb1b75e5e0120cc35c4a9420ce366b84e0cf951 h: refs/heads/master i:   218293:
 0fa69b87fee068880e96e4d0a087a0f93510d906   218291:
 1af5bebe3c3b66bfc74d6e07295e97ecc1981f87   218287:
 56785c3deb9dcc1b3c7e623b1ba3052ac5a964db v: v3

---
 [refs]                                     | 2 +-
 trunk/drivers/gpu/drm/i915/intel_display.c | 3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/[refs] b/[refs]
index 43b358a9ef10..9dd6ec49d218 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 7f8232826842b27525857615262f50fe66c84dd7
+refs/heads/master: 1cb1b75e5e0120cc35c4a9420ce366b84e0cf951
diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c
index d7d59006a846..5f00632d6fcc 100644
--- a/trunk/drivers/gpu/drm/i915/intel_display.c
+++ b/trunk/drivers/gpu/drm/i915/intel_display.c
@@ -3625,7 +3625,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
 			      refclk / 1000);
 	} else if (!IS_GEN2(dev)) {
 		refclk = 96000;
-		if (HAS_PCH_SPLIT(dev))
+		if (HAS_PCH_SPLIT(dev) &&
+		    (!has_edp_encoder || intel_encoder_is_pch_edp(&has_edp_encoder->base)))
 			refclk = 120000; /* 120Mhz refclk */
 	} else {
 		refclk = 48000;