From 64ae3fe84ffb224835ab2dcbc5545d3d40733c5f Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Sat, 13 Aug 2011 12:55:36 +0900 Subject: [PATCH] --- yaml --- r: 263563 b: refs/heads/master c: 3f6065dd9d2c947c8d68336f07bd721d3909a30d h: refs/heads/master i: 263561: f9e9fc64a9bfb3f3bee1c315de5d454bf640c1c7 263559: 8fc044807fc2f3c483b05bea097e26b78f23bf84 v: v3 --- [refs] | 2 +- trunk/arch/arm/plat-s5p/irq-gpioint.c | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 93b38fb7ddce..2244b2348018 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 70b0e82bc7d03d33de5bceea92d419a9be4340ee +refs/heads/master: 3f6065dd9d2c947c8d68336f07bd721d3909a30d diff --git a/trunk/arch/arm/plat-s5p/irq-gpioint.c b/trunk/arch/arm/plat-s5p/irq-gpioint.c index 327ab9f662e8..f71078ef6bb5 100644 --- a/trunk/arch/arm/plat-s5p/irq-gpioint.c +++ b/trunk/arch/arm/plat-s5p/irq-gpioint.c @@ -23,6 +23,8 @@ #include #include +#include + #define GPIO_BASE(chip) (((unsigned long)(chip)->base) & 0xFFFFF000u) #define CON_OFFSET 0x700 @@ -81,6 +83,9 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc) int group, pend_offset, mask_offset; unsigned int pend, mask; + struct irq_chip *chip = irq_get_chip(irq); + chained_irq_enter(chip, desc); + for (group = 0; group < bank->nr_groups; group++) { struct s3c_gpio_chip *chip = bank->chips[group]; if (!chip) @@ -102,6 +107,7 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc) pend &= ~BIT(offset); } } + chained_irq_exit(chip, desc); } static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)