From 65529f20bf4a1fdb829c755b5039e329f0bad8f2 Mon Sep 17 00:00:00 2001 From: Arnd Hannemann Date: Fri, 10 Sep 2010 18:54:20 +0200 Subject: [PATCH] --- yaml --- r: 220592 b: refs/heads/master c: 68accd7370a90b899ea6563ba9032e5a102ec1b5 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-shmobile/board-ap4evb.c | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 1b21ad498978..dbc8c6ab8766 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 777271d0f33da306575ef776c75f66fc27246bf0 +refs/heads/master: 68accd7370a90b899ea6563ba9032e5a102ec1b5 diff --git a/trunk/arch/arm/mach-shmobile/board-ap4evb.c b/trunk/arch/arm/mach-shmobile/board-ap4evb.c index 14923989ea05..22a2b44ddb7b 100644 --- a/trunk/arch/arm/mach-shmobile/board-ap4evb.c +++ b/trunk/arch/arm/mach-shmobile/board-ap4evb.c @@ -235,6 +235,18 @@ static struct platform_device smc911x_device = { }, }; +/* + * The card detect pin of the top SD/MMC slot (CN7) is active low and is + * connected to GPIO A22 of SH7372 (GPIO_PORT41). + */ +static int slot_cn7_get_cd(struct platform_device *pdev) +{ + if (gpio_is_valid(GPIO_PORT41)) + return !gpio_get_value(GPIO_PORT41); + else + return -ENXIO; +} + /* SH_MMCIF */ static struct resource sh_mmcif_resources[] = { [0] = { @@ -261,6 +273,7 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = { .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA | MMC_CAP_NEEDS_POLL, + .get_cd = slot_cn7_get_cd, }; static struct platform_device sh_mmcif_device = { @@ -310,6 +323,8 @@ static struct sh_mobile_sdhi_info sdhi1_info = { .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, .tmio_ocr_mask = MMC_VDD_165_195, .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE, + .tmio_caps = MMC_CAP_NEEDS_POLL, + .get_cd = slot_cn7_get_cd, }; static struct resource sdhi1_resources[] = { @@ -948,6 +963,10 @@ static void __init ap4evb_init(void) gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */ gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */ + /* card detect pin for MMC slot (CN7) */ + gpio_request(GPIO_PORT41, NULL); + gpio_direction_input(GPIO_PORT41); + /* set SPU2 clock to 119.6 MHz */ clk = clk_get(NULL, "spu_clk"); if (!IS_ERR(clk)) {