From 66a7ac942540ed98e368701f418d4b5404a0ff93 Mon Sep 17 00:00:00 2001
From: Stephen Warren <swarren@nvidia.com>
Date: Mon, 12 Nov 2012 12:51:22 -0700
Subject: [PATCH] --- yaml --- r: 342264 b: refs/heads/master c:
 fea221e254e9842df0740688f30f1ce5a692a775 h: refs/heads/master v: v3

---
 [refs]                                        |  2 +-
 trunk/arch/arm/boot/dts/tegra20-trimslice.dts | 10 ++++++++++
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 2bdbe2f03d61..4d463928ff88 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: fa98a114bf0d1623d502b1ae1e9963ef97808214
+refs/heads/master: fea221e254e9842df0740688f30f1ce5a692a775
diff --git a/trunk/arch/arm/boot/dts/tegra20-trimslice.dts b/trunk/arch/arm/boot/dts/tegra20-trimslice.dts
index 27fb8a67ea42..f4e0428eb737 100644
--- a/trunk/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/trunk/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -254,6 +254,16 @@
 		clock-frequency = <400000>;
 	};
 
+	spi@7000c380 {
+		status = "okay";
+		spi-max-frequency = <48000000>;
+		spi-flash@0 {
+			compatible = "winbond,w25q80bl";
+			reg = <0>;
+			spi-max-frequency = <48000000>;
+		};
+	};
+
 	i2c@7000c400 {
 		status = "okay";
 		clock-frequency = <400000>;