From 682ea44c839cd9c050309151e428e8a910e26f96 Mon Sep 17 00:00:00 2001 From: Guillaume Thouvenin Date: Sat, 21 Jul 2007 17:10:59 +0200 Subject: [PATCH] --- yaml --- r: 62413 b: refs/heads/master c: 05b48ea61c900115add991427f52ee5eacf361a8 h: refs/heads/master i: 62411: 473c5b84783ee2af98f3d7cfdd06c652a255e493 v: v3 --- [refs] | 2 +- trunk/arch/x86_64/kernel/pci-calgary.c | 5 ----- 2 files changed, 1 insertion(+), 6 deletions(-) diff --git a/[refs] b/[refs] index ebd51bb52e42..bbe367b0d579 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 07877cf6fd559cbdced7ad4c15ab225a552ab692 +refs/heads/master: 05b48ea61c900115add991427f52ee5eacf361a8 diff --git a/trunk/arch/x86_64/kernel/pci-calgary.c b/trunk/arch/x86_64/kernel/pci-calgary.c index b32d5797208f..6f5b9f88e7aa 100644 --- a/trunk/arch/x86_64/kernel/pci-calgary.c +++ b/trunk/arch/x86_64/kernel/pci-calgary.c @@ -52,11 +52,6 @@ int use_calgary __read_mostly = 0; #define PCI_DEVICE_ID_IBM_CALGARY 0x02a1 #define PCI_DEVICE_ID_IBM_CALIOC2 0x0308 -/* we need these for register space address calculation */ -#define START_ADDRESS 0xfe000000 -#define CHASSIS_BASE 0 -#define ONE_BASED_CHASSIS_NUM 1 - /* register offsets inside the host bridge space */ #define CALGARY_CONFIG_REG 0x0108 #define PHB_CSR_OFFSET 0x0110 /* Channel Status */