From 6843cddf6bf95ef8a76e575494e18c8e1c2acd87 Mon Sep 17 00:00:00 2001 From: Robert Richter Date: Tue, 16 Aug 2011 23:39:53 +0200 Subject: [PATCH] --- yaml --- r: 269008 b: refs/heads/master c: 298557db42eb2d6efca81669dc369425b46c5be6 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/x86/oprofile/op_model_ppro.c | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 568199aa7892..36c0a744a646 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 1d12d35284b74b7257b84ba0cef1e82a66d73aea +refs/heads/master: 298557db42eb2d6efca81669dc369425b46c5be6 diff --git a/trunk/arch/x86/oprofile/op_model_ppro.c b/trunk/arch/x86/oprofile/op_model_ppro.c index 608874b70cf4..d90528ea5412 100644 --- a/trunk/arch/x86/oprofile/op_model_ppro.c +++ b/trunk/arch/x86/oprofile/op_model_ppro.c @@ -140,7 +140,6 @@ static int ppro_check_ctrs(struct pt_regs * const regs, wrmsrl(msrs->counters[i].addr, -reset_value[i]); } -out: /* Only P6 based Pentium M need to re-unmask the apic vector but it * doesn't hurt other P6 variant */ apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED); @@ -220,7 +219,7 @@ static void arch_perfmon_setup_counters(void) eax.split.bit_width = 40; } - num_counters = eax.split.num_counters; + num_counters = min((int)eax.split.num_counters, OP_MAX_COUNTER); op_arch_perfmon_spec.num_counters = num_counters; op_arch_perfmon_spec.num_controls = num_counters;