From 684f09ea419bfc58197a05e136209de717ef40b6 Mon Sep 17 00:00:00 2001 From: "Rafael J. Wysocki" Date: Thu, 22 Jan 2009 23:39:57 +0100 Subject: [PATCH] --- yaml --- r: 130799 b: refs/heads/master c: 476e7faefc43f106a90b5c96166c59b75de19d30 h: refs/heads/master i: 130797: 4355b0e8639a194267ea51e7ab1b6ec544d446e5 130795: 2b5a08d38c8245a1abec718545a88fa17e0cbbee 130791: d1738709eed901bd15dfecc3a79419d9e06d83b4 130783: 719f019bd5af7a857c21d1c331edd8df8e13b5c7 v: v3 --- [refs] | 2 +- trunk/drivers/pci/pci.c | 26 +++++++++++++------------- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/[refs] b/[refs] index 62cc18566369..443e94882d44 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 48f67f54a53bb68619a63c3f38cf7f502ed74b1d +refs/heads/master: 476e7faefc43f106a90b5c96166c59b75de19d30 diff --git a/trunk/drivers/pci/pci.c b/trunk/drivers/pci/pci.c index f0aa3d533839..48807556b47a 100644 --- a/trunk/drivers/pci/pci.c +++ b/trunk/drivers/pci/pci.c @@ -1403,19 +1403,19 @@ int pci_restore_standard_config(struct pci_dev *dev) if (error) return error; - if (pci_is_bridge(dev)) { - if (prev_state > PCI_D1) - mdelay(PCI_PM_BUS_WAIT); - } else { - switch(prev_state) { - case PCI_D3cold: - case PCI_D3hot: - mdelay(pci_pm_d3_delay); - break; - case PCI_D2: - udelay(PCI_PM_D2_DELAY); - break; - } + /* + * This assumes that we won't get a bus in B2 or B3 from the BIOS, but + * we've made this assumption forever and it appears to be universally + * satisfied. + */ + switch(prev_state) { + case PCI_D3cold: + case PCI_D3hot: + mdelay(pci_pm_d3_delay); + break; + case PCI_D2: + udelay(PCI_PM_D2_DELAY); + break; } dev->current_state = PCI_D0;