From 691406a9b2e1bf0c273387e281b9667e9fdf98ea Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Tue, 24 Aug 2010 16:07:16 +0100 Subject: [PATCH] --- yaml --- r: 217940 b: refs/heads/master c: b7ac36dadafa69214faa75a34844d56bd0c14e89 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_tv.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index bde2a2b51966..fa2787d1e992 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a95735569312f2ab0c80425e2cd1e5cb0b4e1870 +refs/heads/master: b7ac36dadafa69214faa75a34844d56bd0c14e89 diff --git a/trunk/drivers/gpu/drm/i915/intel_tv.c b/trunk/drivers/gpu/drm/i915/intel_tv.c index 4a6534239fa3..d4066729f27b 100644 --- a/trunk/drivers/gpu/drm/i915/intel_tv.c +++ b/trunk/drivers/gpu/drm/i915/intel_tv.c @@ -1164,7 +1164,7 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, I915_WRITE(pipeconf_reg, pipeconf & ~PIPEACONF_ENABLE); /* Wait for vblank for the disable to take effect. */ - intel_wait_for_vblank(dev, intel_crtc->pipe); + intel_wait_for_vblank_off(dev, intel_crtc->pipe); /* Filter ctl must be set before TV_WIN_SIZE */ I915_WRITE(TV_FILTER_CTL_1, TV_AUTO_SCALE);