From 6979396bc7eb18b5bcc2a738b84627d213ddcf6c Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Mon, 17 Sep 2012 06:03:38 -0300 Subject: [PATCH] --- yaml --- r: 333798 b: refs/heads/master c: 65214a8603e3ec3b1c2bc4104e6806e7cf6d23ed h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/media/platform/s5p-fimc/mipi-csis.c | 4 +++- trunk/include/linux/platform_data/mipi-csis.h | 4 +++- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index d4905125bb11..590f5ebe259d 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 09ff034047cb3846090215358f20e0e94c60b901 +refs/heads/master: 65214a8603e3ec3b1c2bc4104e6806e7cf6d23ed diff --git a/trunk/drivers/media/platform/s5p-fimc/mipi-csis.c b/trunk/drivers/media/platform/s5p-fimc/mipi-csis.c index 983e81f08cd6..4c961b1b68e6 100644 --- a/trunk/drivers/media/platform/s5p-fimc/mipi-csis.c +++ b/trunk/drivers/media/platform/s5p-fimc/mipi-csis.c @@ -322,8 +322,10 @@ static void s5pcsis_set_params(struct csis_state *state) val |= S5PCSIS_CTRL_ALIGN_32BIT; else /* 24-bits */ val &= ~S5PCSIS_CTRL_ALIGN_32BIT; - /* Not using external clock. */ + val &= ~S5PCSIS_CTRL_WCLK_EXTCLK; + if (pdata->wclk_source) + val |= S5PCSIS_CTRL_WCLK_EXTCLK; s5pcsis_write(state, S5PCSIS_CTRL, val); /* Update the shadow register. */ diff --git a/trunk/include/linux/platform_data/mipi-csis.h b/trunk/include/linux/platform_data/mipi-csis.h index 8b703e1eeddf..bf34e17cee7f 100644 --- a/trunk/include/linux/platform_data/mipi-csis.h +++ b/trunk/include/linux/platform_data/mipi-csis.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd. + * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd. * * Samsung S5P/Exynos SoC series MIPI CSIS device support * @@ -14,11 +14,13 @@ /** * struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver * @clk_rate: bus clock frequency + * @wclk_source: CSI wrapper clock selection: 0 - bus clock, 1 - ext. SCLK_CAM * @lanes: number of data lanes used * @hs_settle: HS-RX settle time */ struct s5p_platform_mipi_csis { unsigned long clk_rate; + u8 wclk_source; u8 lanes; u8 hs_settle; };