From 69a334b62183856e9f462d125bc8b29d465682af Mon Sep 17 00:00:00 2001 From: Andreas Mohr Date: Mon, 26 Jun 2006 00:25:14 -0700 Subject: [PATCH] --- yaml --- r: 30216 b: refs/heads/master c: 7d622d4794490cef933c20e4a6279e43e03fafad h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/x86_64/kernel/pmtimer.c | 2 +- trunk/drivers/clocksource/acpi_pm.c | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 41c36e4532b4..d288f52ce4b5 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a275254975a29c51929ee175b92ac471ac2a0043 +refs/heads/master: 7d622d4794490cef933c20e4a6279e43e03fafad diff --git a/trunk/arch/x86_64/kernel/pmtimer.c b/trunk/arch/x86_64/kernel/pmtimer.c index bf421ed26808..7554458dc9cb 100644 --- a/trunk/arch/x86_64/kernel/pmtimer.c +++ b/trunk/arch/x86_64/kernel/pmtimer.c @@ -27,7 +27,7 @@ /* The I/O port the PMTMR resides at. * The location is detected during setup_arch(), * in arch/i386/kernel/acpi/boot.c */ -u32 pmtmr_ioport; +u32 pmtmr_ioport __read_mostly; /* value of the Power timer at last timer interrupt */ static u32 offset_delay; diff --git a/trunk/drivers/clocksource/acpi_pm.c b/trunk/drivers/clocksource/acpi_pm.c index 9217be5048d5..066dc77433d5 100644 --- a/trunk/drivers/clocksource/acpi_pm.c +++ b/trunk/drivers/clocksource/acpi_pm.c @@ -30,7 +30,7 @@ * The location is detected during setup_arch(), * in arch/i386/acpi/boot.c */ -u32 pmtmr_ioport; +u32 pmtmr_ioport __read_mostly; #define ACPI_PM_MASK 0xFFFFFF /* limit it to 24 bits */ @@ -47,7 +47,7 @@ static cycle_t acpi_pm_read_verified(void) /* * It has been reported that because of various broken * chipsets (ICH4, PIIX4 and PIIX4E) where the ACPI PM clock - * source is not latched, so you must read it multiple + * source is not latched, you must read it multiple * times to ensure a safe value is read: */ do {