From 6a73bfb8ab60f742d26bc0075d55f7cc0cd9d365 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Wed, 11 Jul 2012 16:33:43 +0200 Subject: [PATCH] --- yaml --- r: 332237 b: refs/heads/master c: c9e854cf940fbc09846c255895efceb3bc9bf095 h: refs/heads/master i: 332235: 9780ee780e07e10e9ccbf71b8dd772dd46e0e2c2 v: v3 --- [refs] | 2 +- trunk/drivers/gpio/gpio-stp-xway.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index b5f2ba12a383..4d30512d5cec 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 6a88a0f762a61f212d4bbcf1ad45369f28014484 +refs/heads/master: c9e854cf940fbc09846c255895efceb3bc9bf095 diff --git a/trunk/drivers/gpio/gpio-stp-xway.c b/trunk/drivers/gpio/gpio-stp-xway.c index e35096bf3cfb..8bead0bb6459 100644 --- a/trunk/drivers/gpio/gpio-stp-xway.c +++ b/trunk/drivers/gpio/gpio-stp-xway.c @@ -82,7 +82,7 @@ struct xway_stp { struct gpio_chip gc; void __iomem *virt; u32 edge; /* rising or falling edge triggered shift register */ - u16 shadow; /* shadow the shift registers state */ + u32 shadow; /* shadow the shift registers state */ u8 groups; /* we can drive 1-3 groups of 8bit each */ u8 dsl; /* the 2 LSBs can be driven by the dsl core */ u8 phy1; /* 3 bits can be driven by phy1 */