From 6adec6e07c8aee40789aeadb68073f803780e617 Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Thu, 4 Feb 2010 14:17:47 -0800 Subject: [PATCH] --- yaml --- r: 185531 b: refs/heads/master c: 357b13c3e498bb658f511f91a9e4f09c9553be6e h: refs/heads/master i: 185529: ec952ef1a2b373f25f5fa2527663d04534efa191 185527: b7f8925211c62090d994778f8796f02e45173a80 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_display.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 981700302762..3ecfe438f292 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 060e645ac0181f499478a7be0ccb8a5600edc71a +refs/heads/master: 357b13c3e498bb658f511f91a9e4f09c9553be6e diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c index cba51c2b512f..e879885f4754 100644 --- a/trunk/drivers/gpu/drm/i915/intel_display.c +++ b/trunk/drivers/gpu/drm/i915/intel_display.c @@ -4699,7 +4699,7 @@ void ironlake_disable_drps(struct drm_device *dev) fstart = (I915_READ(MEMMODECTL) & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT; rgvswctl = (MEMCTL_CMD_CHFREQ << MEMCTL_CMD_SHIFT) | - (fstart << MEMCTL_FREQ_SHIFT); + (fstart << MEMCTL_FREQ_SHIFT) | MEMCTL_SFCAVM; I915_WRITE(MEMSWCTL, rgvswctl); msleep(1); rgvswctl |= MEMCTL_CMD_STS;