From 6bc364bfe76b9151e4386f04b3a4a06e300bf2f0 Mon Sep 17 00:00:00 2001 From: Eric Dumazet Date: Tue, 2 Dec 2008 07:21:21 +0100 Subject: [PATCH] --- yaml --- r: 119696 b: refs/heads/master c: 9ea84ad77d635bdb76c9a08f44f21a9af98359ee h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/x86/include/asm/amd_iommu_types.h | 24 ++++++------- trunk/arch/x86/include/asm/dma-mapping.h | 6 ++-- trunk/arch/x86/kernel/amd_iommu.c | 36 +++++++++++--------- trunk/arch/x86/kernel/pci-gart_64.c | 2 -- trunk/arch/x86/oprofile/op_model_ppro.c | 4 +++ 6 files changed, 41 insertions(+), 33 deletions(-) diff --git a/[refs] b/[refs] index 5dd7a5e473d8..74ef537218a1 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: c36910c147fd7b129a8f1269c76b9767c99de5cd +refs/heads/master: 9ea84ad77d635bdb76c9a08f44f21a9af98359ee diff --git a/trunk/arch/x86/include/asm/amd_iommu_types.h b/trunk/arch/x86/include/asm/amd_iommu_types.h index ac302a2fa339..1a30c0440c6b 100644 --- a/trunk/arch/x86/include/asm/amd_iommu_types.h +++ b/trunk/arch/x86/include/asm/amd_iommu_types.h @@ -251,6 +251,13 @@ struct amd_iommu { /* Pointer to PCI device of this IOMMU */ struct pci_dev *dev; + /* + * Capability pointer. There could be more than one IOMMU per PCI + * device function if there are more than one AMD IOMMU capability + * pointers. + */ + u16 cap_ptr; + /* physical address of MMIO space */ u64 mmio_phys; /* virtual address of MMIO space */ @@ -259,13 +266,6 @@ struct amd_iommu { /* capabilities of that IOMMU read from ACPI */ u32 cap; - /* - * Capability pointer. There could be more than one IOMMU per PCI - * device function if there are more than one AMD IOMMU capability - * pointers. - */ - u16 cap_ptr; - /* pci domain of this IOMMU */ u16 pci_seg; @@ -284,19 +284,19 @@ struct amd_iommu { /* size of command buffer */ u32 cmd_buf_size; - /* size of event buffer */ - u32 evt_buf_size; /* event buffer virtual address */ u8 *evt_buf; + /* size of event buffer */ + u32 evt_buf_size; /* MSI number for event interrupt */ u16 evt_msi_num; - /* true if interrupts for this IOMMU are already enabled */ - bool int_enabled; - /* if one, we need to send a completion wait command */ int need_sync; + /* true if interrupts for this IOMMU are already enabled */ + bool int_enabled; + /* default dma_ops domain for that IOMMU */ struct dma_ops_domain *default_dom; }; diff --git a/trunk/arch/x86/include/asm/dma-mapping.h b/trunk/arch/x86/include/asm/dma-mapping.h index 097794ff6b79..7f225a4b2a26 100644 --- a/trunk/arch/x86/include/asm/dma-mapping.h +++ b/trunk/arch/x86/include/asm/dma-mapping.h @@ -71,13 +71,15 @@ static inline struct dma_mapping_ops *get_dma_ops(struct device *dev) /* Make sure we keep the same behaviour */ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { -#ifdef CONFIG_X86_64 +#ifdef CONFIG_X86_32 + return 0; +#else struct dma_mapping_ops *ops = get_dma_ops(dev); if (ops->mapping_error) return ops->mapping_error(dev, dma_addr); -#endif return (dma_addr == bad_dma_address); +#endif } #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) diff --git a/trunk/arch/x86/kernel/amd_iommu.c b/trunk/arch/x86/kernel/amd_iommu.c index 5662e226b0c9..e4899e0e8787 100644 --- a/trunk/arch/x86/kernel/amd_iommu.c +++ b/trunk/arch/x86/kernel/amd_iommu.c @@ -187,8 +187,6 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) spin_lock_irqsave(&iommu->lock, flags); ret = __iommu_queue_command(iommu, cmd); - if (!ret) - iommu->need_sync = 1; spin_unlock_irqrestore(&iommu->lock, flags); return ret; @@ -212,13 +210,10 @@ static int iommu_completion_wait(struct amd_iommu *iommu) cmd.data[0] = CMD_COMPL_WAIT_INT_MASK; CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT); - spin_lock_irqsave(&iommu->lock, flags); - - if (!iommu->need_sync) - goto out; - iommu->need_sync = 0; + spin_lock_irqsave(&iommu->lock, flags); + ret = __iommu_queue_command(iommu, &cmd); if (ret) @@ -259,6 +254,8 @@ static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid) ret = iommu_queue_command(iommu, &cmd); + iommu->need_sync = 1; + return ret; } @@ -284,6 +281,8 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu, ret = iommu_queue_command(iommu, &cmd); + iommu->need_sync = 1; + return ret; } @@ -763,6 +762,8 @@ static void set_device_domain(struct amd_iommu *iommu, write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); iommu_queue_inv_dev_entry(iommu, devid); + + iommu->need_sync = 1; } /***************************************************************************** @@ -857,9 +858,6 @@ static int get_device_resources(struct device *dev, print_devid(_bdf, 1); } - if (domain_for_device(_bdf) == NULL) - set_device_domain(*iommu, *domain, _bdf); - return 1; } @@ -1033,7 +1031,8 @@ static dma_addr_t map_single(struct device *dev, phys_addr_t paddr, if (addr == bad_dma_address) goto out; - iommu_completion_wait(iommu); + if (unlikely(iommu->need_sync)) + iommu_completion_wait(iommu); out: spin_unlock_irqrestore(&domain->lock, flags); @@ -1061,7 +1060,8 @@ static void unmap_single(struct device *dev, dma_addr_t dma_addr, __unmap_single(iommu, domain->priv, dma_addr, size, dir); - iommu_completion_wait(iommu); + if (unlikely(iommu->need_sync)) + iommu_completion_wait(iommu); spin_unlock_irqrestore(&domain->lock, flags); } @@ -1127,7 +1127,8 @@ static int map_sg(struct device *dev, struct scatterlist *sglist, goto unmap; } - iommu_completion_wait(iommu); + if (unlikely(iommu->need_sync)) + iommu_completion_wait(iommu); out: spin_unlock_irqrestore(&domain->lock, flags); @@ -1172,7 +1173,8 @@ static void unmap_sg(struct device *dev, struct scatterlist *sglist, s->dma_address = s->dma_length = 0; } - iommu_completion_wait(iommu); + if (unlikely(iommu->need_sync)) + iommu_completion_wait(iommu); spin_unlock_irqrestore(&domain->lock, flags); } @@ -1223,7 +1225,8 @@ static void *alloc_coherent(struct device *dev, size_t size, goto out; } - iommu_completion_wait(iommu); + if (unlikely(iommu->need_sync)) + iommu_completion_wait(iommu); out: spin_unlock_irqrestore(&domain->lock, flags); @@ -1254,7 +1257,8 @@ static void free_coherent(struct device *dev, size_t size, __unmap_single(iommu, domain->priv, dma_addr, size, DMA_BIDIRECTIONAL); - iommu_completion_wait(iommu); + if (unlikely(iommu->need_sync)) + iommu_completion_wait(iommu); spin_unlock_irqrestore(&domain->lock, flags); diff --git a/trunk/arch/x86/kernel/pci-gart_64.c b/trunk/arch/x86/kernel/pci-gart_64.c index ba7ad83e20a8..a42b02b4df68 100644 --- a/trunk/arch/x86/kernel/pci-gart_64.c +++ b/trunk/arch/x86/kernel/pci-gart_64.c @@ -123,8 +123,6 @@ static void free_iommu(unsigned long offset, int size) spin_lock_irqsave(&iommu_bitmap_lock, flags); iommu_area_free(iommu_gart_bitmap, offset, size); - if (offset >= next_bit) - next_bit = offset + size; spin_unlock_irqrestore(&iommu_bitmap_lock, flags); } diff --git a/trunk/arch/x86/oprofile/op_model_ppro.c b/trunk/arch/x86/oprofile/op_model_ppro.c index 716d26f0e5d4..e9f80c744cf3 100644 --- a/trunk/arch/x86/oprofile/op_model_ppro.c +++ b/trunk/arch/x86/oprofile/op_model_ppro.c @@ -156,6 +156,8 @@ static void ppro_start(struct op_msrs const * const msrs) unsigned int low, high; int i; + if (!reset_value) + return; for (i = 0; i < num_counters; ++i) { if (reset_value[i]) { CTRL_READ(low, high, msrs, i); @@ -171,6 +173,8 @@ static void ppro_stop(struct op_msrs const * const msrs) unsigned int low, high; int i; + if (!reset_value) + return; for (i = 0; i < num_counters; ++i) { if (!reset_value[i]) continue;