From 6c66e3bac335764fa85a9af2395536ff61066e07 Mon Sep 17 00:00:00 2001 From: Jesper Nilsson Date: Tue, 3 Aug 2010 13:52:45 +0200 Subject: [PATCH] --- yaml --- r: 207127 b: refs/heads/master c: e75a320edab4170f28f6cce22d4ea5c15f13ecfa h: refs/heads/master i: 207125: d11033ef205065e8af1970dec44ce08eafd5d0cf 207123: 36703e6af4c98f3c3b694358797ddf7c9af44a4f 207119: a33437eee66e00d13ca165ecbebc5c560717664e v: v3 --- [refs] | 2 +- trunk/arch/cris/arch-v32/kernel/irq.c | 47 +++++++++++++-------------- 2 files changed, 23 insertions(+), 26 deletions(-) diff --git a/[refs] b/[refs] index 8b0d7d4ec9fa..51c203f881f1 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 403a1c4f1380b4ec842df5f4aa86e86ba02904f3 +refs/heads/master: e75a320edab4170f28f6cce22d4ea5c15f13ecfa diff --git a/trunk/arch/cris/arch-v32/kernel/irq.c b/trunk/arch/cris/arch-v32/kernel/irq.c index 0b1febe44aa3..2ed48ae3d313 100644 --- a/trunk/arch/cris/arch-v32/kernel/irq.c +++ b/trunk/arch/cris/arch-v32/kernel/irq.c @@ -97,7 +97,11 @@ extern void breakh_BUG(void); /* * Build the IRQ handler stubs using macros from irq.h. */ +#ifdef CONFIG_CRIS_MACH_ARTPEC3 +BUILD_TIMER_IRQ(0x31, 0) +#else BUILD_IRQ(0x31) +#endif BUILD_IRQ(0x32) BUILD_IRQ(0x33) BUILD_IRQ(0x34) @@ -123,7 +127,11 @@ BUILD_IRQ(0x47) BUILD_IRQ(0x48) BUILD_IRQ(0x49) BUILD_IRQ(0x4a) +#ifdef CONFIG_ETRAXFS +BUILD_TIMER_IRQ(0x4b, 0) +#else BUILD_IRQ(0x4b) +#endif BUILD_IRQ(0x4c) BUILD_IRQ(0x4d) BUILD_IRQ(0x4e) @@ -199,25 +207,20 @@ block_irq(int irq, int cpu) unsigned long flags; spin_lock_irqsave(&irq_lock, flags); - if (irq - FIRST_IRQ < 32) + /* Remember, 1 let thru, 0 block. */ + if (irq - FIRST_IRQ < 32) { intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, 0); - else - intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], - rw_mask, 1); - - /* Remember; 1 let thru, 0 block. */ - if (irq - FIRST_IRQ < 32) intr_mask &= ~(1 << (irq - FIRST_IRQ)); - else - intr_mask &= ~(1 << (irq - FIRST_IRQ - 32)); - - if (irq - FIRST_IRQ < 32) REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, 0, intr_mask); - else + } else { + intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], + rw_mask, 1); + intr_mask &= ~(1 << (irq - FIRST_IRQ - 32)); REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, 1, intr_mask); + } spin_unlock_irqrestore(&irq_lock, flags); } @@ -228,26 +231,20 @@ unblock_irq(int irq, int cpu) unsigned long flags; spin_lock_irqsave(&irq_lock, flags); - if (irq - FIRST_IRQ < 32) + /* Remember, 1 let thru, 0 block. */ + if (irq - FIRST_IRQ < 32) { intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, 0); - else - intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], - rw_mask, 1); - - /* Remember; 1 let thru, 0 block. */ - if (irq - FIRST_IRQ < 32) intr_mask |= (1 << (irq - FIRST_IRQ)); - else - intr_mask |= (1 << (irq - FIRST_IRQ - 32)); - - if (irq - FIRST_IRQ < 32) REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, 0, intr_mask); - else + } else { + intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], + rw_mask, 1); + intr_mask |= (1 << (irq - FIRST_IRQ - 32)); REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, 1, intr_mask); - + } spin_unlock_irqrestore(&irq_lock, flags); }