From 6cba9eb10c84469c3ffe9e0b49dbd048bec4a6f4 Mon Sep 17 00:00:00 2001
From: Ralf Baechle <ralf@linux-mips.org>
Date: Mon, 22 Jun 2009 15:48:27 +0100
Subject: [PATCH] --- yaml --- r: 154283 b: refs/heads/master c:
 ab7f6f3010a6c5ae147541168705a446cee511e7 h: refs/heads/master i:   154281:
 04eb4d89836433f27391d91abc236f5946198bdf   154279:
 21dae802994c85d3386132446f603c7f79b8e949 v: v3

---
 [refs]                             | 2 +-
 trunk/arch/mips/mipssim/sim_time.c | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 1106100efdad..95f4da210b24 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 44eeab67416711db9b84610ef18c99a60415dff8
+refs/heads/master: ab7f6f3010a6c5ae147541168705a446cee511e7
diff --git a/trunk/arch/mips/mipssim/sim_time.c b/trunk/arch/mips/mipssim/sim_time.c
index 881ecbc1fa23..0cea932f1241 100644
--- a/trunk/arch/mips/mipssim/sim_time.c
+++ b/trunk/arch/mips/mipssim/sim_time.c
@@ -91,6 +91,7 @@ unsigned __cpuinit get_c0_compare_int(void)
 		mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
 	} else {
 #endif
+	       {
 		if (cpu_has_vint)
 			set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
 		mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;