From 6ebc6c2ddee09c5eb2c22a560c77d6dc535e7fe7 Mon Sep 17 00:00:00 2001 From: Brian Norris Date: Thu, 17 Jun 2010 12:35:11 -0700 Subject: [PATCH] --- yaml --- r: 207753 b: refs/heads/master c: 24cc7b8a2a48a5707637e918a51ea547efe24892 h: refs/heads/master i: 207751: a670b52d8298a12607a30dadad6295067868117b v: v3 --- [refs] | 2 +- trunk/drivers/mtd/nand/nand_ids.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 3da91e57c294..24d319078bec 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: e2c848833c1835b6261e46836b2317fc9c3c2787 +refs/heads/master: 24cc7b8a2a48a5707637e918a51ea547efe24892 diff --git a/trunk/drivers/mtd/nand/nand_ids.c b/trunk/drivers/mtd/nand/nand_ids.c index 89907ed99009..a04b89105b65 100644 --- a/trunk/drivers/mtd/nand/nand_ids.c +++ b/trunk/drivers/mtd/nand/nand_ids.c @@ -85,6 +85,7 @@ struct nand_flash_dev nand_flash_ids[] = { {"NAND 128MiB 3,3V 8-bit", 0xD1, 0, 128, 0, LP_OPTIONS}, {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16}, {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16}, + {"NAND 128MiB 1,8V 16-bit", 0xAD, 0, 128, 0, LP_OPTIONS16}, /* 2 Gigabit */ {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS}, @@ -110,6 +111,9 @@ struct nand_flash_dev nand_flash_ids[] = { {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16}, {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16}, + /* 32 Gigabit */ + {"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 4096, 0, LP_OPTIONS16}, + /* * Renesas AND 1 Gigabit. Those chips do not support extended id and * have a strange page/block layout ! The chosen minimum erasesize is