From 701e19bda328a41c3b0ce802af0ace0d327a483a Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Tue, 9 Dec 2008 08:45:44 +0200 Subject: [PATCH] --- yaml --- r: 120284 b: refs/heads/master c: 44c5587035fbbdd368a3d5d8d11997d43758078a h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/sound/soc/codecs/twl4030.c | 25 +++++++++++++++++++++++-- 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 75e58ba58688..894dd76315e5 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 53b5047d994edfcafabc0e95bb681ae70d6e8604 +refs/heads/master: 44c5587035fbbdd368a3d5d8d11997d43758078a diff --git a/trunk/sound/soc/codecs/twl4030.c b/trunk/sound/soc/codecs/twl4030.c index 3543bf6e258f..4293ec7b5021 100644 --- a/trunk/sound/soc/codecs/twl4030.c +++ b/trunk/sound/soc/codecs/twl4030.c @@ -562,6 +562,12 @@ static const struct snd_kcontrol_new twl4030_snd_controls[] = { SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume", TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, 3, 0x12, 1, analog_tlv), + SOC_DOUBLE_R("DAC1 Analog Playback Switch", + TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL, + 1, 1, 0), + SOC_DOUBLE_R("DAC2 Analog Playback Switch", + TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, + 1, 1, 0), /* Separate output gain controls */ SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume", @@ -626,14 +632,29 @@ static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = { SND_SOC_DAPM_DAC("DACL2", "Left Rear Playback", TWL4030_REG_AVDAC_CTL, 3, 0), + /* Analog PGAs */ + SND_SOC_DAPM_PGA("ARXR1_APGA", TWL4030_REG_ARXR1_APGA_CTL, + 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("ARXL1_APGA", TWL4030_REG_ARXL1_APGA_CTL, + 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("ARXR2_APGA", TWL4030_REG_ARXR2_APGA_CTL, + 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("ARXL2_APGA", TWL4030_REG_ARXL2_APGA_CTL, + 0, 0, NULL, 0), + SND_SOC_DAPM_ADC("ADCL", "Left Capture", SND_SOC_NOPM, 0, 0), SND_SOC_DAPM_ADC("ADCR", "Right Capture", SND_SOC_NOPM, 0, 0), }; static const struct snd_soc_dapm_route intercon[] = { + {"ARXL1_APGA", NULL, "DACL1"}, + {"ARXR1_APGA", NULL, "DACR1"}, + {"ARXL2_APGA", NULL, "DACL2"}, + {"ARXR2_APGA", NULL, "DACR2"}, + /* outputs */ - {"OUTL", NULL, "DACL2"}, - {"OUTR", NULL, "DACR2"}, + {"OUTL", NULL, "ARXL2_APGA"}, + {"OUTR", NULL, "ARXR2_APGA"}, /* inputs */ {"ADCL", NULL, "INL"},