From 702b6755c69f4fc9ccd98fcdf9757d1e9c27cc66 Mon Sep 17 00:00:00 2001
From: manjugk manjugk <manjugk@ti.com>
Date: Thu, 4 Mar 2010 07:11:56 +0000
Subject: [PATCH] --- yaml --- r: 190281 b: refs/heads/master c:
 519e61666f4030426fc539d4e7102dc2bad41113 h: refs/heads/master i:   190279:
 0807a0866476d62ccb68c55739a523fe12b53900 v: v3

---
 [refs]                         | 2 +-
 trunk/arch/arm/plat-omap/dma.c | 9 +++++++++
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 78100a02fb04..e7720baad83b 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 29501577a7f3c925d5273064752ce3dc356ccfad
+refs/heads/master: 519e61666f4030426fc539d4e7102dc2bad41113
diff --git a/trunk/arch/arm/plat-omap/dma.c b/trunk/arch/arm/plat-omap/dma.c
index 2ab224c8e16c..f6c9bdc95bce 100644
--- a/trunk/arch/arm/plat-omap/dma.c
+++ b/trunk/arch/arm/plat-omap/dma.c
@@ -936,6 +936,15 @@ void omap_start_dma(int lch)
 {
 	u32 l;
 
+	/*
+	 * The CPC/CDAC register needs to be initialized to zero
+	 * before starting dma transfer.
+	 */
+	if (cpu_is_omap15xx())
+		dma_write(0, CPC(lch));
+	else
+		dma_write(0, CDAC(lch));
+
 	if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
 		int next_lch, cur_lch;
 		char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT];