diff --git a/[refs] b/[refs] index b11132499990..15d5929af5e2 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 52cfa7e54b480661e20dfd8788a24cfcba8a0ca5 +refs/heads/master: 61da823ab9f1e554da58f1c9f75931829582ad4f diff --git a/trunk/Documentation/devicetree/bindings/arm/davinci.txt b/trunk/Documentation/devicetree/bindings/arm/davinci.txt new file mode 100644 index 000000000000..cfaeda4274e6 --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/arm/davinci.txt @@ -0,0 +1,17 @@ +Texas Instruments DaVinci Platforms Device Tree Bindings +-------------------------------------------------------- + +DA850/OMAP-L138/AM18x Evaluation Module (EVM) board +Required root node properties: + - compatible = "ti,da850-evm", "ti,da850"; + +EnBW AM1808 based CMC board +Required root node properties: + - compatible = "enbw,cmc", "ti,da850; + +Generic DaVinci Boards +---------------------- + +DA850/OMAP-L138/AM18x generic board +Required root node properties: + - compatible = "ti,da850"; diff --git a/trunk/Documentation/devicetree/bindings/arm/exynos/power_domain.txt b/trunk/Documentation/devicetree/bindings/arm/exynos/power_domain.txt index 6528e215c5fe..5216b419016a 100644 --- a/trunk/Documentation/devicetree/bindings/arm/exynos/power_domain.txt +++ b/trunk/Documentation/devicetree/bindings/arm/exynos/power_domain.txt @@ -4,14 +4,13 @@ Exynos processors include support for multiple power domains which are used to gate power to one or more peripherals on the processor. Required Properties: -- compatiable: should be one of the following. +- compatible: should be one of the following. * samsung,exynos4210-pd - for exynos4210 type power domain. - reg: physical base address of the controller and length of memory mapped region. -Optional Properties: -- samsung,exynos4210-pd-off: Specifies that the power domain is in turned-off - state during boot and remains to be turned-off until explicitly turned-on. +Node of a device using power domains must have a samsung,power-domain property +defined with a phandle to respective power domain. Example: @@ -19,3 +18,11 @@ Example: compatible = "samsung,exynos4210-pd"; reg = <0x10023C00 0x10>; }; + +Example of the node using power domain: + + node { + /* ... */ + samsung,power-domain = <&lcd0>; + /* ... */ + }; diff --git a/trunk/Documentation/devicetree/bindings/arm/fsl.txt b/trunk/Documentation/devicetree/bindings/arm/fsl.txt index ac9e7516756e..f79818711e83 100644 --- a/trunk/Documentation/devicetree/bindings/arm/fsl.txt +++ b/trunk/Documentation/devicetree/bindings/arm/fsl.txt @@ -41,6 +41,10 @@ i.MX6 Quad SABRE Smart Device Board Required root node properties: - compatible = "fsl,imx6q-sabresd", "fsl,imx6q"; +i.MX6 Quad SABRE Automotive Board +Required root node properties: + - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; + Generic i.MX boards ------------------- diff --git a/trunk/Documentation/devicetree/bindings/arm/omap/counter.txt b/trunk/Documentation/devicetree/bindings/arm/omap/counter.txt new file mode 100644 index 000000000000..5bd8aa091315 --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/arm/omap/counter.txt @@ -0,0 +1,15 @@ +OMAP Counter-32K bindings + +Required properties: +- compatible: Must be "ti,omap-counter32k" for OMAP controllers +- reg: Contains timer register address range (base address and length) +- ti,hwmods: Name of the hwmod associated to the counter, which is typically + "counter_32k" + +Example: + +counter32k: counter@4a304000 { + compatible = "ti,omap-counter32k"; + reg = <0x4a304000 0x20>; + ti,hwmods = "counter_32k"; +}; diff --git a/trunk/Documentation/devicetree/bindings/arm/omap/timer.txt b/trunk/Documentation/devicetree/bindings/arm/omap/timer.txt new file mode 100644 index 000000000000..8732d4d41f8b --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/arm/omap/timer.txt @@ -0,0 +1,31 @@ +OMAP Timer bindings + +Required properties: +- compatible: Must be "ti,omap2-timer" for OMAP2+ controllers. +- reg: Contains timer register address range (base address and + length). +- interrupts: Contains the interrupt information for the timer. The + format is being dependent on which interrupt controller + the OMAP device uses. +- ti,hwmods: Name of the hwmod associated to the timer, "timer", + where is the instance number of the timer from the + HW spec. + +Optional properties: +- ti,timer-alwon: Indicates the timer is in an alway-on power domain. +- ti,timer-dsp: Indicates the timer can interrupt the on-chip DSP in + addition to the ARM CPU. +- ti,timer-pwm: Indicates the timer can generate a PWM output. +- ti,timer-secure: Indicates the timer is reserved on a secure OMAP device + and therefore cannot be used by the kernel. + +Example: + +timer12: timer@48304000 { + compatible = "ti,omap2-timer"; + reg = <0x48304000 0x400>; + interrupts = <95>; + ti,hwmods = "timer12" + ti,timer-alwon; + ti,timer-secure; +}; diff --git a/trunk/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt b/trunk/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt new file mode 100644 index 000000000000..37824fac688e --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt @@ -0,0 +1,14 @@ +* Samsung SATA PHY Controller + +SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers. +Each SATA PHY controller should have its own node. + +Required properties: +- compatible : compatible list, contains "samsung,exynos5-sata-phy" +- reg : + +Example: + sata@ffe07000 { + compatible = "samsung,exynos5-sata-phy"; + reg = <0xffe07000 0x1000>; + }; diff --git a/trunk/Documentation/devicetree/bindings/ata/exynos-sata.txt b/trunk/Documentation/devicetree/bindings/ata/exynos-sata.txt new file mode 100644 index 000000000000..0849f1025e34 --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/ata/exynos-sata.txt @@ -0,0 +1,17 @@ +* Samsung AHCI SATA Controller + +SATA nodes are defined to describe on-chip Serial ATA controllers. +Each SATA controller should have its own node. + +Required properties: +- compatible : compatible list, contains "samsung,exynos5-sata" +- interrupts : +- reg : +- samsung,sata-freq : + +Example: + sata@ffe08000 { + compatible = "samsung,exynos5-sata"; + reg = <0xffe08000 0x1000>; + interrupts = <115>; + }; diff --git a/trunk/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt b/trunk/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt index d2fe064a828b..63dd8051521c 100644 --- a/trunk/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt +++ b/trunk/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt @@ -2,9 +2,27 @@ properties: - compatible : Should be "ti,omap-ocp2scp" +- reg : Address and length of the register set for the device - #address-cells, #size-cells : Must be present if the device has sub-nodes - ranges : the child address space are mapped 1:1 onto the parent address space - ti,hwmods : must be "ocp2scp_usb_phy" Sub-nodes: All the devices connected to ocp2scp are described using sub-node to ocp2scp + +ocp2scp@4a0ad000 { + compatible = "ti,omap-ocp2scp"; + reg = <0x4a0ad000 0x1f>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + ti,hwmods = "ocp2scp_usb_phy"; + + subnode1 { + ... + }; + + subnode2 { + ... + }; +}; diff --git a/trunk/Documentation/devicetree/bindings/clock/imx25-clock.txt b/trunk/Documentation/devicetree/bindings/clock/imx25-clock.txt new file mode 100644 index 000000000000..c2a3525ecb4e --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/clock/imx25-clock.txt @@ -0,0 +1,162 @@ +* Clock bindings for Freescale i.MX25 + +Required properties: +- compatible: Should be "fsl,imx25-ccm" +- reg: Address and length of the register set +- interrupts: Should contain CCM interrupt +- #clock-cells: Should be <1> + +The clock consumer should specify the desired clock by having the clock +ID in its "clocks" phandle cell. The following is a full list of i.MX25 +clocks and IDs. + + Clock ID + --------------------------- + dummy 0 + osc 1 + mpll 2 + upll 3 + mpll_cpu_3_4 4 + cpu_sel 5 + cpu 6 + ahb 7 + usb_div 8 + ipg 9 + per0_sel 10 + per1_sel 11 + per2_sel 12 + per3_sel 13 + per4_sel 14 + per5_sel 15 + per6_sel 16 + per7_sel 17 + per8_sel 18 + per9_sel 19 + per10_sel 20 + per11_sel 21 + per12_sel 22 + per13_sel 23 + per14_sel 24 + per15_sel 25 + per0 26 + per1 27 + per2 28 + per3 29 + per4 30 + per5 31 + per6 32 + per7 33 + per8 34 + per9 35 + per10 36 + per11 37 + per12 38 + per13 39 + per14 40 + per15 41 + csi_ipg_per 42 + epit_ipg_per 43 + esai_ipg_per 44 + esdhc1_ipg_per 45 + esdhc2_ipg_per 46 + gpt_ipg_per 47 + i2c_ipg_per 48 + lcdc_ipg_per 49 + nfc_ipg_per 50 + owire_ipg_per 51 + pwm_ipg_per 52 + sim1_ipg_per 53 + sim2_ipg_per 54 + ssi1_ipg_per 55 + ssi2_ipg_per 56 + uart_ipg_per 57 + ata_ahb 58 + reserved 59 + csi_ahb 60 + emi_ahb 61 + esai_ahb 62 + esdhc1_ahb 63 + esdhc2_ahb 64 + fec_ahb 65 + lcdc_ahb 66 + rtic_ahb 67 + sdma_ahb 68 + slcdc_ahb 69 + usbotg_ahb 70 + reserved 71 + reserved 72 + reserved 73 + reserved 74 + can1_ipg 75 + can2_ipg 76 + csi_ipg 77 + cspi1_ipg 78 + cspi2_ipg 79 + cspi3_ipg 80 + dryice_ipg 81 + ect_ipg 82 + epit1_ipg 83 + epit2_ipg 84 + reserved 85 + esdhc1_ipg 86 + esdhc2_ipg 87 + fec_ipg 88 + reserved 89 + reserved 90 + reserved 91 + gpt1_ipg 92 + gpt2_ipg 93 + gpt3_ipg 94 + gpt4_ipg 95 + reserved 96 + reserved 97 + reserved 98 + iim_ipg 99 + reserved 100 + reserved 101 + kpp_ipg 102 + lcdc_ipg 103 + reserved 104 + pwm1_ipg 105 + pwm2_ipg 106 + pwm3_ipg 107 + pwm4_ipg 108 + rngb_ipg 109 + reserved 110 + scc_ipg 111 + sdma_ipg 112 + sim1_ipg 113 + sim2_ipg 114 + slcdc_ipg 115 + spba_ipg 116 + ssi1_ipg 117 + ssi2_ipg 118 + tsc_ipg 119 + uart1_ipg 120 + uart2_ipg 121 + uart3_ipg 122 + uart4_ipg 123 + uart5_ipg 124 + reserved 125 + wdt_ipg 126 + +Examples: + +clks: ccm@53f80000 { + compatible = "fsl,imx25-ccm"; + reg = <0x53f80000 0x4000>; + interrupts = <31>; + clock-output-names = ... + "uart_ipg", + "uart_serial", + ...; +}; + +uart1: serial@43f90000 { + compatible = "fsl,imx25-uart", "fsl,imx21-uart"; + reg = <0x43f90000 0x4000>; + interrupts = <45>; + clocks = <&clks 79>, <&clks 50>; + clock-names = "ipg", "per"; + status = "disabled"; +}; diff --git a/trunk/Documentation/devicetree/bindings/clock/zynq-7000.txt b/trunk/Documentation/devicetree/bindings/clock/zynq-7000.txt new file mode 100644 index 000000000000..23ae1db1bc13 --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/clock/zynq-7000.txt @@ -0,0 +1,55 @@ +Device Tree Clock bindings for the Zynq 7000 EPP + +The Zynq EPP has several different clk providers, each with there own bindings. +The purpose of this document is to document their usage. + +See clock_bindings.txt for more information on the generic clock bindings. +See Chapter 25 of Zynq TRM for more information about Zynq clocks. + +== PLLs == + +Used to describe the ARM_PLL, DDR_PLL, and IO_PLL. + +Required properties: +- #clock-cells : shall be 0 (only one clock is output from this node) +- compatible : "xlnx,zynq-pll" +- reg : pair of u32 values, which are the address offsets within the SLCR + of the relevant PLL_CTRL register and PLL_CFG register respectively +- clocks : phandle for parent clock. should be the phandle for ps_clk + +Optional properties: +- clock-output-names : name of the output clock + +Example: + armpll: armpll { + #clock-cells = <0>; + compatible = "xlnx,zynq-pll"; + clocks = <&ps_clk>; + reg = <0x100 0x110>; + clock-output-names = "armpll"; + }; + +== Peripheral clocks == + +Describes clock node for the SDIO, SMC, SPI, QSPI, and UART clocks. + +Required properties: +- #clock-cells : shall be 1 +- compatible : "xlnx,zynq-periph-clock" +- reg : a single u32 value, describing the offset within the SLCR where + the CLK_CTRL register is found for this peripheral +- clocks : phandle for parent clocks. should hold phandles for + the IO_PLL, ARM_PLL, and DDR_PLL in order +- clock-output-names : names of the output clock(s). For peripherals that have + two output clocks (for example, the UART), two clocks + should be listed. + +Example: + uart_clk: uart_clk { + #clock-cells = <1>; + compatible = "xlnx,zynq-periph-clock"; + clocks = <&iopll &armpll &ddrpll>; + reg = <0x154>; + clock-output-names = "uart0_ref_clk", + "uart1_ref_clk"; + }; diff --git a/trunk/Documentation/devicetree/bindings/drm/exynos/hdmi.txt b/trunk/Documentation/devicetree/bindings/drm/exynos/hdmi.txt new file mode 100644 index 000000000000..589edee37394 --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/drm/exynos/hdmi.txt @@ -0,0 +1,22 @@ +Device-Tree bindings for drm hdmi driver + +Required properties: +- compatible: value should be "samsung,exynos5-hdmi". +- reg: physical base address of the hdmi and length of memory mapped + region. +- interrupts: interrupt number to the cpu. +- hpd-gpio: following information about the hotplug gpio pin. + a) phandle of the gpio controller node. + b) pin number within the gpio controller. + c) pin function mode. + d) optional flags and pull up/down. + e) drive strength. + +Example: + + hdmi { + compatible = "samsung,exynos5-hdmi"; + reg = <0x14530000 0x100000>; + interrupts = <0 95 0>; + hpd-gpio = <&gpx3 7 0xf 1 3>; + }; diff --git a/trunk/Documentation/devicetree/bindings/drm/exynos/hdmiddc.txt b/trunk/Documentation/devicetree/bindings/drm/exynos/hdmiddc.txt new file mode 100644 index 000000000000..fa166d945809 --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/drm/exynos/hdmiddc.txt @@ -0,0 +1,12 @@ +Device-Tree bindings for hdmiddc driver + +Required properties: +- compatible: value should be "samsung,exynos5-hdmiddc". +- reg: I2C address of the hdmiddc device. + +Example: + + hdmiddc { + compatible = "samsung,exynos5-hdmiddc"; + reg = <0x50>; + }; diff --git a/trunk/Documentation/devicetree/bindings/drm/exynos/hdmiphy.txt b/trunk/Documentation/devicetree/bindings/drm/exynos/hdmiphy.txt new file mode 100644 index 000000000000..858f4f9b902f --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/drm/exynos/hdmiphy.txt @@ -0,0 +1,12 @@ +Device-Tree bindings for hdmiphy driver + +Required properties: +- compatible: value should be "samsung,exynos5-hdmiphy". +- reg: I2C address of the hdmiphy device. + +Example: + + hdmiphy { + compatible = "samsung,exynos5-hdmiphy"; + reg = <0x38>; + }; diff --git a/trunk/Documentation/devicetree/bindings/drm/exynos/mixer.txt b/trunk/Documentation/devicetree/bindings/drm/exynos/mixer.txt new file mode 100644 index 000000000000..9b2ea0343566 --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/drm/exynos/mixer.txt @@ -0,0 +1,15 @@ +Device-Tree bindings for mixer driver + +Required properties: +- compatible: value should be "samsung,exynos5-mixer". +- reg: physical base address of the mixer and length of memory mapped + region. +- interrupts: interrupt number to the cpu. + +Example: + + mixer { + compatible = "samsung,exynos5-mixer"; + reg = <0x14450000 0x10000>; + interrupts = <0 94 0>; + }; diff --git a/trunk/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt b/trunk/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt index f3cf43b66f7e..3614242e7732 100644 --- a/trunk/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt +++ b/trunk/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt @@ -12,13 +12,13 @@ Optional properties: Examples: i2c@83fc4000 { /* I2C2 on i.MX51 */ - compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; reg = <0x83fc4000 0x4000>; interrupts = <63>; }; i2c@70038000 { /* HS-I2C on i.MX51 */ - compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; reg = <0x70038000 0x4000>; interrupts = <64>; clock-frequency = <400000>; diff --git a/trunk/Documentation/devicetree/bindings/i2c/trivial-devices.txt b/trunk/Documentation/devicetree/bindings/i2c/trivial-devices.txt index 2f5322b119eb..446859fcdca4 100644 --- a/trunk/Documentation/devicetree/bindings/i2c/trivial-devices.txt +++ b/trunk/Documentation/devicetree/bindings/i2c/trivial-devices.txt @@ -55,5 +55,7 @@ st-micro,24c256 i2c serial eeprom (24cxx) stm,m41t00 Serial Access TIMEKEEPER stm,m41t62 Serial real-time clock (RTC) with alarm stm,m41t80 M41T80 - SERIAL ACCESS RTC WITH ALARMS +taos,tsl2550 Ambient Light Sensor with SMBUS/Two Wire Serial Interface ti,tsc2003 I2C Touch-Screen Controller ti,tmp102 Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface +ti,tmp275 Digital Temperature Sensor diff --git a/trunk/Documentation/devicetree/bindings/input/touchscreen/bu21013.txt b/trunk/Documentation/devicetree/bindings/input/touchscreen/bu21013.txt new file mode 100644 index 000000000000..ca5a2c86480c --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/input/touchscreen/bu21013.txt @@ -0,0 +1,28 @@ +* Rohm BU21013 Touch Screen + +Required properties: + - compatible : "rohm,bu21013_tp" + - reg : I2C device address + +Optional properties: + - touch-gpio : GPIO pin registering a touch event + - -supply : Phandle to a regulator supply + - rohm,touch-max-x : Maximum outward permitted limit in the X axis + - rohm,touch-max-y : Maximum outward permitted limit in the Y axis + - rohm,flip-x : Flip touch coordinates on the X axis + - rohm,flip-y : Flip touch coordinates on the Y axis + +Example: + + i2c@80110000 { + bu21013_tp@0x5c { + compatible = "rohm,bu21013_tp"; + reg = <0x5c>; + touch-gpio = <&gpio2 20 0x4>; + avdd-supply = <&ab8500_ldo_aux1_reg>; + + rohm,touch-max-x = <384>; + rohm,touch-max-y = <704>; + rohm,flip-y; + }; + }; diff --git a/trunk/Documentation/devicetree/bindings/media/s5p-mfc.txt b/trunk/Documentation/devicetree/bindings/media/s5p-mfc.txt new file mode 100644 index 000000000000..67ec3d4ccc7f --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/media/s5p-mfc.txt @@ -0,0 +1,23 @@ +* Samsung Multi Format Codec (MFC) + +Multi Format Codec (MFC) is the IP present in Samsung SoCs which +supports high resolution decoding and encoding functionalities. +The MFC device driver is a v4l2 driver which can encode/decode +video raw/elementary streams and has support for all popular +video codecs. + +Required properties: + - compatible : value should be either one among the following + (a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs + (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs + + - reg : Physical base address of the IP registers and length of memory + mapped region. + + - interrupts : MFC interrupt number to the CPU. + + - samsung,mfc-r : Base address of the first memory bank used by MFC + for DMA contiguous memory allocation and its size. + + - samsung,mfc-l : Base address of the second memory bank used by MFC + for DMA contiguous memory allocation and its size. diff --git a/trunk/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/trunk/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index 03dee50532f5..e97a27856b21 100644 --- a/trunk/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt +++ b/trunk/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -8,13 +8,20 @@ on-chip controllers onto these pads. Required Properties: - compatible: should be one of the following. - "samsung,pinctrl-exynos4210": for Exynos4210 compatible pin-controller. + - "samsung,pinctrl-exynos4x12": for Exynos4x12 compatible pin-controller. - "samsung,pinctrl-exynos5250": for Exynos5250 compatible pin-controller. - reg: Base address of the pin controller hardware module and length of the address space it occupies. -- interrupts: interrupt specifier for the controller. The format and value of - the interrupt specifier depends on the interrupt parent for the controller. +- Pin banks as child nodes: Pin banks of the controller are represented by child + nodes of the controller node. Bank name is taken from name of the node. Each + bank node must contain following properties: + + - gpio-controller: identifies the node as a gpio controller and pin bank. + - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO + binding is used, the amount of cells must be specified as 2. See generic + GPIO binding documentation for description of particular cells. - Pin mux/config groups as child nodes: The pin mux (selecting pin function mode) and pin config (pull up/down, driver strength) settings are represented @@ -72,16 +79,24 @@ used as system wakeup events. A. External GPIO Interrupts: For supporting external gpio interrupts, the following properties should be specified in the pin-controller device node. -- interrupt-controller: identifies the controller node as interrupt-parent. -- #interrupt-cells: the value of this property should be 2. - - First Cell: represents the external gpio interrupt number local to the - external gpio interrupt space of the controller. - - Second Cell: flags to identify the type of the interrupt - - 1 = rising edge triggered - - 2 = falling edge triggered - - 3 = rising and falling edge triggered - - 4 = high level triggered - - 8 = low level triggered + - interrupt-parent: phandle of the interrupt parent to which the external + GPIO interrupts are forwarded to. + - interrupts: interrupt specifier for the controller. The format and value of + the interrupt specifier depends on the interrupt parent for the controller. + + In addition, following properties must be present in node of every bank + of pins supporting GPIO interrupts: + + - interrupt-controller: identifies the controller node as interrupt-parent. + - #interrupt-cells: the value of this property should be 2. + - First Cell: represents the external gpio interrupt number local to the + external gpio interrupt space of the controller. + - Second Cell: flags to identify the type of the interrupt + - 1 = rising edge triggered + - 2 = falling edge triggered + - 3 = rising and falling edge triggered + - 4 = high level triggered + - 8 = low level triggered B. External Wakeup Interrupts: For supporting external wakeup interrupts, a child node representing the external wakeup interrupt controller should be @@ -94,6 +109,11 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a found on Samsung Exynos4210 SoC. - interrupt-parent: phandle of the interrupt parent to which the external wakeup interrupts are forwarded to. + - interrupts: interrupt used by multiplexed wakeup interrupts. + + In addition, following properties must be present in node of every bank + of pins supporting wake-up interrupts: + - interrupt-controller: identifies the node as interrupt-parent. - #interrupt-cells: the value of this property should be 2 - First Cell: represents the external wakeup interrupt number local to @@ -105,11 +125,63 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a - 4 = high level triggered - 8 = low level triggered + Node of every bank of pins supporting direct wake-up interrupts (without + multiplexing) must contain following properties: + + - interrupt-parent: phandle of the interrupt parent to which the external + wakeup interrupts are forwarded to. + - interrupts: interrupts of the interrupt parent which are used for external + wakeup interrupts from pins of the bank, must contain interrupts for all + pins of the bank. + Aliases: All the pin controller nodes should be represented in the aliases node using the following format 'pinctrl{n}' where n is a unique number for the alias. +Example: A pin-controller node with pin banks: + + pinctrl_0: pinctrl@11400000 { + compatible = "samsung,pinctrl-exynos4210"; + reg = <0x11400000 0x1000>; + interrupts = <0 47 0>; + + /* ... */ + + /* Pin bank without external interrupts */ + gpy0: gpy0 { + gpio-controller; + #gpio-cells = <2>; + }; + + /* ... */ + + /* Pin bank with external GPIO or muxed wake-up interrupts */ + gpj0: gpj0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + /* ... */ + + /* Pin bank with external direct wake-up interrupts */ + gpx0: gpx0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, + <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>; + #interrupt-cells = <2>; + }; + + /* ... */ + }; + Example 1: A pin-controller node with pin groups. pinctrl_0: pinctrl@11400000 { @@ -117,6 +189,8 @@ Example 1: A pin-controller node with pin groups. reg = <0x11400000 0x1000>; interrupts = <0 47 0>; + /* ... */ + uart0_data: uart0-data { samsung,pins = "gpa0-0", "gpa0-1"; samsung,pin-function = <2>; @@ -158,20 +232,14 @@ Example 2: A pin-controller node with external wakeup interrupt controller node. pinctrl_1: pinctrl@11000000 { compatible = "samsung,pinctrl-exynos4210"; reg = <0x11000000 0x1000>; - interrupts = <0 46 0>; - interrupt-controller; - #interrupt-cells = <2>; + interrupts = <0 46 0> - wakup_eint: wakeup-interrupt-controller { + /* ... */ + + wakeup-interrupt-controller { compatible = "samsung,exynos4210-wakeup-eint"; interrupt-parent = <&gic>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, - <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, - <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, - <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>, - <0 32 0>; + interrupts = <0 32 0>; }; }; @@ -190,7 +258,8 @@ Example 4: Set up the default pin state for uart controller. static int s3c24xx_serial_probe(struct platform_device *pdev) { struct pinctrl *pinctrl; - ... - ... + + /* ... */ + pinctrl = devm_pinctrl_get_select_default(&pdev->dev); } diff --git a/trunk/Documentation/devicetree/bindings/usb/am33xx-usb.txt b/trunk/Documentation/devicetree/bindings/usb/am33xx-usb.txt index ca8fa56e9f03..707c1a2dae06 100644 --- a/trunk/Documentation/devicetree/bindings/usb/am33xx-usb.txt +++ b/trunk/Documentation/devicetree/bindings/usb/am33xx-usb.txt @@ -1,5 +1,7 @@ AM33XX MUSB GLUE - compatible : Should be "ti,musb-am33xx" + - reg : offset and length of register sets, first usbss, then for musb instances + - interrupts : usbss, musb instance interrupts in order - ti,hwmods : must be "usb_otg_hs" - multipoint : Should be "1" indicating the musb controller supports multipoint. This is a MUSB configuration-specific setting. @@ -12,3 +14,22 @@ AM33XX MUSB GLUE represents PERIPHERAL. - power : Should be "250". This signifies the controller can supply upto 500mA when operating in host mode. + +Example: + +usb@47400000 { + compatible = "ti,musb-am33xx"; + reg = <0x47400000 0x1000 /* usbss */ + 0x47401000 0x800 /* musb instance 0 */ + 0x47401800 0x800>; /* musb instance 1 */ + interrupts = <17 /* usbss */ + 18 /* musb instance 0 */ + 19>; /* musb instance 1 */ + multipoint = <1>; + num-eps = <16>; + ram-bits = <12>; + port0-mode = <3>; + port1-mode = <3>; + power = <250>; + ti,hwmods = "usb_otg_hs"; +}; diff --git a/trunk/Documentation/devicetree/bindings/vendor-prefixes.txt b/trunk/Documentation/devicetree/bindings/vendor-prefixes.txt index 9de2b9ff9d6e..ac2c2c416a14 100644 --- a/trunk/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/trunk/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -51,4 +51,5 @@ ti Texas Instruments via VIA Technologies, Inc. wlf Wolfson Microelectronics wm Wondermedia Technologies, Inc. +winbond Winbond Electronics corp. xlnx Xilinx diff --git a/trunk/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt b/trunk/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt new file mode 100644 index 000000000000..2957ebb5aa71 --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt @@ -0,0 +1,15 @@ +* Atmel Watchdog Timers + +** at91sam9-wdt + +Required properties: +- compatible: must be "atmel,at91sam9260-wdt". +- reg: physical base address of the controller and length of memory mapped + region. + +Example: + + watchdog@fffffd40 { + compatible = "atmel,at91sam9260-wdt"; + reg = <0xfffffd40 0x10>; + }; diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index bb0b27db673f..f77a903fd1c5 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -797,7 +797,6 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained T: git git://git.pengutronix.de/git/imx/linux-2.6.git F: arch/arm/mach-imx/ -F: arch/arm/plat-mxc/ F: arch/arm/configs/imx*_defconfig ARM/FREESCALE IMX6 diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index 3cf5742a23ca..f88fce5e9772 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -433,19 +433,6 @@ config ARCH_FOOTBRIDGE Support for systems based on the DC21285 companion chip ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. -config ARCH_MXC - bool "Freescale MXC/iMX-based" - select ARCH_REQUIRE_GPIOLIB - select CLKDEV_LOOKUP - select CLKSRC_MMIO - select GENERIC_CLOCKEVENTS - select GENERIC_IRQ_CHIP - select MULTI_IRQ_HANDLER - select SPARSE_IRQ - select USE_OF - help - Support for Freescale MXC/iMX-based family of processors - config ARCH_MXS bool "Freescale MXS-based" select ARCH_REQUIRE_GPIOLIB @@ -928,6 +915,7 @@ config ARCH_DAVINCI select GENERIC_IRQ_CHIP select HAVE_IDE select NEED_MACH_GPIO_H + select USE_OF select ZONE_DMA help Support for TI's DaVinci platform. @@ -941,7 +929,6 @@ config ARCH_OMAP select CLKSRC_MMIO select GENERIC_CLOCKEVENTS select HAVE_CLK - select NEED_MACH_GPIO_H help Support for TI's OMAP platform (OMAP1/2/3/4). @@ -963,7 +950,7 @@ config ARCH_ZYNQ bool "Xilinx Zynq ARM Cortex A9 Platform" select ARM_AMBA select ARM_GIC - select CLKDEV_LOOKUP + select COMMON_CLK select CPU_V7 select GENERIC_CLOCKEVENTS select ICST @@ -1062,7 +1049,7 @@ source "arch/arm/mach-msm/Kconfig" source "arch/arm/mach-mv78xx0/Kconfig" -source "arch/arm/plat-mxc/Kconfig" +source "arch/arm/mach-imx/Kconfig" source "arch/arm/mach-mxs/Kconfig" diff --git a/trunk/arch/arm/Kconfig.debug b/trunk/arch/arm/Kconfig.debug index b0f3857b3a4c..00e9a53888ba 100644 --- a/trunk/arch/arm/Kconfig.debug +++ b/trunk/arch/arm/Kconfig.debug @@ -132,6 +132,23 @@ choice their output to UART1 serial port on DaVinci TNETV107X devices. + config DEBUG_ZYNQ_UART0 + bool "Kernel low-level debugging on Xilinx Zynq using UART0" + depends on ARCH_ZYNQ + help + Say Y here if you want the debug print routines to direct + their output to UART0 on the Zynq platform. + + config DEBUG_ZYNQ_UART1 + bool "Kernel low-level debugging on Xilinx Zynq using UART1" + depends on ARCH_ZYNQ + help + Say Y here if you want the debug print routines to direct + their output to UART1 on the Zynq platform. + + If you have a ZC702 board and want early boot messages to + appear on the USB serial adaptor, select this option. + config DEBUG_DC21285_PORT bool "Kernel low-level debugging messages via footbridge serial port" depends on FOOTBRIDGE @@ -209,20 +226,12 @@ choice Say Y here if you want kernel low-level debugging support on i.MX50 or i.MX53. - config DEBUG_IMX6Q_UART2 - bool "i.MX6Q Debug UART2" + config DEBUG_IMX6Q_UART + bool "i.MX6Q Debug UART" depends on SOC_IMX6Q help Say Y here if you want kernel low-level debugging support - on i.MX6Q UART2. This is correct for e.g. the SabreLite - board. - - config DEBUG_IMX6Q_UART4 - bool "i.MX6Q Debug UART4" - depends on SOC_IMX6Q - help - Say Y here if you want kernel low-level debugging support - on i.MX6Q UART4. + on i.MX6Q. config DEBUG_MMP_UART2 bool "Kernel low-level debugging message via MMP UART2" @@ -409,9 +418,25 @@ choice endchoice +config DEBUG_IMX6Q_UART_PORT + int "i.MX6Q Debug UART Port (1-5)" if DEBUG_IMX6Q_UART + range 1 5 + default 1 + depends on SOC_IMX6Q + help + Choose UART port on which kernel low-level debug messages + should be output. + config DEBUG_LL_INCLUDE string default "debug/icedcc.S" if DEBUG_ICEDCC + default "debug/imx.S" if DEBUG_IMX1_UART || \ + DEBUG_IMX25_UART || \ + DEBUG_IMX21_IMX27_UART || \ + DEBUG_IMX31_IMX35_UART || \ + DEBUG_IMX51_UART || \ + DEBUG_IMX50_IMX53_UART ||\ + DEBUG_IMX6Q_UART default "debug/highbank.S" if DEBUG_HIGHBANK_UART default "debug/mvebu.S" if DEBUG_MVEBU_UART default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART diff --git a/trunk/arch/arm/Makefile b/trunk/arch/arm/Makefile index 5f914fca911b..97252d86a701 100644 --- a/trunk/arch/arm/Makefile +++ b/trunk/arch/arm/Makefile @@ -196,10 +196,8 @@ machine-$(CONFIG_ARCH_ZYNQ) += zynq # Platform directory name. This list is sorted alphanumerically # by CONFIG_* macro name. -plat-$(CONFIG_ARCH_MXC) += mxc plat-$(CONFIG_ARCH_OMAP) += omap plat-$(CONFIG_ARCH_S3C64XX) += samsung -plat-$(CONFIG_ARCH_ZYNQ) += versatile plat-$(CONFIG_PLAT_IOP) += iop plat-$(CONFIG_PLAT_NOMADIK) += nomadik plat-$(CONFIG_PLAT_ORION) += orion diff --git a/trunk/arch/arm/boot/dts/Makefile b/trunk/arch/arm/boot/dts/Makefile index 94561b500429..d9cf7340572f 100644 --- a/trunk/arch/arm/boot/dts/Makefile +++ b/trunk/arch/arm/boot/dts/Makefile @@ -17,13 +17,17 @@ dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb \ usb_a9263.dtb \ usb_a9g20.dtb dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb +dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \ + da850-evm.dtb dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \ dove-cubox.dtb \ dove-dove-db.dtb dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos4210-smdkv310.dtb \ exynos4210-trats.dtb \ - exynos5250-smdk5250.dtb + exynos4412-smdk4412.dtb \ + exynos5250-smdk5250.dtb \ + exynos5250-snow.dtb dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \ integratorcp.dtb @@ -60,27 +64,33 @@ dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \ imx53-qsb.dtb \ imx53-smd.dtb \ imx6q-arm2.dtb \ + imx6q-sabreauto.dtb \ imx6q-sabrelite.dtb \ imx6q-sabresd.dtb dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ imx23-olinuxino.dtb \ imx23-stmp378x_devb.dtb \ + imx28-apf28.dtb \ + imx28-apf28dev.dtb \ imx28-apx4devkit.dtb \ imx28-cfa10036.dtb \ imx28-cfa10049.dtb \ imx28-evk.dtb \ imx28-m28evk.dtb \ + imx28-sps1.dtb \ imx28-tx28.dtb dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ + omap3-beagle.dtb \ omap3-beagle-xm.dtb \ omap3-evm.dtb \ omap3-tobi.dtb \ omap4-panda.dtb \ - omap4-pandaES.dtb \ - omap4-var_som.dtb \ + omap4-panda-es.dtb \ + omap4-var-som.dtb \ omap4-sdp.dtb \ omap5-evm.dtb \ am335x-evm.dtb \ + am335x-evmsk.dtb \ am335x-bone.dtb dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb @@ -113,5 +123,6 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \ wm8505-ref.dtb \ wm8650-mid.dtb +dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb endif diff --git a/trunk/arch/arm/boot/dts/am335x-bone.dts b/trunk/arch/arm/boot/dts/am335x-bone.dts index c634f87e230e..2c338889df1b 100644 --- a/trunk/arch/arm/boot/dts/am335x-bone.dts +++ b/trunk/arch/arm/boot/dts/am335x-bone.dts @@ -13,11 +13,31 @@ model = "TI AM335x BeagleBone"; compatible = "ti,am335x-bone", "ti,am33xx"; + cpus { + cpu@0 { + cpu0-supply = <&dcdc2_reg>; + }; + }; + memory { device_type = "memory"; reg = <0x80000000 0x10000000>; /* 256 MB */ }; + am33xx_pinmux: pinmux@44e10800 { + pinctrl-names = "default"; + pinctrl-0 = <&user_leds_s0>; + + user_leds_s0: user_leds_s0 { + pinctrl-single,pins = < + 0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */ + 0x58 0x17 /* gpmc_a6.gpio1_22, OUTPUT_PULLUP | MODE7 */ + 0x5c 0x7 /* gpmc_a7.gpio1_23, OUTPUT | MODE7 */ + 0x60 0x17 /* gpmc_a8.gpio1_24, OUTPUT_PULLUP | MODE7 */ + >; + }; + }; + ocp { uart1: serial@44e09000 { status = "okay"; @@ -33,6 +53,36 @@ }; }; + + leds { + compatible = "gpio-leds"; + + led@2 { + label = "beaglebone:green:heartbeat"; + gpios = <&gpio2 21 0>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + + led@3 { + label = "beaglebone:green:mmc0"; + gpios = <&gpio2 22 0>; + linux,default-trigger = "mmc0"; + default-state = "off"; + }; + + led@4 { + label = "beaglebone:green:usr2"; + gpios = <&gpio2 23 0>; + default-state = "off"; + }; + + led@5 { + label = "beaglebone:green:usr3"; + gpios = <&gpio2 24 0>; + default-state = "off"; + }; + }; }; /include/ "tps65217.dtsi" diff --git a/trunk/arch/arm/boot/dts/am335x-evm.dts b/trunk/arch/arm/boot/dts/am335x-evm.dts index 185d6325a458..9f65f17ebdf8 100644 --- a/trunk/arch/arm/boot/dts/am335x-evm.dts +++ b/trunk/arch/arm/boot/dts/am335x-evm.dts @@ -13,11 +13,39 @@ model = "TI AM335x EVM"; compatible = "ti,am335x-evm", "ti,am33xx"; + cpus { + cpu@0 { + cpu0-supply = <&vdd1_reg>; + }; + }; + memory { device_type = "memory"; reg = <0x80000000 0x10000000>; /* 256 MB */ }; + am33xx_pinmux: pinmux@44e10800 { + pinctrl-names = "default"; + pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0>; + + matrix_keypad_s0: matrix_keypad_s0 { + pinctrl-single,pins = < + 0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */ + 0x58 0x7 /* gpmc_a6.gpio1_22, OUTPUT | MODE7 */ + 0x64 0x27 /* gpmc_a9.gpio1_25, INPUT | MODE7 */ + 0x68 0x27 /* gpmc_a10.gpio1_26, INPUT | MODE7 */ + 0x6c 0x27 /* gpmc_a11.gpio1_27, INPUT | MODE7 */ + >; + }; + + volume_keys_s0: volume_keys_s0 { + pinctrl-single,pins = < + 0x150 0x27 /* spi0_sclk.gpio0_2, INPUT | MODE7 */ + 0x154 0x27 /* spi0_d0.gpio0_3, INPUT | MODE7 */ + >; + }; + }; + ocp { uart1: serial@44e09000 { status = "okay"; @@ -31,6 +59,49 @@ reg = <0x2d>; }; }; + + i2c2: i2c@4802a000 { + status = "okay"; + clock-frequency = <100000>; + + lis331dlh: lis331dlh@18 { + compatible = "st,lis331dlh", "st,lis3lv02d"; + reg = <0x18>; + Vdd-supply = <&lis3_reg>; + Vdd_IO-supply = <&lis3_reg>; + + st,click-single-x; + st,click-single-y; + st,click-single-z; + st,click-thresh-x = <10>; + st,click-thresh-y = <10>; + st,click-thresh-z = <10>; + st,irq1-click; + st,irq2-click; + st,wakeup-x-lo; + st,wakeup-x-hi; + st,wakeup-y-lo; + st,wakeup-y-hi; + st,wakeup-z-lo; + st,wakeup-z-hi; + st,min-limit-x = <120>; + st,min-limit-y = <120>; + st,min-limit-z = <140>; + st,max-limit-x = <550>; + st,max-limit-y = <550>; + st,max-limit-z = <750>; + }; + + tsl2550: tsl2550@39 { + compatible = "taos,tsl2550"; + reg = <0x39>; + }; + + tmp275: tmp275@48 { + compatible = "ti,tmp275"; + reg = <0x48>; + }; + }; }; vbat: fixedregulator@0 { @@ -40,6 +111,53 @@ regulator-max-microvolt = <5000000>; regulator-boot-on; }; + + lis3_reg: fixedregulator@1 { + compatible = "regulator-fixed"; + regulator-name = "lis3_reg"; + regulator-boot-on; + }; + + matrix_keypad: matrix_keypad@0 { + compatible = "gpio-matrix-keypad"; + debounce-delay-ms = <5>; + col-scan-delay-us = <2>; + + row-gpios = <&gpio2 25 0 /* Bank1, pin25 */ + &gpio2 26 0 /* Bank1, pin26 */ + &gpio2 27 0>; /* Bank1, pin27 */ + + col-gpios = <&gpio2 21 0 /* Bank1, pin21 */ + &gpio2 22 0>; /* Bank1, pin22 */ + + linux,keymap = <0x0000008b /* MENU */ + 0x0100009e /* BACK */ + 0x02000069 /* LEFT */ + 0x0001006a /* RIGHT */ + 0x0101001c /* ENTER */ + 0x0201006c>; /* DOWN */ + }; + + gpio_keys: volume_keys@0 { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + autorepeat; + + switch@9 { + label = "volume-up"; + linux,code = <115>; + gpios = <&gpio1 2 1>; + gpio-key,wakeup; + }; + + switch@10 { + label = "volume-down"; + linux,code = <114>; + gpios = <&gpio1 3 1>; + gpio-key,wakeup; + }; + }; }; /include/ "tps65910.dtsi" diff --git a/trunk/arch/arm/boot/dts/am335x-evmsk.dts b/trunk/arch/arm/boot/dts/am335x-evmsk.dts new file mode 100644 index 000000000000..f5a6162a4ff2 --- /dev/null +++ b/trunk/arch/arm/boot/dts/am335x-evmsk.dts @@ -0,0 +1,250 @@ +/* + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * AM335x Starter Kit + * http://www.ti.com/tool/tmdssk3358 + */ + +/dts-v1/; + +/include/ "am33xx.dtsi" + +/ { + model = "TI AM335x EVM-SK"; + compatible = "ti,am335x-evmsk", "ti,am33xx"; + + cpus { + cpu@0 { + cpu0-supply = <&vdd1_reg>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + + am33xx_pinmux: pinmux@44e10800 { + pinctrl-names = "default"; + pinctrl-0 = <&user_leds_s0 &gpio_keys_s0>; + + user_leds_s0: user_leds_s0 { + pinctrl-single,pins = < + 0x10 0x7 /* gpmc_ad4.gpio1_4, OUTPUT | MODE7 */ + 0x14 0x7 /* gpmc_ad5.gpio1_5, OUTPUT | MODE7 */ + 0x18 0x7 /* gpmc_ad6.gpio1_6, OUTPUT | MODE7 */ + 0x1c 0x7 /* gpmc_ad7.gpio1_7, OUTPUT | MODE7 */ + >; + }; + + gpio_keys_s0: gpio_keys_s0 { + pinctrl-single,pins = < + 0x94 0x27 /* gpmc_oen_ren.gpio2_3, INPUT | MODE7 */ + 0x90 0x27 /* gpmc_advn_ale.gpio2_2, INPUT | MODE7 */ + 0x70 0x27 /* gpmc_wait0.gpio0_30, INPUT | MODE7 */ + 0x9c 0x27 /* gpmc_ben0_cle.gpio2_5, INPUT | MODE7 */ + >; + }; + }; + + ocp { + uart1: serial@44e09000 { + status = "okay"; + }; + + i2c1: i2c@44e0b000 { + status = "okay"; + clock-frequency = <400000>; + + tps: tps@2d { + reg = <0x2d>; + }; + + lis331dlh: lis331dlh@18 { + compatible = "st,lis331dlh", "st,lis3lv02d"; + reg = <0x18>; + Vdd-supply = <&lis3_reg>; + Vdd_IO-supply = <&lis3_reg>; + + st,click-single-x; + st,click-single-y; + st,click-single-z; + st,click-thresh-x = <10>; + st,click-thresh-y = <10>; + st,click-thresh-z = <10>; + st,irq1-click; + st,irq2-click; + st,wakeup-x-lo; + st,wakeup-x-hi; + st,wakeup-y-lo; + st,wakeup-y-hi; + st,wakeup-z-lo; + st,wakeup-z-hi; + st,min-limit-x = <120>; + st,min-limit-y = <120>; + st,min-limit-z = <140>; + st,max-limit-x = <550>; + st,max-limit-y = <550>; + st,max-limit-z = <750>; + }; + }; + }; + + vbat: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "vbat"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + }; + + lis3_reg: fixedregulator@1 { + compatible = "regulator-fixed"; + regulator-name = "lis3_reg"; + regulator-boot-on; + }; + + leds { + compatible = "gpio-leds"; + + led@1 { + label = "evmsk:green:usr0"; + gpios = <&gpio2 4 0>; + default-state = "off"; + }; + + led@2 { + label = "evmsk:green:usr1"; + gpios = <&gpio2 5 0>; + default-state = "off"; + }; + + led@3 { + label = "evmsk:green:mmc0"; + gpios = <&gpio2 6 0>; + linux,default-trigger = "mmc0"; + default-state = "off"; + }; + + led@4 { + label = "evmsk:green:heartbeat"; + gpios = <&gpio2 7 0>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + }; + + gpio_buttons: gpio_buttons@0 { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + switch@1 { + label = "button0"; + linux,code = <0x100>; + gpios = <&gpio3 3 0>; + }; + + switch@2 { + label = "button1"; + linux,code = <0x101>; + gpios = <&gpio3 2 0>; + }; + + switch@3 { + label = "button2"; + linux,code = <0x102>; + gpios = <&gpio1 30 0>; + gpio-key,wakeup; + }; + + switch@4 { + label = "button3"; + linux,code = <0x103>; + gpios = <&gpio3 5 0>; + }; + }; +}; + +/include/ "tps65910.dtsi" + +&tps { + vcc1-supply = <&vbat>; + vcc2-supply = <&vbat>; + vcc3-supply = <&vbat>; + vcc4-supply = <&vbat>; + vcc5-supply = <&vbat>; + vcc6-supply = <&vbat>; + vcc7-supply = <&vbat>; + vccio-supply = <&vbat>; + + regulators { + vrtc_reg: regulator@0 { + regulator-always-on; + }; + + vio_reg: regulator@1 { + regulator-always-on; + }; + + vdd1_reg: regulator@2 { + /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ + regulator-name = "vdd_mpu"; + regulator-min-microvolt = <912500>; + regulator-max-microvolt = <1312500>; + regulator-boot-on; + regulator-always-on; + }; + + vdd2_reg: regulator@3 { + /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ + regulator-name = "vdd_core"; + regulator-min-microvolt = <912500>; + regulator-max-microvolt = <1150000>; + regulator-boot-on; + regulator-always-on; + }; + + vdd3_reg: regulator@4 { + regulator-always-on; + }; + + vdig1_reg: regulator@5 { + regulator-always-on; + }; + + vdig2_reg: regulator@6 { + regulator-always-on; + }; + + vpll_reg: regulator@7 { + regulator-always-on; + }; + + vdac_reg: regulator@8 { + regulator-always-on; + }; + + vaux1_reg: regulator@9 { + regulator-always-on; + }; + + vaux2_reg: regulator@10 { + regulator-always-on; + }; + + vaux33_reg: regulator@11 { + regulator-always-on; + }; + + vmmc_reg: regulator@12 { + regulator-always-on; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/am33xx.dtsi b/trunk/arch/arm/boot/dts/am33xx.dtsi index bb31bff01998..20a3f29a6bfe 100644 --- a/trunk/arch/arm/boot/dts/am33xx.dtsi +++ b/trunk/arch/arm/boot/dts/am33xx.dtsi @@ -12,6 +12,7 @@ / { compatible = "ti,am33xx"; + interrupt-parent = <&intc>; aliases { serial0 = &uart1; @@ -25,6 +26,21 @@ cpus { cpu@0 { compatible = "arm,cortex-a8"; + + /* + * To consider voltage drop between PMIC and SoC, + * tolerance value is reduced to 2% from 4% and + * voltage value is increased as a precaution. + */ + operating-points = < + /* kHz uV */ + 720000 1285000 + 600000 1225000 + 500000 1125000 + 275000 1125000 + >; + voltage-tolerance = <2>; /* 2 percentage */ + clock-latency = <300000>; /* From omap-cpufreq driver */ }; }; @@ -40,6 +56,15 @@ }; }; + am33xx_pinmux: pinmux@44e10800 { + compatible = "pinctrl-single"; + reg = <0x44e10800 0x0238>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x7f>; + }; + /* * XXX: Use a flat representation of the AM33XX interconnect. * The real AM33XX interconnect network is quite complex.Since @@ -70,7 +95,6 @@ interrupt-controller; #interrupt-cells = <1>; reg = <0x44e07000 0x1000>; - interrupt-parent = <&intc>; interrupts = <96>; }; @@ -82,7 +106,6 @@ interrupt-controller; #interrupt-cells = <1>; reg = <0x4804c000 0x1000>; - interrupt-parent = <&intc>; interrupts = <98>; }; @@ -94,7 +117,6 @@ interrupt-controller; #interrupt-cells = <1>; reg = <0x481ac000 0x1000>; - interrupt-parent = <&intc>; interrupts = <32>; }; @@ -106,7 +128,6 @@ interrupt-controller; #interrupt-cells = <1>; reg = <0x481ae000 0x1000>; - interrupt-parent = <&intc>; interrupts = <62>; }; @@ -115,7 +136,6 @@ ti,hwmods = "uart1"; clock-frequency = <48000000>; reg = <0x44e09000 0x2000>; - interrupt-parent = <&intc>; interrupts = <72>; status = "disabled"; }; @@ -125,7 +145,6 @@ ti,hwmods = "uart2"; clock-frequency = <48000000>; reg = <0x48022000 0x2000>; - interrupt-parent = <&intc>; interrupts = <73>; status = "disabled"; }; @@ -135,7 +154,6 @@ ti,hwmods = "uart3"; clock-frequency = <48000000>; reg = <0x48024000 0x2000>; - interrupt-parent = <&intc>; interrupts = <74>; status = "disabled"; }; @@ -145,7 +163,6 @@ ti,hwmods = "uart4"; clock-frequency = <48000000>; reg = <0x481a6000 0x2000>; - interrupt-parent = <&intc>; interrupts = <44>; status = "disabled"; }; @@ -155,7 +172,6 @@ ti,hwmods = "uart5"; clock-frequency = <48000000>; reg = <0x481a8000 0x2000>; - interrupt-parent = <&intc>; interrupts = <45>; status = "disabled"; }; @@ -165,7 +181,6 @@ ti,hwmods = "uart6"; clock-frequency = <48000000>; reg = <0x481aa000 0x2000>; - interrupt-parent = <&intc>; interrupts = <46>; status = "disabled"; }; @@ -176,7 +191,6 @@ #size-cells = <0>; ti,hwmods = "i2c1"; reg = <0x44e0b000 0x1000>; - interrupt-parent = <&intc>; interrupts = <70>; status = "disabled"; }; @@ -187,7 +201,6 @@ #size-cells = <0>; ti,hwmods = "i2c2"; reg = <0x4802a000 0x1000>; - interrupt-parent = <&intc>; interrupts = <71>; status = "disabled"; }; @@ -198,7 +211,6 @@ #size-cells = <0>; ti,hwmods = "i2c3"; reg = <0x4819c000 0x1000>; - interrupt-parent = <&intc>; interrupts = <30>; status = "disabled"; }; @@ -207,8 +219,124 @@ compatible = "ti,omap3-wdt"; ti,hwmods = "wd_timer2"; reg = <0x44e35000 0x1000>; - interrupt-parent = <&intc>; interrupts = <91>; }; + + dcan0: d_can@481cc000 { + compatible = "bosch,d_can"; + ti,hwmods = "d_can0"; + reg = <0x481cc000 0x2000>; + interrupts = <52>; + status = "disabled"; + }; + + dcan1: d_can@481d0000 { + compatible = "bosch,d_can"; + ti,hwmods = "d_can1"; + reg = <0x481d0000 0x2000>; + interrupts = <55>; + status = "disabled"; + }; + + timer1: timer@44e31000 { + compatible = "ti,omap2-timer"; + reg = <0x44e31000 0x400>; + interrupts = <67>; + ti,hwmods = "timer1"; + ti,timer-alwon; + }; + + timer2: timer@48040000 { + compatible = "ti,omap2-timer"; + reg = <0x48040000 0x400>; + interrupts = <68>; + ti,hwmods = "timer2"; + }; + + timer3: timer@48042000 { + compatible = "ti,omap2-timer"; + reg = <0x48042000 0x400>; + interrupts = <69>; + ti,hwmods = "timer3"; + }; + + timer4: timer@48044000 { + compatible = "ti,omap2-timer"; + reg = <0x48044000 0x400>; + interrupts = <92>; + ti,hwmods = "timer4"; + ti,timer-pwm; + }; + + timer5: timer@48046000 { + compatible = "ti,omap2-timer"; + reg = <0x48046000 0x400>; + interrupts = <93>; + ti,hwmods = "timer5"; + ti,timer-pwm; + }; + + timer6: timer@48048000 { + compatible = "ti,omap2-timer"; + reg = <0x48048000 0x400>; + interrupts = <94>; + ti,hwmods = "timer6"; + ti,timer-pwm; + }; + + timer7: timer@4804a000 { + compatible = "ti,omap2-timer"; + reg = <0x4804a000 0x400>; + interrupts = <95>; + ti,hwmods = "timer7"; + ti,timer-pwm; + }; + + rtc@44e3e000 { + compatible = "ti,da830-rtc"; + reg = <0x44e3e000 0x1000>; + interrupts = <75 + 76>; + ti,hwmods = "rtc"; + }; + + spi0: spi@48030000 { + compatible = "ti,omap4-mcspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x48030000 0x400>; + interrupt = <65>; + ti,spi-num-cs = <2>; + ti,hwmods = "spi0"; + status = "disabled"; + }; + + spi1: spi@481a0000 { + compatible = "ti,omap4-mcspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x481a0000 0x400>; + interrupt = <125>; + ti,spi-num-cs = <2>; + ti,hwmods = "spi1"; + status = "disabled"; + }; + + usb@47400000 { + compatible = "ti,musb-am33xx"; + reg = <0x47400000 0x1000 /* usbss */ + 0x47401000 0x800 /* musb instance 0 */ + 0x47401800 0x800>; /* musb instance 1 */ + interrupts = <17 /* usbss */ + 18 /* musb instance 0 */ + 19>; /* musb instance 1 */ + multipoint = <1>; + num-eps = <16>; + ram-bits = <12>; + port0-mode = <3>; + port1-mode = <3>; + power = <250>; + ti,hwmods = "usb_otg_hs"; + }; }; }; diff --git a/trunk/arch/arm/boot/dts/at91sam9260.dtsi b/trunk/arch/arm/boot/dts/at91sam9260.dtsi index d410581a5a85..bfb5bb6528b5 100644 --- a/trunk/arch/arm/boot/dts/at91sam9260.dtsi +++ b/trunk/arch/arm/boot/dts/at91sam9260.dtsi @@ -246,6 +246,12 @@ trigger-external; }; }; + + watchdog@fffffd40 { + compatible = "atmel,at91sam9260-wdt"; + reg = <0xfffffd40 0x10>; + status = "disabled"; + }; }; nand0: nand@40000000 { diff --git a/trunk/arch/arm/boot/dts/at91sam9263.dtsi b/trunk/arch/arm/boot/dts/at91sam9263.dtsi index 3e6e5c1abbf3..ff5461278c03 100644 --- a/trunk/arch/arm/boot/dts/at91sam9263.dtsi +++ b/trunk/arch/arm/boot/dts/at91sam9263.dtsi @@ -195,6 +195,12 @@ #size-cells = <0>; status = "disabled"; }; + + watchdog@fffffd40 { + compatible = "atmel,at91sam9260-wdt"; + reg = <0xfffffd40 0x10>; + status = "disabled"; + }; }; nand0: nand@40000000 { diff --git a/trunk/arch/arm/boot/dts/at91sam9g45.dtsi b/trunk/arch/arm/boot/dts/at91sam9g45.dtsi index 3add030d61f8..a98c00a234eb 100644 --- a/trunk/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/trunk/arch/arm/boot/dts/at91sam9g45.dtsi @@ -262,6 +262,12 @@ trigger-value = <0x6>; }; }; + + watchdog@fffffd40 { + compatible = "atmel,at91sam9260-wdt"; + reg = <0xfffffd40 0x10>; + status = "disabled"; + }; }; nand0: nand@40000000 { diff --git a/trunk/arch/arm/boot/dts/ccu9540.dts b/trunk/arch/arm/boot/dts/ccu9540.dts new file mode 100644 index 000000000000..04305463f00d --- /dev/null +++ b/trunk/arch/arm/boot/dts/ccu9540.dts @@ -0,0 +1,72 @@ +/* + * Copyright 2012 ST-Ericsson AB + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "dbx5x0.dtsi" + +/ { + model = "ST-Ericsson CCU9540 platform with Device Tree"; + compatible = "st-ericsson,ccu9540", "st-ericsson,u9540"; + + memory { + reg = <0x00000000 0x20000000>; + }; + + soc-u9500 { + uart@80120000 { + status = "okay"; + }; + + uart@80121000 { + status = "okay"; + }; + + uart@80007000 { + status = "okay"; + }; + + // External Micro SD slot + sdi0_per1@80126000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <100000000>; + bus-width = <4>; + mmc-cap-sd-highspeed; + mmc-cap-mmc-highspeed; + vmmc-supply = <&ab8500_ldo_aux3_reg>; + + cd-gpios = <&gpio7 6 0x4>; // 230 + cd-inverted; + + status = "okay"; + }; + + + // WLAN SDIO channel + sdi1_per2@80118000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <50000000>; + bus-width = <4>; + + status = "okay"; + }; + + // On-board eMMC + sdi4_per2@80114000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <100000000>; + bus-width = <8>; + mmc-cap-mmc-highspeed; + vmmc-supply = <&ab8500_ldo_aux2_reg>; + + status = "okay"; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/cros5250-common.dtsi b/trunk/arch/arm/boot/dts/cros5250-common.dtsi new file mode 100644 index 000000000000..fddd17417433 --- /dev/null +++ b/trunk/arch/arm/boot/dts/cros5250-common.dtsi @@ -0,0 +1,184 @@ +/* + * Common device tree include for all Exynos 5250 boards based off of Daisy. + * + * Copyright (c) 2012 Google, Inc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/ { + aliases { + }; + + memory { + reg = <0x40000000 0x80000000>; + }; + + chosen { + }; + + i2c@12C60000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <378000>; + gpios = <&gpb3 0 2 3 0>, + <&gpb3 1 2 3 0>; + }; + + i2c@12C70000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <378000>; + gpios = <&gpb3 2 2 3 0>, + <&gpb3 3 2 3 0>; + }; + + i2c@12C80000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + + /* + * Disabled pullups since external part has its own pullups and + * double-pulling gets us out of spec in some cases. + */ + gpios = <&gpa0 6 3 0 0>, + <&gpa0 7 3 0 0>; + + hdmiddc@50 { + compatible = "samsung,exynos5-hdmiddc"; + reg = <0x50>; + }; + }; + + i2c@12C90000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + gpios = <&gpa1 2 3 3 0>, + <&gpa1 3 3 3 0>; + }; + + i2c@12CA0000 { + status = "disabled"; + }; + + i2c@12CB0000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + gpios = <&gpa2 2 3 3 0>, + <&gpa2 3 3 3 0>; + }; + + i2c@12CC0000 { + status = "disabled"; + }; + + i2c@12CD0000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + gpios = <&gpb2 2 3 3 0>, + <&gpb2 3 3 3 0>; + }; + + i2c@12CE0000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <378000>; + + hdmiphy@38 { + compatible = "samsung,exynos5-hdmiphy"; + reg = <0x38>; + }; + }; + + dwmmc0@12200000 { + num-slots = <1>; + supports-highspeed; + broken-cd; + fifo-depth = <0x80>; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; + + slot@0 { + reg = <0>; + bus-width = <8>; + gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>, + <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>, + <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>, + <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>, + <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>; + }; + }; + + dwmmc1@12210000 { + status = "disabled"; + }; + + dwmmc2@12220000 { + num-slots = <1>; + supports-highspeed; + fifo-depth = <0x80>; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; + + slot@0 { + reg = <0>; + bus-width = <4>; + samsung,cd-pinmux-gpio = <&gpc3 2 2 3 3>; + wp-gpios = <&gpc2 1 0 0 3>; + gpios = <&gpc3 0 2 0 3>, <&gpc3 1 2 0 3>, + <&gpc3 3 2 3 3>, <&gpc3 4 2 3 3>, + <&gpc3 5 2 3 3>, <&gpc3 6 2 3 3>; + }; + }; + + dwmmc3@12230000 { + num-slots = <1>; + supports-highspeed; + broken-cd; + fifo-depth = <0x80>; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; + + slot@0 { + reg = <0>; + bus-width = <4>; + /* See board-specific dts files for GPIOs */ + }; + }; + + spi_0: spi@12d20000 { + status = "disabled"; + }; + + spi_1: spi@12d30000 { + gpios = <&gpa2 4 2 3 0>, + <&gpa2 6 2 3 0>, + <&gpa2 7 2 3 0>; + samsung,spi-src-clk = <0>; + num-cs = <1>; + }; + + spi_2: spi@12d40000 { + status = "disabled"; + }; + + hdmi { + hpd-gpio = <&gpx3 7 0xf 1 3>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + power { + label = "Power"; + gpios = <&gpx1 3 0 0x10000 0>; + linux,code = <116>; /* KEY_POWER */ + gpio-key,wakeup; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/da850-enbw-cmc.dts b/trunk/arch/arm/boot/dts/da850-enbw-cmc.dts new file mode 100644 index 000000000000..422fdb3fcfc1 --- /dev/null +++ b/trunk/arch/arm/boot/dts/da850-enbw-cmc.dts @@ -0,0 +1,30 @@ +/* + * Device Tree for AM1808 EnBW CMC board + * + * Copyright 2012 DENX Software Engineering GmbH + * Heiko Schocher + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +/dts-v1/; +/include/ "da850.dtsi" + +/ { + compatible = "enbw,cmc", "ti,da850"; + model = "EnBW CMC"; + + soc { + serial0: serial@1c42000 { + status = "okay"; + }; + serial1: serial@1d0c000 { + status = "okay"; + }; + serial2: serial@1d0d000 { + status = "okay"; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/da850-evm.dts b/trunk/arch/arm/boot/dts/da850-evm.dts new file mode 100644 index 000000000000..37dc5a3243b8 --- /dev/null +++ b/trunk/arch/arm/boot/dts/da850-evm.dts @@ -0,0 +1,28 @@ +/* + * Device Tree for DA850 EVM board + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation, version 2. + */ +/dts-v1/; +/include/ "da850.dtsi" + +/ { + compatible = "ti,da850-evm", "ti,da850"; + model = "DA850/AM1808/OMAP-L138 EVM"; + + soc { + serial0: serial@1c42000 { + status = "okay"; + }; + serial1: serial@1d0c000 { + status = "okay"; + }; + serial2: serial@1d0d000 { + status = "okay"; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/da850.dtsi b/trunk/arch/arm/boot/dts/da850.dtsi new file mode 100644 index 000000000000..640ab75c20db --- /dev/null +++ b/trunk/arch/arm/boot/dts/da850.dtsi @@ -0,0 +1,60 @@ +/* + * Copyright 2012 DENX Software Engineering GmbH + * Heiko Schocher + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +/include/ "skeleton.dtsi" + +/ { + arm { + #address-cells = <1>; + #size-cells = <1>; + ranges; + intc: interrupt-controller { + compatible = "ti,cp-intc"; + interrupt-controller; + #interrupt-cells = <1>; + ti,intc-size = <100>; + reg = <0xfffee000 0x2000>; + }; + }; + soc { + compatible = "simple-bus"; + model = "da850"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x01c00000 0x400000>; + + serial0: serial@1c42000 { + compatible = "ns16550a"; + reg = <0x42000 0x100>; + clock-frequency = <150000000>; + reg-shift = <2>; + interrupts = <25>; + interrupt-parent = <&intc>; + status = "disabled"; + }; + serial1: serial@1d0c000 { + compatible = "ns16550a"; + reg = <0x10c000 0x100>; + clock-frequency = <150000000>; + reg-shift = <2>; + interrupts = <53>; + interrupt-parent = <&intc>; + status = "disabled"; + }; + serial2: serial@1d0d000 { + compatible = "ns16550a"; + reg = <0x10d000 0x100>; + clock-frequency = <150000000>; + reg-shift = <2>; + interrupts = <61>; + interrupt-parent = <&intc>; + status = "disabled"; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/dbx5x0.dtsi b/trunk/arch/arm/boot/dts/dbx5x0.dtsi index 4b0e0ca08f40..7ce45fc461fb 100644 --- a/trunk/arch/arm/boot/dts/dbx5x0.dtsi +++ b/trunk/arch/arm/boot/dts/dbx5x0.dtsi @@ -209,123 +209,103 @@ // DB8500_REGULATOR_VAPE db8500_vape_reg: db8500_vape { regulator-compatible = "db8500_vape"; - regulator-name = "db8500-vape"; regulator-always-on; }; // DB8500_REGULATOR_VARM db8500_varm_reg: db8500_varm { regulator-compatible = "db8500_varm"; - regulator-name = "db8500-varm"; }; // DB8500_REGULATOR_VMODEM db8500_vmodem_reg: db8500_vmodem { regulator-compatible = "db8500_vmodem"; - regulator-name = "db8500-vmodem"; }; // DB8500_REGULATOR_VPLL db8500_vpll_reg: db8500_vpll { regulator-compatible = "db8500_vpll"; - regulator-name = "db8500-vpll"; }; // DB8500_REGULATOR_VSMPS1 db8500_vsmps1_reg: db8500_vsmps1 { regulator-compatible = "db8500_vsmps1"; - regulator-name = "db8500-vsmps1"; }; // DB8500_REGULATOR_VSMPS2 db8500_vsmps2_reg: db8500_vsmps2 { regulator-compatible = "db8500_vsmps2"; - regulator-name = "db8500-vsmps2"; }; // DB8500_REGULATOR_VSMPS3 db8500_vsmps3_reg: db8500_vsmps3 { regulator-compatible = "db8500_vsmps3"; - regulator-name = "db8500-vsmps3"; }; // DB8500_REGULATOR_VRF1 db8500_vrf1_reg: db8500_vrf1 { regulator-compatible = "db8500_vrf1"; - regulator-name = "db8500-vrf1"; }; // DB8500_REGULATOR_SWITCH_SVAMMDSP db8500_sva_mmdsp_reg: db8500_sva_mmdsp { regulator-compatible = "db8500_sva_mmdsp"; - regulator-name = "db8500-sva-mmdsp"; }; // DB8500_REGULATOR_SWITCH_SVAMMDSPRET db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { regulator-compatible = "db8500_sva_mmdsp_ret"; - regulator-name = "db8500-sva-mmdsp-ret"; }; // DB8500_REGULATOR_SWITCH_SVAPIPE db8500_sva_pipe_reg: db8500_sva_pipe { regulator-compatible = "db8500_sva_pipe"; - regulator-name = "db8500_sva_pipe"; }; // DB8500_REGULATOR_SWITCH_SIAMMDSP db8500_sia_mmdsp_reg: db8500_sia_mmdsp { regulator-compatible = "db8500_sia_mmdsp"; - regulator-name = "db8500_sia_mmdsp"; }; // DB8500_REGULATOR_SWITCH_SIAMMDSPRET db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret { - regulator-name = "db8500-sia-mmdsp-ret"; }; // DB8500_REGULATOR_SWITCH_SIAPIPE db8500_sia_pipe_reg: db8500_sia_pipe { regulator-compatible = "db8500_sia_pipe"; - regulator-name = "db8500-sia-pipe"; }; // DB8500_REGULATOR_SWITCH_SGA db8500_sga_reg: db8500_sga { regulator-compatible = "db8500_sga"; - regulator-name = "db8500-sga"; vin-supply = <&db8500_vape_reg>; }; // DB8500_REGULATOR_SWITCH_B2R2_MCDE db8500_b2r2_mcde_reg: db8500_b2r2_mcde { regulator-compatible = "db8500_b2r2_mcde"; - regulator-name = "db8500-b2r2-mcde"; vin-supply = <&db8500_vape_reg>; }; // DB8500_REGULATOR_SWITCH_ESRAM12 db8500_esram12_reg: db8500_esram12 { regulator-compatible = "db8500_esram12"; - regulator-name = "db8500-esram12"; }; // DB8500_REGULATOR_SWITCH_ESRAM12RET db8500_esram12_ret_reg: db8500_esram12_ret { regulator-compatible = "db8500_esram12_ret"; - regulator-name = "db8500-esram12-ret"; }; // DB8500_REGULATOR_SWITCH_ESRAM34 db8500_esram34_reg: db8500_esram34 { regulator-compatible = "db8500_esram34"; - regulator-name = "db8500-esram34"; }; // DB8500_REGULATOR_SWITCH_ESRAM34RET db8500_esram34_ret_reg: db8500_esram34_ret { regulator-compatible = "db8500_esram34_ret"; - regulator-name = "db8500-esram34-ret"; }; }; @@ -404,7 +384,6 @@ // supplies to the display/camera ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { regulator-compatible = "ab8500_ldo_aux1"; - regulator-name = "V-DISPLAY"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2900000>; regulator-boot-on; @@ -415,7 +394,6 @@ // supplies to the on-board eMMC ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { regulator-compatible = "ab8500_ldo_aux2"; - regulator-name = "V-eMMC1"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <3300000>; }; @@ -423,7 +401,6 @@ // supply for VAUX3; SDcard slots ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { regulator-compatible = "ab8500_ldo_aux3"; - regulator-name = "V-MMC-SD"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <3300000>; }; @@ -431,49 +408,41 @@ // supply for v-intcore12; VINTCORE12 LDO ab8500_ldo_initcore_reg: ab8500_ldo_initcore { regulator-compatible = "ab8500_ldo_initcore"; - regulator-name = "V-INTCORE"; }; // supply for tvout; gpadc; TVOUT LDO ab8500_ldo_tvout_reg: ab8500_ldo_tvout { regulator-compatible = "ab8500_ldo_tvout"; - regulator-name = "V-TVOUT"; }; // supply for ab8500-usb; USB LDO ab8500_ldo_usb_reg: ab8500_ldo_usb { regulator-compatible = "ab8500_ldo_usb"; - regulator-name = "dummy"; }; // supply for ab8500-vaudio; VAUDIO LDO ab8500_ldo_audio_reg: ab8500_ldo_audio { regulator-compatible = "ab8500_ldo_audio"; - regulator-name = "V-AUD"; }; // supply for v-anamic1 VAMic1-LDO ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { regulator-compatible = "ab8500_ldo_anamic1"; - regulator-name = "V-AMIC1"; }; // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1 ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 { regulator-compatible = "ab8500_ldo_amamic2"; - regulator-name = "V-AMIC2"; }; // supply for v-dmic; VDMIC LDO ab8500_ldo_dmic_reg: ab8500_ldo_dmic { regulator-compatible = "ab8500_ldo_dmic"; - regulator-name = "V-DMIC"; }; // supply for U8500 CSI/DSI; VANA LDO ab8500_ldo_ana_reg: ab8500_ldo_ana { regulator-compatible = "ab8500_ldo_ana"; - regulator-name = "V-CSI/DSI"; }; }; }; @@ -577,42 +546,42 @@ status = "disabled"; }; - sdi@80126000 { + sdi0_per1@80126000 { compatible = "arm,pl18x", "arm,primecell"; reg = <0x80126000 0x1000>; interrupts = <0 60 0x4>; status = "disabled"; }; - sdi@80118000 { + sdi1_per2@80118000 { compatible = "arm,pl18x", "arm,primecell"; reg = <0x80118000 0x1000>; interrupts = <0 50 0x4>; status = "disabled"; }; - sdi@80005000 { + sdi2_per3@80005000 { compatible = "arm,pl18x", "arm,primecell"; reg = <0x80005000 0x1000>; interrupts = <0 41 0x4>; status = "disabled"; }; - sdi@80119000 { + sdi3_per2@80119000 { compatible = "arm,pl18x", "arm,primecell"; reg = <0x80119000 0x1000>; interrupts = <0 59 0x4>; status = "disabled"; }; - sdi@80114000 { + sdi4_per2@80114000 { compatible = "arm,pl18x", "arm,primecell"; reg = <0x80114000 0x1000>; interrupts = <0 99 0x4>; status = "disabled"; }; - sdi@80008000 { + sdi5_per3@80008000 { compatible = "arm,pl18x", "arm,primecell"; reg = <0x80008000 0x1000>; interrupts = <0 100 0x4>; @@ -660,5 +629,19 @@ ranges = <0 0x50000000 0x4000000>; status = "disabled"; }; + + vmmci: regulator-gpio { + compatible = "regulator-gpio"; + + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2600000>; + regulator-name = "mmci-reg"; + regulator-type = "voltage"; + + gpios = <&tc3589x_gpio 18 0x4>; + gpio-enable = <&tc3589x_gpio 17 0x4>; + states = <1800000 0x1 + 2900000 0x0>; + }; }; }; diff --git a/trunk/arch/arm/boot/dts/evk-pro3.dts b/trunk/arch/arm/boot/dts/evk-pro3.dts index b7354e6506de..96e50f569433 100644 --- a/trunk/arch/arm/boot/dts/evk-pro3.dts +++ b/trunk/arch/arm/boot/dts/evk-pro3.dts @@ -22,10 +22,22 @@ status = "okay"; }; + usart0: serial@fffb0000 { + status = "okay"; + }; + + usart2: serial@fffb8000 { + status = "okay"; + }; + usb1: gadget@fffa4000 { atmel,vbus-gpio = <&pioC 5 0>; status = "okay"; }; + + watchdog@fffffd40 { + status = "okay"; + }; }; usb0: ohci@00500000 { diff --git a/trunk/arch/arm/boot/dts/exynos4.dtsi b/trunk/arch/arm/boot/dts/exynos4.dtsi index a26c3dd58269..3428f1a94dcc 100644 --- a/trunk/arch/arm/boot/dts/exynos4.dtsi +++ b/trunk/arch/arm/boot/dts/exynos4.dtsi @@ -28,6 +28,44 @@ spi0 = &spi_0; spi1 = &spi_1; spi2 = &spi_2; + i2c0 = &i2c_0; + i2c1 = &i2c_1; + i2c2 = &i2c_2; + i2c3 = &i2c_3; + i2c4 = &i2c_4; + i2c5 = &i2c_5; + i2c6 = &i2c_6; + i2c7 = &i2c_7; + }; + + pd_mfc: mfc-power-domain@10023C40 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10023C40 0x20>; + }; + + pd_g3d: g3d-power-domain@10023C60 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10023C60 0x20>; + }; + + pd_lcd0: lcd0-power-domain@10023C80 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10023C80 0x20>; + }; + + pd_tv: tv-power-domain@10023C20 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10023C20 0x20>; + }; + + pd_cam: cam-power-domain@10023C00 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10023C00 0x20>; + }; + + pd_gps: gps-power-domain@10023CE0 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10023CE0 0x20>; }; gic:interrupt-controller@10490000 { @@ -121,7 +159,7 @@ status = "disabled"; }; - i2c@13860000 { + i2c_0: i2c@13860000 { #address-cells = <1>; #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; @@ -130,7 +168,7 @@ status = "disabled"; }; - i2c@13870000 { + i2c_1: i2c@13870000 { #address-cells = <1>; #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; @@ -139,7 +177,7 @@ status = "disabled"; }; - i2c@13880000 { + i2c_2: i2c@13880000 { #address-cells = <1>; #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; @@ -148,7 +186,7 @@ status = "disabled"; }; - i2c@13890000 { + i2c_3: i2c@13890000 { #address-cells = <1>; #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; @@ -157,7 +195,7 @@ status = "disabled"; }; - i2c@138A0000 { + i2c_4: i2c@138A0000 { #address-cells = <1>; #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; @@ -166,7 +204,7 @@ status = "disabled"; }; - i2c@138B0000 { + i2c_5: i2c@138B0000 { #address-cells = <1>; #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; @@ -175,7 +213,7 @@ status = "disabled"; }; - i2c@138C0000 { + i2c_6: i2c@138C0000 { #address-cells = <1>; #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; @@ -184,7 +222,7 @@ status = "disabled"; }; - i2c@138D0000 { + i2c_7: i2c@138D0000 { #address-cells = <1>; #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; diff --git a/trunk/arch/arm/boot/dts/exynos4210-origen.dts b/trunk/arch/arm/boot/dts/exynos4210-origen.dts index 3e68f52e8454..f2710018e84e 100644 --- a/trunk/arch/arm/boot/dts/exynos4210-origen.dts +++ b/trunk/arch/arm/boot/dts/exynos4210-origen.dts @@ -22,38 +22,54 @@ compatible = "insignal,origen", "samsung,exynos4210"; memory { - reg = <0x40000000 0x40000000>; + reg = <0x40000000 0x10000000 + 0x50000000 0x10000000 + 0x60000000 0x10000000 + 0x70000000 0x10000000>; }; chosen { bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc"; }; + mmc_reg: voltage-regulator { + compatible = "regulator-fixed"; + regulator-name = "VMEM_VDD_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&gpx1 1 0>; + enable-active-high; + }; + sdhci@12530000 { - samsung,sdhci-bus-width = <4>; - linux,mmc_cap_4_bit_data; - samsung,sdhci-cd-internal; - gpio-cd = <&gpk2 2 2 3 3>; - gpios = <&gpk2 0 2 0 3>, - <&gpk2 1 2 0 3>, - <&gpk2 3 2 3 3>, - <&gpk2 4 2 3 3>, - <&gpk2 5 2 3 3>, - <&gpk2 6 2 3 3>; + bus-width = <4>; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>; + pinctrl-names = "default"; + vmmc-supply = <&mmc_reg>; status = "okay"; }; sdhci@12510000 { - samsung,sdhci-bus-width = <4>; - linux,mmc_cap_4_bit_data; - samsung,sdhci-cd-internal; - gpio-cd = <&gpk0 2 2 3 3>; - gpios = <&gpk0 0 2 0 3>, - <&gpk0 1 2 0 3>, - <&gpk0 3 2 3 3>, - <&gpk0 4 2 3 3>, - <&gpk0 5 2 3 3>, - <&gpk0 6 2 3 3>; + bus-width = <4>; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_cd>; + pinctrl-names = "default"; + vmmc-supply = <&mmc_reg>; + status = "okay"; + }; + + serial@13800000 { + status = "okay"; + }; + + serial@13810000 { + status = "okay"; + }; + + serial@13820000 { + status = "okay"; + }; + + serial@13830000 { status = "okay"; }; @@ -64,35 +80,35 @@ up { label = "Up"; - gpios = <&gpx2 0 0 0x10000 2>; + gpios = <&gpx2 0 1>; linux,code = <103>; gpio-key,wakeup; }; down { label = "Down"; - gpios = <&gpx2 1 0 0x10000 2>; + gpios = <&gpx2 1 1>; linux,code = <108>; gpio-key,wakeup; }; back { label = "Back"; - gpios = <&gpx1 7 0 0x10000 2>; + gpios = <&gpx1 7 1>; linux,code = <158>; gpio-key,wakeup; }; home { label = "Home"; - gpios = <&gpx1 6 0 0x10000 2>; + gpios = <&gpx1 6 1>; linux,code = <102>; gpio-key,wakeup; }; menu { label = "Menu"; - gpios = <&gpx1 5 0 0x10000 2>; + gpios = <&gpx1 5 1>; linux,code = <139>; gpio-key,wakeup; }; @@ -101,7 +117,7 @@ leds { compatible = "gpio-leds"; status { - gpios = <&gpx1 3 0 0x10000 2>; + gpios = <&gpx1 3 1>; linux,default-trigger = "heartbeat"; }; }; diff --git a/trunk/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/trunk/arch/arm/boot/dts/exynos4210-pinctrl.dtsi index b12cf272ad0d..55a2efb763d1 100644 --- a/trunk/arch/arm/boot/dts/exynos4210-pinctrl.dtsi +++ b/trunk/arch/arm/boot/dts/exynos4210-pinctrl.dtsi @@ -16,6 +16,134 @@ / { pinctrl@11400000 { + gpa0: gpa0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa1: gpa1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb: gpb { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc0: gpc0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc1: gpc1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd0: gpd0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd1: gpd1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe0: gpe0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe1: gpe1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe2: gpe2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe3: gpe3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe4: gpe4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf2: gpf2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf3: gpf3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + uart0_data: uart0-data { samsung,pins = "gpa0-0", "gpa0-1"; samsung,pin-function = <0x2>; @@ -205,200 +333,345 @@ }; pinctrl@11000000 { + gpj0: gpj0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj1: gpj1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk0: gpk0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk1: gpk1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk2: gpk2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk3: gpk3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpl0: gpl0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpl1: gpl1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpl2: gpl2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpy0: gpy0 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy1: gpy1 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy2: gpy2 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy3: gpy3 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy4: gpy4 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy5: gpy5 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy6: gpy6 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpx0: gpx0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, + <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>; + #interrupt-cells = <2>; + }; + + gpx1: gpx1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, + <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; + #interrupt-cells = <2>; + }; + + gpx2: gpx2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpx3: gpx3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + sd0_clk: sd0-clk { samsung,pins = "gpk0-0"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd0_cmd: sd0-cmd { samsung,pins = "gpk0-1"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd0_cd: sd0-cd { samsung,pins = "gpk0-2"; samsung,pin-function = <2>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd0_bus1: sd0-bus-width1 { samsung,pins = "gpk0-3"; samsung,pin-function = <2>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd0_bus4: sd0-bus-width4 { samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; samsung,pin-function = <2>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd0_bus8: sd0-bus-width8 { samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; samsung,pin-function = <3>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd4_clk: sd4-clk { samsung,pins = "gpk0-0"; samsung,pin-function = <3>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd4_cmd: sd4-cmd { samsung,pins = "gpk0-1"; samsung,pin-function = <3>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd4_cd: sd4-cd { samsung,pins = "gpk0-2"; samsung,pin-function = <3>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd4_bus1: sd4-bus-width1 { samsung,pins = "gpk0-3"; samsung,pin-function = <3>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd4_bus4: sd4-bus-width4 { samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; samsung,pin-function = <3>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd4_bus8: sd4-bus-width8 { samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; samsung,pin-function = <3>; samsung,pin-pud = <4>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd1_clk: sd1-clk { samsung,pins = "gpk1-0"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd1_cmd: sd1-cmd { samsung,pins = "gpk1-1"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd1_cd: sd1-cd { samsung,pins = "gpk1-2"; samsung,pin-function = <2>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd1_bus1: sd1-bus-width1 { samsung,pins = "gpk1-3"; samsung,pin-function = <2>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd1_bus4: sd1-bus-width4 { samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; samsung,pin-function = <2>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd2_clk: sd2-clk { samsung,pins = "gpk2-0"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd2_cmd: sd2-cmd { samsung,pins = "gpk2-1"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd2_cd: sd2-cd { samsung,pins = "gpk2-2"; samsung,pin-function = <2>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd2_bus1: sd2-bus-width1 { samsung,pins = "gpk2-3"; samsung,pin-function = <2>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd2_bus4: sd2-bus-width4 { samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6"; samsung,pin-function = <2>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd2_bus8: sd2-bus-width8 { samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; samsung,pin-function = <3>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd3_clk: sd3-clk { samsung,pins = "gpk3-0"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd3_cmd: sd3-cmd { samsung,pins = "gpk3-1"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd3_cd: sd3-cd { samsung,pins = "gpk3-2"; samsung,pin-function = <2>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd3_bus1: sd3-bus-width1 { samsung,pins = "gpk3-3"; samsung,pin-function = <2>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; sd3_bus4: sd3-bus-width4 { samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; samsung,pin-function = <2>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samsung,pin-drv = <3>; }; eint0: ext-int0 { @@ -438,6 +711,11 @@ }; pinctrl@03860000 { + gpz: gpz { + gpio-controller; + #gpio-cells = <2>; + }; + i2s0_bus: i2s0-bus { samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", "gpz-4", "gpz-5", "gpz-6"; diff --git a/trunk/arch/arm/boot/dts/exynos4210-smdkv310.dts b/trunk/arch/arm/boot/dts/exynos4210-smdkv310.dts index 63610c3ba3af..9b23a8255e39 100644 --- a/trunk/arch/arm/boot/dts/exynos4210-smdkv310.dts +++ b/trunk/arch/arm/boot/dts/exynos4210-smdkv310.dts @@ -43,6 +43,22 @@ status = "okay"; }; + serial@13800000 { + status = "okay"; + }; + + serial@13810000 { + status = "okay"; + }; + + serial@13820000 { + status = "okay"; + }; + + serial@13830000 { + status = "okay"; + }; + keypad@100A0000 { samsung,keypad-num-rows = <2>; samsung,keypad-num-columns = <8>; diff --git a/trunk/arch/arm/boot/dts/exynos4210-trats.dts b/trunk/arch/arm/boot/dts/exynos4210-trats.dts index a21511c14071..c346b64dff55 100644 --- a/trunk/arch/arm/boot/dts/exynos4210-trats.dts +++ b/trunk/arch/arm/boot/dts/exynos4210-trats.dts @@ -35,24 +35,15 @@ regulator-name = "VMEM_VDD_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; - gpio = <&gpk0 2 1 0 0>; + gpio = <&gpk0 2 0>; enable-active-high; }; sdhci_emmc: sdhci@12510000 { bus-width = <8>; non-removable; - broken-voltage; - gpios = <&gpk0 0 2 0 3>, - <&gpk0 1 2 0 3>, - <&gpk0 3 2 2 3>, - <&gpk0 4 2 2 3>, - <&gpk0 5 2 2 3>, - <&gpk0 6 2 2 3>, - <&gpk1 3 3 3 3>, - <&gpk1 4 3 3 3>, - <&gpk1 5 3 3 3>, - <&gpk1 6 3 3 3>; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>; + pinctrl-names = "default"; vmmc-supply = <&vemmc_reg>; status = "okay"; }; @@ -73,12 +64,74 @@ status = "okay"; }; + gpio-keys { + compatible = "gpio-keys"; + + vol-down-key { + gpios = <&gpx2 1 1>; + linux,code = <114>; + label = "volume down"; + debounce-interval = <10>; + }; + + vol-up-key { + gpios = <&gpx2 0 1>; + linux,code = <115>; + label = "volume up"; + debounce-interval = <10>; + }; + + power-key { + gpios = <&gpx2 7 1>; + linux,code = <116>; + label = "power"; + debounce-interval = <10>; + gpio-key,wakeup; + }; + + ok-key { + gpios = <&gpx3 5 1>; + linux,code = <352>; + label = "ok"; + debounce-interval = <10>; + }; + }; + + tsp_reg: voltage-regulator { + compatible = "regulator-fixed"; + regulator-name = "TSP_FIXED_VOLTAGES"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&gpl0 3 0>; + enable-active-high; + }; + + i2c@13890000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-slave-addr = <0x10>; + samsung,i2c-max-bus-freq = <400000>; + pinctrl-0 = <&i2c3_bus>; + pinctrl-names = "default"; + status = "okay"; + + mms114-touchscreen@48 { + compatible = "melfas,mms114"; + reg = <0x48>; + interrupt-parent = <&gpx0>; + interrupts = <4 2>; + x-size = <720>; + y-size = <1280>; + avdd-supply = <&tsp_reg>; + vdd-supply = <&tsp_reg>; + }; + }; + i2c@138B0000 { samsung,i2c-sda-delay = <100>; samsung,i2c-slave-addr = <0x10>; samsung,i2c-max-bus-freq = <100000>; - gpios = <&gpb 6 3 3 0>, - <&gpb 7 3 3 0>; + pinctrl-0 = <&i2c5_bus>; + pinctrl-names = "default"; status = "okay"; max8997_pmic@66 { @@ -93,9 +146,9 @@ max8997,pmic-ignore-gpiodvs-side-effect; max8997,pmic-buck125-default-dvs-idx = <0>; - max8997,pmic-buck125-dvs-gpios = <&gpx0 5 1 0 0>, - <&gpx0 6 1 0 0>, - <&gpl0 0 1 0 0>; + max8997,pmic-buck125-dvs-gpios = <&gpx0 5 0>, + <&gpx0 6 0>, + <&gpl0 0 0>; max8997,pmic-buck1-dvs-voltage = <1350000>, <1300000>, <1250000>, <1200000>, diff --git a/trunk/arch/arm/boot/dts/exynos4210.dtsi b/trunk/arch/arm/boot/dts/exynos4210.dtsi index 214c557eda7f..e31bfc4a6f09 100644 --- a/trunk/arch/arm/boot/dts/exynos4210.dtsi +++ b/trunk/arch/arm/boot/dts/exynos4210.dtsi @@ -31,6 +31,11 @@ pinctrl2 = &pinctrl_2; }; + pd_lcd1: lcd1-power-domain@10023CA0 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10023CA0 0x20>; + }; + gic:interrupt-controller@10490000 { cpu-offset = <0x8000>; }; @@ -46,27 +51,17 @@ compatible = "samsung,pinctrl-exynos4210"; reg = <0x11400000 0x1000>; interrupts = <0 47 0>; - interrupt-controller; - #interrupt-cells = <2>; }; pinctrl_1: pinctrl@11000000 { compatible = "samsung,pinctrl-exynos4210"; reg = <0x11000000 0x1000>; interrupts = <0 46 0>; - interrupt-controller; - #interrupt-cells = <2>; wakup_eint: wakeup-interrupt-controller { compatible = "samsung,exynos4210-wakeup-eint"; interrupt-parent = <&gic>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, - <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, - <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, - <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>, - <0 32 0>; + interrupts = <0 32 0>; }; }; @@ -75,232 +70,10 @@ reg = <0x03860000 0x1000>; }; - gpio-controllers { - #address-cells = <1>; - #size-cells = <1>; - gpio-controller; - ranges; - - gpa0: gpio-controller@11400000 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11400000 0x20>; - #gpio-cells = <4>; - }; - - gpa1: gpio-controller@11400020 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11400020 0x20>; - #gpio-cells = <4>; - }; - - gpb: gpio-controller@11400040 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11400040 0x20>; - #gpio-cells = <4>; - }; - - gpc0: gpio-controller@11400060 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11400060 0x20>; - #gpio-cells = <4>; - }; - - gpc1: gpio-controller@11400080 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11400080 0x20>; - #gpio-cells = <4>; - }; - - gpd0: gpio-controller@114000A0 { - compatible = "samsung,exynos4-gpio"; - reg = <0x114000A0 0x20>; - #gpio-cells = <4>; - }; - - gpd1: gpio-controller@114000C0 { - compatible = "samsung,exynos4-gpio"; - reg = <0x114000C0 0x20>; - #gpio-cells = <4>; - }; - - gpe0: gpio-controller@114000E0 { - compatible = "samsung,exynos4-gpio"; - reg = <0x114000E0 0x20>; - #gpio-cells = <4>; - }; - - gpe1: gpio-controller@11400100 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11400100 0x20>; - #gpio-cells = <4>; - }; - - gpe2: gpio-controller@11400120 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11400120 0x20>; - #gpio-cells = <4>; - }; - - gpe3: gpio-controller@11400140 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11400140 0x20>; - #gpio-cells = <4>; - }; - - gpe4: gpio-controller@11400160 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11400160 0x20>; - #gpio-cells = <4>; - }; - - gpf0: gpio-controller@11400180 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11400180 0x20>; - #gpio-cells = <4>; - }; - - gpf1: gpio-controller@114001A0 { - compatible = "samsung,exynos4-gpio"; - reg = <0x114001A0 0x20>; - #gpio-cells = <4>; - }; - - gpf2: gpio-controller@114001C0 { - compatible = "samsung,exynos4-gpio"; - reg = <0x114001C0 0x20>; - #gpio-cells = <4>; - }; - - gpf3: gpio-controller@114001E0 { - compatible = "samsung,exynos4-gpio"; - reg = <0x114001E0 0x20>; - #gpio-cells = <4>; - }; - - gpj0: gpio-controller@11000000 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11000000 0x20>; - #gpio-cells = <4>; - }; - - gpj1: gpio-controller@11000020 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11000020 0x20>; - #gpio-cells = <4>; - }; - - gpk0: gpio-controller@11000040 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11000040 0x20>; - #gpio-cells = <4>; - }; - - gpk1: gpio-controller@11000060 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11000060 0x20>; - #gpio-cells = <4>; - }; - - gpk2: gpio-controller@11000080 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11000080 0x20>; - #gpio-cells = <4>; - }; - - gpk3: gpio-controller@110000A0 { - compatible = "samsung,exynos4-gpio"; - reg = <0x110000A0 0x20>; - #gpio-cells = <4>; - }; - - gpl0: gpio-controller@110000C0 { - compatible = "samsung,exynos4-gpio"; - reg = <0x110000C0 0x20>; - #gpio-cells = <4>; - }; - - gpl1: gpio-controller@110000E0 { - compatible = "samsung,exynos4-gpio"; - reg = <0x110000E0 0x20>; - #gpio-cells = <4>; - }; - - gpl2: gpio-controller@11000100 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11000100 0x20>; - #gpio-cells = <4>; - }; - - gpy0: gpio-controller@11000120 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11000120 0x20>; - #gpio-cells = <4>; - }; - - gpy1: gpio-controller@11000140 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11000140 0x20>; - #gpio-cells = <4>; - }; - - gpy2: gpio-controller@11000160 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11000160 0x20>; - #gpio-cells = <4>; - }; - - gpy3: gpio-controller@11000180 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11000180 0x20>; - #gpio-cells = <4>; - }; - - gpy4: gpio-controller@110001A0 { - compatible = "samsung,exynos4-gpio"; - reg = <0x110001A0 0x20>; - #gpio-cells = <4>; - }; - - gpy5: gpio-controller@110001C0 { - compatible = "samsung,exynos4-gpio"; - reg = <0x110001C0 0x20>; - #gpio-cells = <4>; - }; - - gpy6: gpio-controller@110001E0 { - compatible = "samsung,exynos4-gpio"; - reg = <0x110001E0 0x20>; - #gpio-cells = <4>; - }; - - gpx0: gpio-controller@11000C00 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11000C00 0x20>; - #gpio-cells = <4>; - }; - - gpx1: gpio-controller@11000C20 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11000C20 0x20>; - #gpio-cells = <4>; - }; - - gpx2: gpio-controller@11000C40 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11000C40 0x20>; - #gpio-cells = <4>; - }; - - gpx3: gpio-controller@11000C60 { - compatible = "samsung,exynos4-gpio"; - reg = <0x11000C60 0x20>; - #gpio-cells = <4>; - }; - - gpz: gpio-controller@03860000 { - compatible = "samsung,exynos4-gpio"; - reg = <0x03860000 0x20>; - #gpio-cells = <4>; - }; + tmu@100C0000 { + compatible = "samsung,exynos4210-tmu"; + interrupt-parent = <&combiner>; + reg = <0x100C0000 0x100>; + interrupts = <2 4>; }; }; diff --git a/trunk/arch/arm/boot/dts/exynos4212.dtsi b/trunk/arch/arm/boot/dts/exynos4212.dtsi new file mode 100644 index 000000000000..c6ae2005961f --- /dev/null +++ b/trunk/arch/arm/boot/dts/exynos4212.dtsi @@ -0,0 +1,28 @@ +/* + * Samsung's Exynos4212 SoC device tree source + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung's Exynos4212 SoC device nodes are listed in this file. Exynos4212 + * based board files can include this file and provide values for board specfic + * bindings. + * + * Note: This file does not include device nodes for all the controllers in + * Exynos4212 SoC. As device tree coverage for Exynos4212 increases, additional + * nodes can be added to this file. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/include/ "exynos4x12.dtsi" + +/ { + compatible = "samsung,exynos4212"; + + gic:interrupt-controller@10490000 { + cpu-offset = <0x8000>; + }; +}; diff --git a/trunk/arch/arm/boot/dts/exynos4412-smdk4412.dts b/trunk/arch/arm/boot/dts/exynos4412-smdk4412.dts new file mode 100644 index 000000000000..f05bf575cc45 --- /dev/null +++ b/trunk/arch/arm/boot/dts/exynos4412-smdk4412.dts @@ -0,0 +1,45 @@ +/* + * Samsung's Exynos4412 based SMDK board device tree source + * + * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Device tree source file for Samsung's SMDK4412 board which is based on + * Samsung's Exynos4412 SoC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +/include/ "exynos4412.dtsi" + +/ { + model = "Samsung SMDK evaluation board based on Exynos4412"; + compatible = "samsung,smdk4412", "samsung,exynos4412"; + + memory { + reg = <0x40000000 0x40000000>; + }; + + chosen { + bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc"; + }; + + serial@13800000 { + status = "okay"; + }; + + serial@13810000 { + status = "okay"; + }; + + serial@13820000 { + status = "okay"; + }; + + serial@13830000 { + status = "okay"; + }; +}; diff --git a/trunk/arch/arm/boot/dts/exynos4412.dtsi b/trunk/arch/arm/boot/dts/exynos4412.dtsi new file mode 100644 index 000000000000..d7dfe312772a --- /dev/null +++ b/trunk/arch/arm/boot/dts/exynos4412.dtsi @@ -0,0 +1,28 @@ +/* + * Samsung's Exynos4412 SoC device tree source + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung's Exynos4412 SoC device nodes are listed in this file. Exynos4412 + * based board files can include this file and provide values for board specfic + * bindings. + * + * Note: This file does not include device nodes for all the controllers in + * Exynos4412 SoC. As device tree coverage for Exynos4412 increases, additional + * nodes can be added to this file. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/include/ "exynos4x12.dtsi" + +/ { + compatible = "samsung,exynos4412"; + + gic:interrupt-controller@10490000 { + cpu-offset = <0x4000>; + }; +}; diff --git a/trunk/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/trunk/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi new file mode 100644 index 000000000000..8e6115adcd97 --- /dev/null +++ b/trunk/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi @@ -0,0 +1,965 @@ +/* + * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung's Exynos4x12 SoCs pin-mux and pin-config optiosn are listed as device + * tree nodes are listed in this file. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/ { + pinctrl@11400000 { + gpa0: gpa0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa1: gpa1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb: gpb { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc0: gpc0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc1: gpc1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd0: gpd0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd1: gpd1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf2: gpf2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf3: gpf3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj0: gpj0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj1: gpj1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + uart0_data: uart0-data { + samsung,pins = "gpa0-0", "gpa0-1"; + samsung,pin-function = <0x2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart0_fctl: uart0-fctl { + samsung,pins = "gpa0-2", "gpa0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart1_data: uart1-data { + samsung,pins = "gpa0-4", "gpa0-5"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart1_fctl: uart1-fctl { + samsung,pins = "gpa0-6", "gpa0-7"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + i2c2_bus: i2c2-bus { + samsung,pins = "gpa0-6", "gpa0-7"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + uart2_data: uart2-data { + samsung,pins = "gpa1-0", "gpa1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart2_fctl: uart2-fctl { + samsung,pins = "gpa1-2", "gpa1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart_audio_a: uart-audio-a { + samsung,pins = "gpa1-0", "gpa1-1"; + samsung,pin-function = <4>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + i2c3_bus: i2c3-bus { + samsung,pins = "gpa1-2", "gpa1-3"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + uart3_data: uart3-data { + samsung,pins = "gpa1-4", "gpa1-5"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart_audio_b: uart-audio-b { + samsung,pins = "gpa1-4", "gpa1-5"; + samsung,pin-function = <4>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + spi0_bus: spi0-bus { + samsung,pins = "gpb-0", "gpb-2", "gpb-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c4_bus: i2c4-bus { + samsung,pins = "gpb-0", "gpb-1"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + spi1_bus: spi1-bus { + samsung,pins = "gpb-4", "gpb-6", "gpb-7"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c5_bus: i2c5-bus { + samsung,pins = "gpb-2", "gpb-3"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2s1_bus: i2s1-bus { + samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", + "gpc0-4"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pcm1_bus: pcm1-bus { + samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", + "gpc0-4"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + ac97_bus: ac97-bus { + samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", + "gpc0-4"; + samsung,pin-function = <4>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + i2s2_bus: i2s2-bus { + samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", + "gpc1-4"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pcm2_bus: pcm2-bus { + samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", + "gpc1-4"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + spdif_bus: spdif-bus { + samsung,pins = "gpc1-0", "gpc1-1"; + samsung,pin-function = <4>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + i2c6_bus: i2c6-bus { + samsung,pins = "gpc1-3", "gpc1-4"; + samsung,pin-function = <4>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + spi2_bus: spi2-bus { + samsung,pins = "gpc1-1", "gpc1-3", "gpc1-4"; + samsung,pin-function = <5>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + pwm0_out: pwm0-out { + samsung,pins = "gpd0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pwm1_out: pwm1-out { + samsung,pins = "gpd0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + lcd_ctrl: lcd-ctrl { + samsung,pins = "gpd0-0", "gpd0-1"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + i2c7_bus: i2c7-bus { + samsung,pins = "gpd0-2", "gpd0-3"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + pwm2_out: pwm2-out { + samsung,pins = "gpd0-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pwm3_out: pwm3-out { + samsung,pins = "gpd0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + i2c0_bus: i2c0-bus { + samsung,pins = "gpd1-0", "gpd1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + mipi0_clk: mipi0-clk { + samsung,pins = "gpd1-0", "gpd1-1"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + i2c1_bus: i2c1-bus { + samsung,pins = "gpd1-2", "gpd1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + mipi1_clk: mipi1-clk { + samsung,pins = "gpd1-2", "gpd1-3"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + lcd_clk: lcd-clk { + samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + lcd_data16: lcd-data-width16 { + samsung,pins = "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2", + "gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0", + "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7", + "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + lcd_data18: lcd-data-width18 { + samsung,pins = "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1", + "gpf1-2", "gpf1-3", "gpf1-6", "gpf1-7", + "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", + "gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1", + "gpf3-2", "gpf3-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + lcd_data24: lcd-data-width24 { + samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7", + "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", + "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7", + "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", + "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7", + "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + lcd_ldi: lcd-ldi { + samsung,pins = "gpf3-4"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + cam_port_a: cam-port-a { + samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3", + "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7", + "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-3", + "gpj1-4"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + }; + + pinctrl@11000000 { + gpk0: gpk0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk1: gpk1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk2: gpk2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk3: gpk3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpl0: gpl0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpl1: gpl1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpl2: gpl2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpm0: gpm0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpm1: gpm1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpm2: gpm2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpm3: gpm3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpm4: gpm4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpy0: gpy0 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy1: gpy1 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy2: gpy2 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy3: gpy3 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy4: gpy4 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy5: gpy5 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy6: gpy6 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpx0: gpx0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, + <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>; + #interrupt-cells = <2>; + }; + + gpx1: gpx1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, + <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; + #interrupt-cells = <2>; + }; + + gpx2: gpx2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpx3: gpx3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + sd0_clk: sd0-clk { + samsung,pins = "gpk0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd0_cmd: sd0-cmd { + samsung,pins = "gpk0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd0_cd: sd0-cd { + samsung,pins = "gpk0-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd0_bus1: sd0-bus-width1 { + samsung,pins = "gpk0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd0_bus4: sd0-bus-width4 { + samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd0_bus8: sd0-bus-width8 { + samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd4_clk: sd4-clk { + samsung,pins = "gpk0-0"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd4_cmd: sd4-cmd { + samsung,pins = "gpk0-1"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd4_cd: sd4-cd { + samsung,pins = "gpk0-2"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd4_bus1: sd4-bus-width1 { + samsung,pins = "gpk0-3"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd4_bus4: sd4-bus-width4 { + samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd4_bus8: sd4-bus-width8 { + samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; + samsung,pin-function = <3>; + samsung,pin-pud = <4>; + samsung,pin-drv = <3>; + }; + + sd1_clk: sd1-clk { + samsung,pins = "gpk1-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd1_cmd: sd1-cmd { + samsung,pins = "gpk1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd1_cd: sd1-cd { + samsung,pins = "gpk1-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd1_bus1: sd1-bus-width1 { + samsung,pins = "gpk1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd1_bus4: sd1-bus-width4 { + samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd2_clk: sd2-clk { + samsung,pins = "gpk2-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd2_cmd: sd2-cmd { + samsung,pins = "gpk2-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd2_cd: sd2-cd { + samsung,pins = "gpk2-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd2_bus1: sd2-bus-width1 { + samsung,pins = "gpk2-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd2_bus4: sd2-bus-width4 { + samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd2_bus8: sd2-bus-width8 { + samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd3_clk: sd3-clk { + samsung,pins = "gpk3-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd3_cmd: sd3-cmd { + samsung,pins = "gpk3-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd3_cd: sd3-cd { + samsung,pins = "gpk3-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd3_bus1: sd3-bus-width1 { + samsung,pins = "gpk3-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd3_bus4: sd3-bus-width4 { + samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + keypad_col0: keypad-col0 { + samsung,pins = "gpl2-0"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_col1: keypad-col1 { + samsung,pins = "gpl2-1"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_col2: keypad-col2 { + samsung,pins = "gpl2-2"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_col3: keypad-col3 { + samsung,pins = "gpl2-3"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_col4: keypad-col4 { + samsung,pins = "gpl2-4"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_col5: keypad-col5 { + samsung,pins = "gpl2-5"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_col6: keypad-col6 { + samsung,pins = "gpl2-6"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + keypad_col7: keypad-col7 { + samsung,pins = "gpl2-7"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + cam_port_b: cam-port-b { + samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3", + "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7", + "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1", + "gpm2-2"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + eint0: ext-int0 { + samsung,pins = "gpx0-0"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + eint8: ext-int8 { + samsung,pins = "gpx1-0"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + eint15: ext-int15 { + samsung,pins = "gpx1-7"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + eint16: ext-int16 { + samsung,pins = "gpx2-0"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + eint31: ext-int31 { + samsung,pins = "gpx3-7"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + }; + + pinctrl@03860000 { + gpz: gpz { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + i2s0_bus: i2s0-bus { + samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", + "gpz-4", "gpz-5", "gpz-6"; + samsung,pin-function = <0x2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pcm0_bus: pcm0-bus { + samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", + "gpz-4"; + samsung,pin-function = <0x3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + }; + + pinctrl@106E0000 { + gpv0: gpv0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv1: gpv1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv2: gpv2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv3: gpv3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv4: gpv4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + c2c_bus: c2c-bus { + samsung,pins = "gpv0-0", "gpv0-1", "gpv0-2", "gpv0-3", + "gpv0-4", "gpv0-5", "gpv0-6", "gpv0-7", + "gpv1-0", "gpv1-1", "gpv1-2", "gpv1-3", + "gpv1-4", "gpv1-5", "gpv1-6", "gpv1-7", + "gpv2-0", "gpv2-1", "gpv2-2", "gpv2-3", + "gpv2-4", "gpv2-5", "gpv2-6", "gpv2-7", + "gpv3-0", "gpv3-1", "gpv3-2", "gpv3-3", + "gpv3-4", "gpv3-5", "gpv3-6", "gpv3-7", + "gpv4-0", "gpv4-1"; + samsung,pin-function = <0x2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/exynos4x12.dtsi b/trunk/arch/arm/boot/dts/exynos4x12.dtsi new file mode 100644 index 000000000000..179a62e46c9d --- /dev/null +++ b/trunk/arch/arm/boot/dts/exynos4x12.dtsi @@ -0,0 +1,69 @@ +/* + * Samsung's Exynos4x12 SoCs device tree source + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung's Exynos4x12 SoCs device nodes are listed in this file. Exynos4x12 + * based board files can include this file and provide values for board specfic + * bindings. + * + * Note: This file does not include device nodes for all the controllers in + * Exynos4x12 SoC. As device tree coverage for Exynos4x12 increases, additional + * nodes can be added to this file. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/include/ "exynos4.dtsi" +/include/ "exynos4x12-pinctrl.dtsi" + +/ { + aliases { + pinctrl0 = &pinctrl_0; + pinctrl1 = &pinctrl_1; + pinctrl2 = &pinctrl_2; + pinctrl3 = &pinctrl_3; + }; + + combiner:interrupt-controller@10440000 { + interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, + <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, + <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, + <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, + <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>; + }; + + pinctrl_0: pinctrl@11400000 { + compatible = "samsung,pinctrl-exynos4x12"; + reg = <0x11400000 0x1000>; + interrupts = <0 47 0>; + }; + + pinctrl_1: pinctrl@11000000 { + compatible = "samsung,pinctrl-exynos4x12"; + reg = <0x11000000 0x1000>; + interrupts = <0 46 0>; + + wakup_eint: wakeup-interrupt-controller { + compatible = "samsung,exynos4210-wakeup-eint"; + interrupt-parent = <&gic>; + interrupts = <0 32 0>; + }; + }; + + pinctrl_2: pinctrl@03860000 { + compatible = "samsung,pinctrl-exynos4x12"; + reg = <0x03860000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <10 0>; + }; + + pinctrl_3: pinctrl@106E0000 { + compatible = "samsung,pinctrl-exynos4x12"; + reg = <0x106E0000 0x1000>; + interrupts = <0 72 0>; + }; +}; diff --git a/trunk/arch/arm/boot/dts/exynos5250-smdk5250.dts b/trunk/arch/arm/boot/dts/exynos5250-smdk5250.dts index a352df403b7a..942d5761ca97 100644 --- a/trunk/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/trunk/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -17,10 +17,6 @@ compatible = "samsung,smdk5250", "samsung,exynos5250"; aliases { - mshc0 = &dwmmc_0; - mshc1 = &dwmmc_1; - mshc2 = &dwmmc_2; - mshc3 = &dwmmc_3; }; memory { @@ -55,8 +51,31 @@ }; }; + i2c@121D0000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <40000>; + samsung,i2c-slave-addr = <0x38>; + + sata-phy { + compatible = "samsung,sata-phy"; + reg = <0x38>; + }; + }; + + sata@122F0000 { + samsung,sata-freq = <66>; + }; + i2c@12C80000 { - status = "disabled"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + gpios = <&gpa0 6 3 3 0>, + <&gpa0 7 3 3 0>; + + hdmiddc@50 { + compatible = "samsung,exynos5-hdmiddc"; + reg = <0x50>; + }; }; i2c@12C90000 { @@ -79,7 +98,17 @@ status = "disabled"; }; - dwmmc_0: dwmmc0@12200000 { + i2c@12CE0000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + + hdmiphy@38 { + compatible = "samsung,exynos5-hdmiphy"; + reg = <0x38>; + }; + }; + + dwmmc0@12200000 { num-slots = <1>; supports-highspeed; broken-cd; @@ -100,11 +129,11 @@ }; }; - dwmmc_1: dwmmc1@12210000 { + dwmmc1@12210000 { status = "disabled"; }; - dwmmc_2: dwmmc2@12220000 { + dwmmc2@12220000 { num-slots = <1>; supports-highspeed; fifo-depth = <0x80>; @@ -125,7 +154,7 @@ }; }; - dwmmc_3: dwmmc3@12230000 { + dwmmc3@12230000 { status = "disabled"; }; @@ -166,4 +195,13 @@ spi_2: spi@12d40000 { status = "disabled"; }; + + hdmi { + hpd-gpio = <&gpx3 7 0xf 1 3>; + }; + + codec@11000000 { + samsung,mfc-r = <0x43000000 0x800000>; + samsung,mfc-l = <0x51000000 0x800000>; + }; }; diff --git a/trunk/arch/arm/boot/dts/exynos5250-snow.dts b/trunk/arch/arm/boot/dts/exynos5250-snow.dts new file mode 100644 index 000000000000..17dd951c1cd2 --- /dev/null +++ b/trunk/arch/arm/boot/dts/exynos5250-snow.dts @@ -0,0 +1,43 @@ +/* + * Google Snow board device tree source + * + * Copyright (c) 2012 Google, Inc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +/include/ "exynos5250.dtsi" +/include/ "cros5250-common.dtsi" + +/ { + model = "Google Snow"; + compatible = "google,snow", "samsung,exynos5250"; + + gpio-keys { + compatible = "gpio-keys"; + + lid-switch { + label = "Lid"; + gpios = <&gpx3 5 0 0x10000 0>; + linux,input-type = <5>; /* EV_SW */ + linux,code = <0>; /* SW_LID */ + debounce-interval = <1>; + gpio-key,wakeup; + }; + }; + + /* + * On Snow we've got SIP WiFi and so can keep drive strengths low to + * reduce EMI. + */ + dwmmc3@12230000 { + slot@0 { + gpios = <&gpc4 0 2 0 0>, <&gpc4 1 2 3 0>, + <&gpc4 3 2 3 0>, <&gpc4 4 2 3 0>, + <&gpc4 5 2 3 0>, <&gpc4 6 2 3 0>; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/exynos5250.dtsi b/trunk/arch/arm/boot/dts/exynos5250.dtsi index dddfd6e444dc..36d8246ea50e 100644 --- a/trunk/arch/arm/boot/dts/exynos5250.dtsi +++ b/trunk/arch/arm/boot/dts/exynos5250.dtsi @@ -31,6 +31,10 @@ gsc1 = &gsc_1; gsc2 = &gsc_2; gsc3 = &gsc_3; + mshc0 = &dwmmc_0; + mshc1 = &dwmmc_1; + mshc2 = &dwmmc_2; + mshc3 = &dwmmc_3; }; gic:interrupt-controller@10481000 { @@ -62,12 +66,24 @@ interrupts = <0 42 0>; }; + codec@11000000 { + compatible = "samsung,mfc-v6"; + reg = <0x11000000 0x10000>; + interrupts = <0 96 0>; + }; + rtc { compatible = "samsung,s3c6410-rtc"; reg = <0x101E0000 0x100>; interrupts = <0 43 0>, <0 44 0>; }; + tmu@10060000 { + compatible = "samsung,exynos5250-tmu"; + reg = <0x10060000 0x100>; + interrupts = <0 65 0>; + }; + serial@12C00000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C00000 0x100>; @@ -92,6 +108,17 @@ interrupts = <0 54 0>; }; + sata@122F0000 { + compatible = "samsung,exynos5-sata-ahci"; + reg = <0x122F0000 0x1ff>; + interrupts = <0 115 0>; + }; + + sata-phy@12170000 { + compatible = "samsung,exynos5-sata-phy"; + reg = <0x12170000 0x1ff>; + }; + i2c@12C60000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C60000 0x100>; @@ -156,6 +183,21 @@ #size-cells = <0>; }; + i2c@12CE0000 { + compatible = "samsung,s3c2440-hdmiphy-i2c"; + reg = <0x12CE0000 0x1000>; + interrupts = <0 64 0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@121D0000 { + compatible = "samsung,exynos5-sata-phy-i2c"; + reg = <0x121D0000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + }; + spi_0: spi@12d20000 { compatible = "samsung,exynos4210-spi"; reg = <0x12d20000 0x100>; @@ -186,7 +228,7 @@ #size-cells = <0>; }; - dwmmc0@12200000 { + dwmmc_0: dwmmc0@12200000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12200000 0x1000>; interrupts = <0 75 0>; @@ -194,7 +236,7 @@ #size-cells = <0>; }; - dwmmc1@12210000 { + dwmmc_1: dwmmc1@12210000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12210000 0x1000>; interrupts = <0 76 0>; @@ -202,7 +244,7 @@ #size-cells = <0>; }; - dwmmc2@12220000 { + dwmmc_2: dwmmc2@12220000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12220000 0x1000>; interrupts = <0 77 0>; @@ -210,7 +252,7 @@ #size-cells = <0>; }; - dwmmc3@12230000 { + dwmmc_3: dwmmc3@12230000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12230000 0x1000>; interrupts = <0 78 0>; @@ -520,4 +562,16 @@ reg = <0x13e30000 0x1000>; interrupts = <0 88 0>; }; + + hdmi { + compatible = "samsung,exynos5-hdmi"; + reg = <0x14530000 0x100000>; + interrupts = <0 95 0>; + }; + + mixer { + compatible = "samsung,exynos5-mixer"; + reg = <0x14450000 0x10000>; + interrupts = <0 94 0>; + }; }; diff --git a/trunk/arch/arm/boot/dts/href.dtsi b/trunk/arch/arm/boot/dts/href.dtsi new file mode 100644 index 000000000000..592fb9dc35bd --- /dev/null +++ b/trunk/arch/arm/boot/dts/href.dtsi @@ -0,0 +1,273 @@ +/* + * Copyright 2012 ST-Ericsson AB + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/include/ "dbx5x0.dtsi" + +/ { + memory { + reg = <0x00000000 0x20000000>; + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + button@1 { + linux,code = <11>; + label = "SFH7741 Proximity Sensor"; + }; + }; + + soc-u9500 { + uart@80120000 { + status = "okay"; + }; + + uart@80121000 { + status = "okay"; + }; + + uart@80007000 { + status = "okay"; + }; + + i2c@80004000 { + tc3589x@42 { + compatible = "tc3589x"; + reg = <0x42>; + interrupt-parent = <&gpio6>; + interrupts = <25 0x1>; + + interrupt-controller; + #interrupt-cells = <2>; + + tc3589x_gpio: tc3589x_gpio { + compatible = "tc3589x-gpio"; + interrupts = <0 0x1>; + + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + }; + }; + }; + + i2c@80128000 { + lp5521@0x33 { + compatible = "lp5521"; + reg = <0x33>; + }; + + lp5521@0x34 { + compatible = "lp5521"; + reg = <0x34>; + }; + + bh1780@0x29 { + compatible = "rohm,bh1780gli"; + reg = <0x33>; + }; + }; + + // External Micro SD slot + sdi0_per1@80126000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <50000000>; + bus-width = <4>; + mmc-cap-sd-highspeed; + mmc-cap-mmc-highspeed; + vmmc-supply = <&ab8500_ldo_aux3_reg>; + + cd-gpios = <&tc3589x_gpio 3 0x4>; + + status = "okay"; + }; + + // WLAN SDIO channel + sdi1_per2@80118000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <50000000>; + bus-width = <4>; + + status = "okay"; + }; + + // PoP:ed eMMC + sdi2_per3@80005000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <50000000>; + bus-width = <8>; + mmc-cap-mmc-highspeed; + + status = "okay"; + }; + + // On-board eMMC + sdi4_per2@80114000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <50000000>; + bus-width = <8>; + mmc-cap-mmc-highspeed; + vmmc-supply = <&ab8500_ldo_aux2_reg>; + + status = "okay"; + }; + + sound { + compatible = "stericsson,snd-soc-mop500"; + + stericsson,cpu-dai = <&msp1 &msp3>; + stericsson,audio-codec = <&codec>; + }; + + msp1: msp@80124000 { + status = "okay"; + }; + + msp3: msp@80125000 { + status = "okay"; + }; + + prcmu@80157000 { + db8500-prcmu-regulators { + db8500_vape_reg: db8500_vape { + regulator-name = "db8500-vape"; + }; + + db8500_varm_reg: db8500_varm { + regulator-name = "db8500-varm"; + }; + + db8500_vmodem_reg: db8500_vmodem { + regulator-name = "db8500-vmodem"; + }; + + db8500_vpll_reg: db8500_vpll { + regulator-name = "db8500-vpll"; + }; + + db8500_vsmps1_reg: db8500_vsmps1 { + regulator-name = "db8500-vsmps1"; + }; + + db8500_vsmps2_reg: db8500_vsmps2 { + regulator-name = "db8500-vsmps2"; + }; + + db8500_vsmps3_reg: db8500_vsmps3 { + regulator-name = "db8500-vsmps3"; + }; + + db8500_vrf1_reg: db8500_vrf1 { + regulator-name = "db8500-vrf1"; + }; + + db8500_sva_mmdsp_reg: db8500_sva_mmdsp { + regulator-name = "db8500-sva-mmdsp"; + }; + + db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { + regulator-name = "db8500-sva-mmdsp-ret"; + }; + + db8500_sva_pipe_reg: db8500_sva_pipe { + regulator-name = "db8500_sva_pipe"; + }; + + db8500_sia_mmdsp_reg: db8500_sia_mmdsp { + regulator-name = "db8500_sia_mmdsp"; + }; + + db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret { + regulator-name = "db8500-sia-mmdsp-ret"; + }; + + db8500_sia_pipe_reg: db8500_sia_pipe { + regulator-name = "db8500-sia-pipe"; + }; + + db8500_sga_reg: db8500_sga { + regulator-name = "db8500-sga"; + }; + + db8500_b2r2_mcde_reg: db8500_b2r2_mcde { + regulator-name = "db8500-b2r2-mcde"; + }; + + db8500_esram12_reg: db8500_esram12 { + regulator-name = "db8500-esram12"; + }; + + db8500_esram12_ret_reg: db8500_esram12_ret { + regulator-name = "db8500-esram12-ret"; + }; + + db8500_esram34_reg: db8500_esram34 { + regulator-name = "db8500-esram34"; + }; + + db8500_esram34_ret_reg: db8500_esram34_ret { + regulator-name = "db8500-esram34-ret"; + }; + }; + + ab8500@5 { + ab8500-regulators { + ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { + regulator-name = "V-DISPLAY"; + }; + + ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { + regulator-name = "V-eMMC1"; + }; + + ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { + regulator-name = "V-MMC-SD"; + }; + + ab8500_ldo_initcore_reg: ab8500_ldo_initcore { + regulator-name = "V-INTCORE"; + }; + + ab8500_ldo_tvout_reg: ab8500_ldo_tvout { + regulator-name = "V-TVOUT"; + }; + + ab8500_ldo_usb_reg: ab8500_ldo_usb { + regulator-name = "dummy"; + }; + + ab8500_ldo_audio_reg: ab8500_ldo_audio { + regulator-name = "V-AUD"; + }; + + ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { + regulator-name = "V-AMIC1"; + }; + + ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 { + regulator-name = "V-AMIC2"; + }; + + ab8500_ldo_dmic_reg: ab8500_ldo_dmic { + regulator-name = "V-DMIC"; + }; + + ab8500_ldo_ana_reg: ab8500_ldo_ana { + regulator-name = "V-CSI/DSI"; + }; + }; + }; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/hrefprev60.dts b/trunk/arch/arm/boot/dts/hrefprev60.dts new file mode 100644 index 000000000000..b398946fd64a --- /dev/null +++ b/trunk/arch/arm/boot/dts/hrefprev60.dts @@ -0,0 +1,41 @@ +/* + * Copyright 2012 ST-Ericsson AB + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "dbx5x0.dtsi" +/include/ "href.dtsi" +/include/ "stuib.dtsi" + +/ { + model = "ST-Ericsson HREF (pre-v60) platform with Device Tree"; + compatible = "st-ericsson,mop500", "st-ericsson,u8500"; + + gpio_keys { + button@1 { + gpios = <&tc3589x_gpio 7 0x4>; + }; + }; + + soc-u9500 { + i2c@80004000 { + tps61052@33 { + compatible = "tps61052"; + reg = <0x33>; + }; + }; + + i2c@80110000 { + bu21013_tp@0x5c { + reset-gpio = <&tc3589x_gpio 13 0x4>; + }; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/hrefv60plus.dts b/trunk/arch/arm/boot/dts/hrefv60plus.dts index 2131d77dc9c9..55f4191a626e 100644 --- a/trunk/arch/arm/boot/dts/hrefv60plus.dts +++ b/trunk/arch/arm/boot/dts/hrefv60plus.dts @@ -11,85 +11,200 @@ /dts-v1/; /include/ "dbx5x0.dtsi" +/include/ "href.dtsi" +/include/ "stuib.dtsi" / { - model = "ST-Ericsson HREF platform with Device Tree"; - compatible = "st-ericsson,hrefv60+"; + model = "ST-Ericsson HREF (v60+) platform with Device Tree"; + compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500"; - memory { - reg = <0x00000000 0x20000000>; + gpio_keys { + button@1 { + gpios = <&gpio6 25 0x4>; + }; }; soc-u9500 { - uart@80120000 { + i2c@80110000 { + bu21013_tp@0x5c { + reset-gpio = <&gpio4 15 0x4>; + }; + }; + + // External Micro SD slot + sdi0_per1@80126000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <50000000>; + bus-width = <4>; + mmc-cap-sd-highspeed; + mmc-cap-mmc-highspeed; + vmmc-supply = <&ab8500_ldo_aux3_reg>; + + cd-gpios = <&tc3589x_gpio 3 0x4>; + status = "okay"; }; - uart@80121000 { + // WLAN SDIO channel + sdi1_per2@80118000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <50000000>; + bus-width = <4>; + status = "okay"; }; - uart@80007000 { + // PoP:ed eMMC + sdi2_per3@80005000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <50000000>; + bus-width = <8>; + mmc-cap-mmc-highspeed; + status = "okay"; }; - i2c@80004000 { - tc3589x@42 { - compatible = "tc3589x"; - reg = <0x42>; - interrupt-parent = <&gpio6>; - interrupts = <25 0x1>; + // On-board eMMC + sdi4_per2@80114000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <50000000>; + bus-width = <8>; + mmc-cap-mmc-highspeed; + vmmc-supply = <&ab8500_ldo_aux2_reg>; - interrupt-controller; - #interrupt-cells = <2>; + status = "okay"; + }; - tc3589x_gpio: tc3589x_gpio { - compatible = "tc3589x-gpio"; - interrupts = <0 0x1>; + prcmu@80157000 { + db8500-prcmu-regulators { + db8500_vape_reg: db8500_vape { + regulator-name = "db8500-vape"; + }; - interrupt-controller; - #interrupt-cells = <2>; - gpio-controller; - #gpio-cells = <2>; + db8500_varm_reg: db8500_varm { + regulator-name = "db8500-varm"; }; - }; - tps61052@33 { - compatible = "tps61052"; - reg = <0x33>; - }; - }; + db8500_vmodem_reg: db8500_vmodem { + regulator-name = "db8500-vmodem"; + }; - i2c@80128000 { - lp5521@0x33 { - compatible = "lp5521"; - reg = <0x33>; - }; + db8500_vpll_reg: db8500_vpll { + regulator-name = "db8500-vpll"; + }; - lp5521@0x34 { - compatible = "lp5521"; - reg = <0x34>; - }; + db8500_vsmps1_reg: db8500_vsmps1 { + regulator-name = "db8500-vsmps1"; + }; + + db8500_vsmps2_reg: db8500_vsmps2 { + regulator-name = "db8500-vsmps2"; + }; + + db8500_vsmps3_reg: db8500_vsmps3 { + regulator-name = "db8500-vsmps3"; + }; + + db8500_vrf1_reg: db8500_vrf1 { + regulator-name = "db8500-vrf1"; + }; + + db8500_sva_mmdsp_reg: db8500_sva_mmdsp { + regulator-name = "db8500-sva-mmdsp"; + }; + + db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { + regulator-name = "db8500-sva-mmdsp-ret"; + }; + + db8500_sva_pipe_reg: db8500_sva_pipe { + regulator-name = "db8500_sva_pipe"; + }; - bh1780@0x29 { - compatible = "rohm,bh1780gli"; - reg = <0x33>; + db8500_sia_mmdsp_reg: db8500_sia_mmdsp { + regulator-name = "db8500_sia_mmdsp"; + }; + + db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret { + regulator-name = "db8500-sia-mmdsp-ret"; + }; + + db8500_sia_pipe_reg: db8500_sia_pipe { + regulator-name = "db8500-sia-pipe"; + }; + + db8500_sga_reg: db8500_sga { + regulator-name = "db8500-sga"; + }; + + db8500_b2r2_mcde_reg: db8500_b2r2_mcde { + regulator-name = "db8500-b2r2-mcde"; + }; + + db8500_esram12_reg: db8500_esram12 { + regulator-name = "db8500-esram12"; + }; + + db8500_esram12_ret_reg: db8500_esram12_ret { + regulator-name = "db8500-esram12-ret"; + }; + + db8500_esram34_reg: db8500_esram34 { + regulator-name = "db8500-esram34"; + }; + + db8500_esram34_ret_reg: db8500_esram34_ret { + regulator-name = "db8500-esram34-ret"; + }; }; - }; - sound { - compatible = "stericsson,snd-soc-mop500"; + ab8500@5 { + ab8500-regulators { + ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { + regulator-name = "V-DISPLAY"; + }; - stericsson,cpu-dai = <&msp1 &msp3>; - stericsson,audio-codec = <&codec>; - }; + ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { + regulator-name = "V-eMMC1"; + }; - msp1: msp@80124000 { - status = "okay"; - }; + ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { + regulator-name = "V-MMC-SD"; + }; - msp3: msp@80125000 { - status = "okay"; + ab8500_ldo_initcore_reg: ab8500_ldo_initcore { + regulator-name = "V-INTCORE"; + }; + + ab8500_ldo_tvout_reg: ab8500_ldo_tvout { + regulator-name = "V-TVOUT"; + }; + + ab8500_ldo_usb_reg: ab8500_ldo_usb { + regulator-name = "dummy"; + }; + + ab8500_ldo_audio_reg: ab8500_ldo_audio { + regulator-name = "V-AUD"; + }; + + ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { + regulator-name = "V-AMIC1"; + }; + + ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 { + regulator-name = "V-AMIC2"; + }; + + ab8500_ldo_dmic_reg: ab8500_ldo_dmic { + regulator-name = "V-DMIC"; + }; + + ab8500_ldo_ana_reg: ab8500_ldo_ana { + regulator-name = "V-CSI/DSI"; + }; + }; + }; }; }; }; diff --git a/trunk/arch/arm/boot/dts/imx23-olinuxino.dts b/trunk/arch/arm/boot/dts/imx23-olinuxino.dts index 384d8b66f337..7c43b8e70b9f 100644 --- a/trunk/arch/arm/boot/dts/imx23-olinuxino.dts +++ b/trunk/arch/arm/boot/dts/imx23-olinuxino.dts @@ -40,6 +40,15 @@ reg = <0>; fsl,pinmux-ids = < 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + led_pin_gpio0_17: led_gpio0_17@0 { + reg = <0>; + fsl,pinmux-ids = < 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */ >; fsl,drive-strength = <0>; @@ -47,6 +56,15 @@ fsl,pull-up = <0>; }; }; + + ssp1: ssp@80034000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx23-spi"; + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins_a>; + status = "okay"; + }; }; apbx@80040000 { @@ -91,11 +109,12 @@ leds { compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pin_gpio0_17>; user { label = "green"; - gpios = <&gpio2 1 0>; - linux,default-trigger = "default-on"; + gpios = <&gpio2 1 1>; }; }; }; diff --git a/trunk/arch/arm/boot/dts/imx23.dtsi b/trunk/arch/arm/boot/dts/imx23.dtsi index 6d31aa383460..65415c598a5e 100644 --- a/trunk/arch/arm/boot/dts/imx23.dtsi +++ b/trunk/arch/arm/boot/dts/imx23.dtsi @@ -279,6 +279,19 @@ fsl,voltage = <1>; fsl,pull-up = <0>; }; + + spi2_pins_a: spi2@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */ + 0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */ + 0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */ + 0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */ + >; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; + }; }; digctl@8001c000 { diff --git a/trunk/arch/arm/boot/dts/imx25-karo-tx25.dts b/trunk/arch/arm/boot/dts/imx25-karo-tx25.dts new file mode 100644 index 000000000000..d81f8a0b9794 --- /dev/null +++ b/trunk/arch/arm/boot/dts/imx25-karo-tx25.dts @@ -0,0 +1,44 @@ +/* + * Copyright 2012 Sascha Hauer, Pengutronix + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "imx25.dtsi" + +/ { + model = "Ka-Ro TX25"; + compatible = "karo,imx25-tx25", "fsl,imx25"; + + memory { + reg = <0x80000000 0x02000000 0x90000000 0x02000000>; + }; + + soc { + aips@43f00000 { + uart1: serial@43f90000 { + status = "okay"; + }; + }; + + spba@50000000 { + fec: ethernet@50038000 { + status = "okay"; + phy-mode = "rmii"; + }; + }; + + emi@80000000 { + nand@bb000000 { + nand-on-flash-bbt; + status = "okay"; + }; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/imx25.dtsi b/trunk/arch/arm/boot/dts/imx25.dtsi new file mode 100644 index 000000000000..e1b13ebc96d6 --- /dev/null +++ b/trunk/arch/arm/boot/dts/imx25.dtsi @@ -0,0 +1,515 @@ +/* + * Copyright 2012 Sascha Hauer, Pengutronix + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/include/ "skeleton.dtsi" + +/ { + aliases { + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; + serial3 = &uart4; + serial4 = &uart5; + gpio0 = &gpio1; + gpio1 = &gpio2; + gpio2 = &gpio3; + gpio3 = &gpio4; + usb0 = &usbotg; + usb1 = &usbhost1; + }; + + asic: asic-interrupt-controller@68000000 { + compatible = "fsl,imx25-asic", "fsl,avic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x68000000 0x8000000>; + }; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + osc { + compatible = "fsl,imx-osc", "fixed-clock"; + clock-frequency = <24000000>; + }; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + interrupt-parent = <&asic>; + ranges; + + aips@43f00000 { /* AIPS1 */ + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x43f00000 0x100000>; + ranges; + + i2c1: i2c@43f80000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; + reg = <0x43f80000 0x4000>; + clocks = <&clks 48>; + clock-names = ""; + interrupts = <3>; + status = "disabled"; + }; + + i2c3: i2c@43f84000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; + reg = <0x43f84000 0x4000>; + clocks = <&clks 48>; + clock-names = ""; + interrupts = <10>; + status = "disabled"; + }; + + can1: can@43f88000 { + compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan"; + reg = <0x43f88000 0x4000>; + interrupts = <43>; + clocks = <&clks 75>, <&clks 75>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + can2: can@43f8c000 { + compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan"; + reg = <0x43f8c000 0x4000>; + interrupts = <44>; + clocks = <&clks 76>, <&clks 76>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + uart1: serial@43f90000 { + compatible = "fsl,imx25-uart", "fsl,imx21-uart"; + reg = <0x43f90000 0x4000>; + interrupts = <45>; + clocks = <&clks 120>, <&clks 57>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + uart2: serial@43f94000 { + compatible = "fsl,imx25-uart", "fsl,imx21-uart"; + reg = <0x43f94000 0x4000>; + interrupts = <32>; + clocks = <&clks 121>, <&clks 57>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + i2c2: i2c@43f98000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; + reg = <0x43f98000 0x4000>; + clocks = <&clks 48>; + clock-names = ""; + interrupts = <4>; + status = "disabled"; + }; + + owire@43f9c000 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x43f9c000 0x4000>; + clocks = <&clks 51>; + clock-names = ""; + interrupts = <2>; + status = "disabled"; + }; + + spi1: cspi@43fa4000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; + reg = <0x43fa4000 0x4000>; + clocks = <&clks 62>; + clock-names = "ipg"; + interrupts = <14>; + status = "disabled"; + }; + + kpp@43fa8000 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x43fa8000 0x4000>; + clocks = <&clks 102>; + clock-names = ""; + interrupts = <24>; + status = "disabled"; + }; + + iomuxc@43fac000{ + compatible = "fsl,imx25-iomuxc"; + reg = <0x43fac000 0x4000>; + }; + + audmux@43fb0000 { + compatible = "fsl,imx25-audmux", "fsl,imx31-audmux"; + reg = <0x43fb0000 0x4000>; + status = "disabled"; + }; + }; + + spba@50000000 { + compatible = "fsl,spba-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x50000000 0x40000>; + ranges; + + spi3: cspi@50004000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; + reg = <0x50004000 0x4000>; + interrupts = <0>; + clocks = <&clks 80>; + clock-names = "ipg"; + status = "disabled"; + }; + + uart4: serial@50008000 { + compatible = "fsl,imx25-uart", "fsl,imx21-uart"; + reg = <0x50008000 0x4000>; + interrupts = <5>; + clocks = <&clks 123>, <&clks 57>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + uart3: serial@5000c000 { + compatible = "fsl,imx25-uart", "fsl,imx21-uart"; + reg = <0x5000c000 0x4000>; + interrupts = <18>; + clocks = <&clks 122>, <&clks 57>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + spi2: cspi@50010000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; + reg = <0x50010000 0x4000>; + clocks = <&clks 79>; + clock-names = "ipg"; + interrupts = <13>; + status = "disabled"; + }; + + ssi2: ssi@50014000 { + compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; + reg = <0x50014000 0x4000>; + interrupts = <11>; + status = "disabled"; + }; + + esai@50018000 { + reg = <0x50018000 0x4000>; + interrupts = <7>; + }; + + uart5: serial@5002c000 { + compatible = "fsl,imx25-uart", "fsl,imx21-uart"; + reg = <0x5002c000 0x4000>; + interrupts = <40>; + clocks = <&clks 124>, <&clks 57>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + tsc: tsc@50030000 { + compatible = "fsl,imx25-adc", "fsl,imx21-tsc"; + reg = <0x50030000 0x4000>; + interrupts = <46>; + clocks = <&clks 119>; + clock-names = "ipg"; + status = "disabled"; + }; + + ssi1: ssi@50034000 { + compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; + reg = <0x50034000 0x4000>; + interrupts = <12>; + status = "disabled"; + }; + + fec: ethernet@50038000 { + compatible = "fsl,imx25-fec"; + reg = <0x50038000 0x4000>; + interrupts = <57>; + clocks = <&clks 88>, <&clks 65>; + clock-names = "ipg", "ahb"; + status = "disabled"; + }; + }; + + aips@53f00000 { /* AIPS2 */ + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x53f00000 0x100000>; + ranges; + + clks: ccm@53f80000 { + compatible = "fsl,imx25-ccm"; + reg = <0x53f80000 0x4000>; + interrupts = <31>; + #clock-cells = <1>; + }; + + gpt4: timer@53f84000 { + compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; + reg = <0x53f84000 0x4000>; + clocks = <&clks 9>, <&clks 45>; + clock-names = "ipg", "per"; + interrupts = <1>; + }; + + gpt3: timer@53f88000 { + compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; + reg = <0x53f88000 0x4000>; + clocks = <&clks 9>, <&clks 47>; + clock-names = "ipg", "per"; + interrupts = <29>; + }; + + gpt2: timer@53f8c000 { + compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; + reg = <0x53f8c000 0x4000>; + clocks = <&clks 9>, <&clks 47>; + clock-names = "ipg", "per"; + interrupts = <53>; + }; + + gpt1: timer@53f90000 { + compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; + reg = <0x53f90000 0x4000>; + clocks = <&clks 9>, <&clks 47>; + clock-names = "ipg", "per"; + interrupts = <54>; + }; + + epit1: timer@53f94000 { + compatible = "fsl,imx25-epit"; + reg = <0x53f94000 0x4000>; + interrupts = <28>; + }; + + epit2: timer@53f98000 { + compatible = "fsl,imx25-epit"; + reg = <0x53f98000 0x4000>; + interrupts = <27>; + }; + + gpio4: gpio@53f9c000 { + compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; + reg = <0x53f9c000 0x4000>; + interrupts = <23>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pwm2: pwm@53fa0000 { + compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; + #pwm-cells = <2>; + reg = <0x53fa0000 0x4000>; + clocks = <&clks 106>, <&clks 36>; + clock-names = "ipg", "per"; + interrupts = <36>; + }; + + gpio3: gpio@53fa4000 { + compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; + reg = <0x53fa4000 0x4000>; + interrupts = <16>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pwm3: pwm@53fa8000 { + compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; + #pwm-cells = <2>; + reg = <0x53fa8000 0x4000>; + clocks = <&clks 107>, <&clks 36>; + clock-names = "ipg", "per"; + interrupts = <41>; + }; + + esdhc1: esdhc@53fb4000 { + compatible = "fsl,imx25-esdhc"; + reg = <0x53fb4000 0x4000>; + interrupts = <9>; + clocks = <&clks 86>, <&clks 63>, <&clks 45>; + clock-names = "ipg", "ahb", "per"; + status = "disabled"; + }; + + esdhc2: esdhc@53fb8000 { + compatible = "fsl,imx25-esdhc"; + reg = <0x53fb8000 0x4000>; + interrupts = <8>; + clocks = <&clks 87>, <&clks 64>, <&clks 46>; + clock-names = "ipg", "ahb", "per"; + status = "disabled"; + }; + + lcdc@53fbc000 { + reg = <0x53fbc000 0x4000>; + interrupts = <39>; + clocks = <&clks 103>, <&clks 66>, <&clks 49>; + clock-names = "ipg", "ahb", "per"; + status = "disabled"; + }; + + slcdc@53fc0000 { + reg = <0x53fc0000 0x4000>; + interrupts = <38>; + status = "disabled"; + }; + + pwm4: pwm@53fc8000 { + compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; + reg = <0x53fc8000 0x4000>; + clocks = <&clks 108>, <&clks 36>; + clock-names = "ipg", "per"; + interrupts = <42>; + }; + + gpio1: gpio@53fcc000 { + compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; + reg = <0x53fcc000 0x4000>; + interrupts = <52>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio2: gpio@53fd0000 { + compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; + reg = <0x53fd0000 0x4000>; + interrupts = <51>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + sdma@53fd4000 { + compatible = "fsl,imx25-sdma", "fsl,imx35-sdma"; + reg = <0x53fd4000 0x4000>; + clocks = <&clks 112>, <&clks 68>; + clock-names = "ipg", "ahb"; + interrupts = <34>; + }; + + wdog@53fdc000 { + compatible = "fsl,imx25-wdt", "fsl,imx21-wdt"; + reg = <0x53fdc000 0x4000>; + clocks = <&clks 126>; + clock-names = ""; + interrupts = <55>; + }; + + pwm1: pwm@53fe0000 { + compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; + #pwm-cells = <2>; + reg = <0x53fe0000 0x4000>; + clocks = <&clks 105>, <&clks 36>; + clock-names = "ipg", "per"; + interrupts = <26>; + }; + + usbphy1: usbphy@1 { + compatible = "nop-usbphy"; + status = "disabled"; + }; + + usbphy2: usbphy@2 { + compatible = "nop-usbphy"; + status = "disabled"; + }; + + usbotg: usb@53ff4000 { + compatible = "fsl,imx25-usb", "fsl,imx27-usb"; + reg = <0x53ff4000 0x0200>; + interrupts = <37>; + clocks = <&clks 9>, <&clks 70>, <&clks 8>; + clock-names = "ipg", "ahb", "per"; + fsl,usbmisc = <&usbmisc 0>; + status = "disabled"; + }; + + usbhost1: usb@53ff4400 { + compatible = "fsl,imx25-usb", "fsl,imx27-usb"; + reg = <0x53ff4400 0x0200>; + interrupts = <35>; + clocks = <&clks 9>, <&clks 70>, <&clks 8>; + clock-names = "ipg", "ahb", "per"; + fsl,usbmisc = <&usbmisc 1>; + status = "disabled"; + }; + + usbmisc: usbmisc@53ff4600 { + #index-cells = <1>; + compatible = "fsl,imx25-usbmisc"; + clocks = <&clks 9>, <&clks 70>, <&clks 8>; + clock-names = "ipg", "ahb", "per"; + reg = <0x53ff4600 0x00f>; + status = "disabled"; + }; + + dryice@53ffc000 { + compatible = "fsl,imx25-dryice", "fsl,imx25-rtc"; + reg = <0x53ffc000 0x4000>; + clocks = <&clks 81>; + clock-names = "ipg"; + interrupts = <25>; + }; + }; + + emi@80000000 { + compatible = "fsl,emi-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x80000000 0x3b002000>; + ranges; + + nand@bb000000 { + #address-cells = <1>; + #size-cells = <1>; + + compatible = "fsl,imx25-nand"; + reg = <0xbb000000 0x2000>; + clocks = <&clks 50>; + clock-names = ""; + interrupts = <33>; + status = "disabled"; + }; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/imx27-apf27.dts b/trunk/arch/arm/boot/dts/imx27-apf27.dts new file mode 100644 index 000000000000..c0327c054de2 --- /dev/null +++ b/trunk/arch/arm/boot/dts/imx27-apf27.dts @@ -0,0 +1,89 @@ +/* + * Copyright 2012 Philippe Reynes + * Copyright 2012 Armadeus Systems + * + * Based on code which is: Copyright 2012 Sascha Hauer, Pengutronix + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "imx27.dtsi" + +/ { + model = "Armadeus Systems APF27 module"; + compatible = "armadeus,imx27-apf27", "fsl,imx27"; + + memory { + reg = <0xa0000000 0x04000000>; + }; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + osc26m { + compatible = "fsl,imx-osc26m", "fixed-clock"; + clock-frequency = <0>; + }; + }; + + soc { + aipi@10000000 { + serial@1000a000 { + status = "okay"; + }; + + ethernet@1002b000 { + status = "okay"; + }; + }; + + nand@d8000000 { + status = "okay"; + nand-bus-width = <16>; + nand-ecc-mode = "hw"; + nand-on-flash-bbt; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x100000>; + }; + + partition@100000 { + label = "env"; + reg = <0x100000 0x80000>; + }; + + partition@180000 { + label = "env2"; + reg = <0x180000 0x80000>; + }; + + partition@200000 { + label = "firmware"; + reg = <0x200000 0x80000>; + }; + + partition@280000 { + label = "dtb"; + reg = <0x280000 0x80000>; + }; + + partition@300000 { + label = "kernel"; + reg = <0x300000 0x500000>; + }; + + partition@800000 { + label = "rootfs"; + reg = <0x800000 0xf800000>; + }; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/imx27.dtsi b/trunk/arch/arm/boot/dts/imx27.dtsi index 3e54f1498841..b8d3905915ac 100644 --- a/trunk/arch/arm/boot/dts/imx27.dtsi +++ b/trunk/arch/arm/boot/dts/imx27.dtsi @@ -58,7 +58,7 @@ reg = <0x10000000 0x10000000>; ranges; - wdog@10002000 { + wdog: wdog@10002000 { compatible = "fsl,imx27-wdt", "fsl,imx21-wdt"; reg = <0x10002000 0x4000>; interrupts = <27>; @@ -113,7 +113,7 @@ i2c1: i2c@10012000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; reg = <0x10012000 0x1000>; interrupts = <12>; status = "disabled"; @@ -205,7 +205,7 @@ i2c2: i2c@1001d000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; reg = <0x1001d000 0x1000>; interrupts = <1>; status = "disabled"; @@ -218,7 +218,8 @@ status = "disabled"; }; }; - nand@d8000000 { + + nfc: nand@d8000000 { #address-cells = <1>; #size-cells = <1>; diff --git a/trunk/arch/arm/boot/dts/imx28-apf28.dts b/trunk/arch/arm/boot/dts/imx28-apf28.dts new file mode 100644 index 000000000000..7eb075876c4c --- /dev/null +++ b/trunk/arch/arm/boot/dts/imx28-apf28.dts @@ -0,0 +1,85 @@ +/* + * Copyright 2012 Armadeus Systems - + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "imx28.dtsi" + +/ { + model = "Armadeus Systems APF28 module"; + compatible = "armadeus,imx28-apf28", "fsl,imx28"; + + memory { + reg = <0x40000000 0x08000000>; + }; + + apb@80000000 { + apbh@80000000 { + gpmi-nand@8000c000 { + pinctrl-names = "default"; + pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>; + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x300000>; + }; + + partition@300000 { + label = "env"; + reg = <0x300000 0x80000>; + }; + + partition@380000 { + label = "env2"; + reg = <0x380000 0x80000>; + }; + + partition@400000 { + label = "dtb"; + reg = <0x400000 0x80000>; + }; + + partition@480000 { + label = "splash"; + reg = <0x480000 0x80000>; + }; + + partition@500000 { + label = "kernel"; + reg = <0x500000 0x800000>; + }; + + partition@d00000 { + label = "rootfs"; + reg = <0xd00000 0xf300000>; + }; + }; + }; + + apbx@80040000 { + duart: serial@80074000 { + pinctrl-names = "default"; + pinctrl-0 = <&duart_pins_a>; + status = "okay"; + }; + }; + }; + + ahb@80080000 { + mac0: ethernet@800f0000 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&mac0_pins_a>; + phy-reset-gpios = <&gpio4 13 0>; + status = "okay"; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/imx28-apf28dev.dts b/trunk/arch/arm/boot/dts/imx28-apf28dev.dts new file mode 100644 index 000000000000..6d8865bfb4b7 --- /dev/null +++ b/trunk/arch/arm/boot/dts/imx28-apf28dev.dts @@ -0,0 +1,154 @@ +/* + * Copyright 2012 Armadeus Systems - + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* APF28Dev is a docking board for the APF28 SOM */ +/include/ "imx28-apf28.dts" + +/ { + model = "Armadeus Systems APF28Dev docking/development board"; + compatible = "armadeus,imx28-apf28dev", "armadeus,imx28-apf28", "fsl,imx28"; + + apb@80000000 { + apbh@80000000 { + ssp0: ssp@80010000 { + compatible = "fsl,imx28-mmc"; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_4bit_pins_a + &mmc0_cd_cfg &mmc0_sck_cfg>; + bus-width = <4>; + status = "okay"; + }; + + ssp2: ssp@80014000 { + compatible = "fsl,imx28-spi"; + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins_a>; + status = "okay"; + }; + + pinctrl@80018000 { + pinctrl-names = "default"; + pinctrl-0 = <&hog_pins_apf28dev>; + + hog_pins_apf28dev: hog@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x1103 /* MX28_PAD_LCD_D16__GPIO_1_16 */ + 0x1113 /* MX28_PAD_LCD_D17__GPIO_1_17 */ + 0x1123 /* MX28_PAD_LCD_D18__GPIO_1_18 */ + 0x1133 /* MX28_PAD_LCD_D19__GPIO_1_19 */ + 0x1143 /* MX28_PAD_LCD_D20__GPIO_1_20 */ + 0x1153 /* MX28_PAD_LCD_D21__GPIO_1_21 */ + 0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + lcdif_pins_apf28dev: lcdif-apf28dev@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ + 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ + 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ + 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + }; + + lcdif@80030000 { + pinctrl-names = "default"; + pinctrl-0 = <&lcdif_16bit_pins_a + &lcdif_pins_apf28dev>; + status = "okay"; + }; + }; + + apbx@80040000 { + lradc@80050000 { + status = "okay"; + }; + + i2c0: i2c@80058000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + }; + + pwm: pwm@80064000 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm3_pins_a &pwm4_pins_a>; + status = "okay"; + }; + + usbphy0: usbphy@8007c000 { + status = "okay"; + }; + + usbphy1: usbphy@8007e000 { + status = "okay"; + }; + }; + }; + + ahb@80080000 { + usb0: usb@80080000 { + vbus-supply = <®_usb0_vbus>; + status = "okay"; + }; + + usb1: usb@80090000 { + status = "okay"; + }; + + mac1: ethernet@800f4000 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&mac1_pins_a>; + phy-reset-gpios = <&gpio0 23 0>; + status = "okay"; + }; + }; + + regulators { + compatible = "simple-bus"; + + reg_usb0_vbus: usb0_vbus { + compatible = "regulator-fixed"; + regulator-name = "usb0_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 23 1>; + }; + }; + + leds { + compatible = "gpio-leds"; + + user { + label = "Heartbeat"; + gpios = <&gpio0 21 0>; + linux,default-trigger = "heartbeat"; + }; + }; + + backlight { + compatible = "pwm-backlight"; + + pwms = <&pwm 3 191000>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + }; +}; diff --git a/trunk/arch/arm/boot/dts/imx28-cfa10036.dts b/trunk/arch/arm/boot/dts/imx28-cfa10036.dts index c03a577beca3..1594694532b9 100644 --- a/trunk/arch/arm/boot/dts/imx28-cfa10036.dts +++ b/trunk/arch/arm/boot/dts/imx28-cfa10036.dts @@ -22,6 +22,31 @@ apb@80000000 { apbh@80000000 { + pinctrl@80018000 { + pinctrl-names = "default"; + pinctrl-0 = <&hog_pins_cfa10036>; + + hog_pins_cfa10036: hog-10036@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x2073 /* MX28_PAD_SSP0_D7__GPIO_2_7 */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + led_pins_cfa10036: leds-10036@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x3043 /* MX28_PAD_AUART1_RX__GPIO_3_4 */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + }; + ssp0: ssp@80010000 { compatible = "fsl,imx28-mmc"; pinctrl-names = "default"; @@ -33,16 +58,37 @@ }; apbx@80040000 { + pwm: pwm@80064000 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm4_pins_a>; + status = "okay"; + }; + duart: serial@80074000 { pinctrl-names = "default"; pinctrl-0 = <&duart_pins_b>; status = "okay"; }; + + i2c0: i2c@80058000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_b>; + status = "okay"; + + ssd1307: oled@3c { + compatible = "solomon,ssd1307fb-i2c"; + reg = <0x3c>; + pwms = <&pwm 4 3000>; + reset-gpios = <&gpio2 7 0>; + }; + }; }; }; leds { compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins_cfa10036>; power { gpios = <&gpio3 4 1>; diff --git a/trunk/arch/arm/boot/dts/imx28-cfa10049.dts b/trunk/arch/arm/boot/dts/imx28-cfa10049.dts index 05c892e931e3..b222614ac9e0 100644 --- a/trunk/arch/arm/boot/dts/imx28-cfa10049.dts +++ b/trunk/arch/arm/boot/dts/imx28-cfa10049.dts @@ -22,6 +22,22 @@ apb@80000000 { apbh@80000000 { pinctrl@80018000 { + pinctrl-names = "default", "default"; + pinctrl-1 = <&hog_pins_cfa10049>; + + hog_pins_cfa10049: hog-10049@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */ + 0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */ + 0x1173 /* MX28_PAD_LCD_D22__GPIO_1_23 */ + 0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + spi3_pins_cfa10049: spi3-cfa10049@0 { reg = <0>; fsl,pinmux-ids = < @@ -29,6 +45,7 @@ 0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */ 0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */ 0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */ + 0x01b2 /* MX28_PAD_GPMI_CLE__SSP3_D5 */ >; fsl,drive-strength = <1>; fsl,voltage = <1>; @@ -60,6 +77,11 @@ spi-max-frequency = <100000>; }; + dac0: dh2228@2 { + compatible = "rohm,dh2228fv"; + reg = <2>; + spi-max-frequency = <100000>; + }; }; }; @@ -96,4 +118,15 @@ gpio = <&gpio0 7 1>; }; }; + + ahb@80080000 { + mac0: ethernet@800f0000 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&mac0_pins_a>; + phy-reset-gpios = <&gpio2 21 0>; + phy-reset-duration = <100>; + status = "okay"; + }; + }; }; diff --git a/trunk/arch/arm/boot/dts/imx28-evk.dts b/trunk/arch/arm/boot/dts/imx28-evk.dts index a0ad71ca3a44..2da316e04409 100644 --- a/trunk/arch/arm/boot/dts/imx28-evk.dts +++ b/trunk/arch/arm/boot/dts/imx28-evk.dts @@ -76,7 +76,6 @@ 0x20c3 /* MX28_PAD_SSP1_SCK__GPIO_2_12 */ 0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */ 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ - 0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */ 0x3083 /* MX28_PAD_AUART2_RX__GPIO_3_8 */ 0x3093 /* MX28_PAD_AUART2_TX__GPIO_3_9 */ >; @@ -85,6 +84,16 @@ fsl,pull-up = <0>; }; + led_pin_gpio3_5: led_gpio3_5@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + gpmi_pins_evk: gpmi-nand-evk@0 { reg = <0>; fsl,pinmux-ids = < @@ -288,6 +297,8 @@ leds { compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pin_gpio3_5>; user { label = "Heartbeat"; diff --git a/trunk/arch/arm/boot/dts/imx28-sps1.dts b/trunk/arch/arm/boot/dts/imx28-sps1.dts new file mode 100644 index 000000000000..e6cde8aa7fff --- /dev/null +++ b/trunk/arch/arm/boot/dts/imx28-sps1.dts @@ -0,0 +1,169 @@ +/* + * Copyright (C) 2012 Marek Vasut + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "imx28.dtsi" + +/ { + model = "SchulerControl GmbH, SC SPS 1"; + compatible = "schulercontrol,imx28-sps1", "fsl,imx28"; + + memory { + reg = <0x40000000 0x08000000>; + }; + + apb@80000000 { + apbh@80000000 { + pinctrl@80018000 { + pinctrl-names = "default"; + pinctrl-0 = <&hog_pins_a>; + + hog_pins_a: hog-gpios@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x0003 /* MX28_PAD_GPMI_D00__GPIO_0_0 */ + 0x0033 /* MX28_PAD_GPMI_D03__GPIO_0_3 */ + 0x0063 /* MX28_PAD_GPMI_D06__GPIO_0_6 */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + }; + + ssp0: ssp@80010000 { + compatible = "fsl,imx28-mmc"; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_4bit_pins_a>; + bus-width = <4>; + status = "okay"; + }; + + ssp2: ssp@80014000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx28-spi"; + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins_a>; + status = "okay"; + + flash: m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "everspin,mr25h256", "mr25h256"; + spi-max-frequency = <40000000>; + reg = <0>; + }; + }; + }; + + apbx@80040000 { + i2c0: i2c@80058000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + clock-frequency = <400000>; + status = "okay"; + + rtc: rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; + + eeprom: eeprom@52 { + compatible = "atmel,24c64"; + reg = <0x52>; + pagesize = <32>; + }; + }; + + duart: serial@80074000 { + pinctrl-names = "default"; + pinctrl-0 = <&duart_pins_a>; + status = "okay"; + }; + + usbphy0: usbphy@8007c000 { + status = "okay"; + }; + + auart0: serial@8006a000 { + pinctrl-names = "default"; + pinctrl-0 = <&auart0_pins_a>; + status = "okay"; + }; + }; + }; + + ahb@80080000 { + usb0: usb@80080000 { + vbus-supply = <®_usb0_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&usbphy0_pins_b>; + status = "okay"; + }; + + mac0: ethernet@800f0000 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&mac0_pins_a>; + status = "okay"; + }; + + mac1: ethernet@800f4000 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&mac1_pins_a>; + status = "okay"; + }; + }; + + regulators { + compatible = "simple-bus"; + + reg_usb0_vbus: usb0_vbus { + compatible = "regulator-fixed"; + regulator-name = "usb0_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 9 0>; + }; + }; + + leds { + #address-cells = <1>; + #size-cells = <0>; + compatible = "gpio-leds"; + status = "okay"; + + led@1 { + label = "sps1-1:yellow:user"; + gpios = <&gpio0 6 0>; + linux,default-trigger = "heartbeat"; + reg = <0>; + }; + + led@2 { + label = "sps1-2:red:user"; + gpios = <&gpio0 3 0>; + linux,default-trigger = "heartbeat"; + reg = <1>; + }; + + led@3 { + label = "sps1-3:red:user"; + gpios = <&gpio0 0 0>; + default-trigger = "heartbeat"; + reg = <2>; + }; + + }; +}; diff --git a/trunk/arch/arm/boot/dts/imx28.dtsi b/trunk/arch/arm/boot/dts/imx28.dtsi index 55c57ea6169e..d7013f73f2e9 100644 --- a/trunk/arch/arm/boot/dts/imx28.dtsi +++ b/trunk/arch/arm/boot/dts/imx28.dtsi @@ -492,6 +492,16 @@ fsl,pull-up = <0>; }; + pwm3_pins_a: pwm3@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x31c0 /* MX28_PAD_PWM3__PWM_3 */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + pwm4_pins_a: pwm4@0 { reg = <0>; fsl,pinmux-ids = < @@ -535,6 +545,31 @@ fsl,pull-up = <0>; }; + lcdif_16bit_pins_a: lcdif-16bit@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ + 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ + 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ + 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ + 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ + 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ + 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ + 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ + 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ + 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ + 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ + 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ + 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ + 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ + 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ + 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + can0_pins_a: can0@0 { reg = <0>; fsl,pinmux-ids = < diff --git a/trunk/arch/arm/boot/dts/imx51.dtsi b/trunk/arch/arm/boot/dts/imx51.dtsi index 75d069fcf897..1fdee31b4909 100644 --- a/trunk/arch/arm/boot/dts/imx51.dtsi +++ b/trunk/arch/arm/boot/dts/imx51.dtsi @@ -76,17 +76,18 @@ reg = <0x70000000 0x40000>; ranges; - esdhc@70004000 { /* ESDHC1 */ + esdhc1: esdhc@70004000 { compatible = "fsl,imx51-esdhc"; reg = <0x70004000 0x4000>; interrupts = <1>; status = "disabled"; }; - esdhc@70008000 { /* ESDHC2 */ + esdhc2: esdhc@70008000 { compatible = "fsl,imx51-esdhc"; reg = <0x70008000 0x4000>; interrupts = <2>; + bus-width = <4>; status = "disabled"; }; @@ -97,7 +98,7 @@ status = "disabled"; }; - ecspi@70010000 { /* ECSPI1 */ + ecspi1: ecspi@70010000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx51-ecspi"; @@ -115,43 +116,45 @@ status = "disabled"; }; - esdhc@70020000 { /* ESDHC3 */ + esdhc3: esdhc@70020000 { compatible = "fsl,imx51-esdhc"; reg = <0x70020000 0x4000>; interrupts = <3>; + bus-width = <4>; status = "disabled"; }; - esdhc@70024000 { /* ESDHC4 */ + esdhc4: esdhc@70024000 { compatible = "fsl,imx51-esdhc"; reg = <0x70024000 0x4000>; interrupts = <4>; + bus-width = <4>; status = "disabled"; }; }; - usb@73f80000 { + usbotg: usb@73f80000 { compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80000 0x0200>; interrupts = <18>; status = "disabled"; }; - usb@73f80200 { + usbh1: usb@73f80200 { compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80200 0x0200>; interrupts = <14>; status = "disabled"; }; - usb@73f80400 { + usbh2: usb@73f80400 { compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80400 0x0200>; interrupts = <16>; status = "disabled"; }; - usb@73f80600 { + usbh3: usb@73f80600 { compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80600 0x0200>; interrupts = <17>; @@ -198,20 +201,20 @@ #interrupt-cells = <2>; }; - wdog@73f98000 { /* WDOG1 */ + wdog1: wdog@73f98000 { compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; reg = <0x73f98000 0x4000>; interrupts = <58>; }; - wdog@73f9c000 { /* WDOG2 */ + wdog2: wdog@73f9c000 { compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; reg = <0x73f9c000 0x4000>; interrupts = <59>; status = "disabled"; }; - iomuxc@73fa8000 { + iomuxc: iomuxc@73fa8000 { compatible = "fsl,imx51-iomuxc"; reg = <0x73fa8000 0x4000>; @@ -349,7 +352,7 @@ reg = <0x80000000 0x10000000>; ranges; - ecspi@83fac000 { /* ECSPI2 */ + ecspi2: ecspi@83fac000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx51-ecspi"; @@ -358,14 +361,14 @@ status = "disabled"; }; - sdma@83fb0000 { + sdma: sdma@83fb0000 { compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; reg = <0x83fb0000 0x4000>; interrupts = <6>; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin"; }; - cspi@83fc0000 { + cspi: cspi@83fc0000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; @@ -374,19 +377,19 @@ status = "disabled"; }; - i2c@83fc4000 { /* I2C2 */ + i2c2: i2c@83fc4000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; reg = <0x83fc4000 0x4000>; interrupts = <63>; status = "disabled"; }; - i2c@83fc8000 { /* I2C1 */ + i2c1: i2c@83fc8000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; reg = <0x83fc8000 0x4000>; interrupts = <62>; status = "disabled"; @@ -401,13 +404,13 @@ status = "disabled"; }; - audmux@83fd0000 { + audmux: audmux@83fd0000 { compatible = "fsl,imx51-audmux", "fsl,imx31-audmux"; reg = <0x83fd0000 0x4000>; status = "disabled"; }; - nand@83fdb000 { + nfc: nand@83fdb000 { compatible = "fsl,imx51-nand"; reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>; interrupts = <8>; @@ -423,7 +426,7 @@ status = "disabled"; }; - ethernet@83fec000 { + fec: ethernet@83fec000 { compatible = "fsl,imx51-fec", "fsl,imx27-fec"; reg = <0x83fec000 0x4000>; interrupts = <87>; diff --git a/trunk/arch/arm/boot/dts/imx53-qsb.dts b/trunk/arch/arm/boot/dts/imx53-qsb.dts index 08948af86d1a..b0075537195b 100644 --- a/trunk/arch/arm/boot/dts/imx53-qsb.dts +++ b/trunk/arch/arm/boot/dts/imx53-qsb.dts @@ -60,10 +60,17 @@ 697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */ 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */ 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */ + 1149 0x80000000 /* MX53_PAD_GPIO_16__GPIO7_11 */ + >; + }; + + led_pin_gpio7_7: led_gpio7_7@0 { + fsl,pins = < 873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */ >; }; }; + }; uart1: serial@53fbc000 { @@ -100,76 +107,93 @@ pmic: dialog@48 { compatible = "dlg,da9053-aa", "dlg,da9052"; reg = <0x48>; + interrupt-parent = <&gpio7>; + interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */ regulators { - buck0 { + buck1_reg: buck1 { regulator-min-microvolt = <500000>; regulator-max-microvolt = <2075000>; + regulator-always-on; }; - buck1 { + buck2_reg: buck2 { regulator-min-microvolt = <500000>; regulator-max-microvolt = <2075000>; + regulator-always-on; }; - buck2 { + buck3_reg: buck3 { regulator-min-microvolt = <925000>; regulator-max-microvolt = <2500000>; + regulator-always-on; }; - buck3 { + buck4_reg: buck4 { regulator-min-microvolt = <925000>; regulator-max-microvolt = <2500000>; + regulator-always-on; }; - ldo4 { + ldo1_reg: ldo1 { regulator-min-microvolt = <600000>; regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; }; - ldo5 { + ldo2_reg: ldo2 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo3_reg: ldo3 { regulator-min-microvolt = <600000>; regulator-max-microvolt = <1800000>; + regulator-always-on; }; - ldo6 { + ldo4_reg: ldo4 { regulator-min-microvolt = <1725000>; regulator-max-microvolt = <3300000>; + regulator-always-on; }; - ldo7 { + ldo5_reg: ldo5 { regulator-min-microvolt = <1725000>; regulator-max-microvolt = <3300000>; + regulator-always-on; }; - ldo8 { + ldo6_reg: ldo6 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3600000>; + regulator-always-on; }; - ldo9 { + ldo7_reg: ldo7 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3600000>; + regulator-always-on; }; - ldo10 { + ldo8_reg: ldo8 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3600000>; + regulator-always-on; }; - ldo11 { + ldo9_reg: ldo9 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3600000>; + regulator-always-on; }; - ldo12 { + ldo10_reg: ldo10 { regulator-min-microvolt = <1250000>; regulator-max-microvolt = <3650000>; - }; - - ldo13 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3600000>; + regulator-always-on; }; }; }; @@ -216,6 +240,8 @@ leds { compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pin_gpio7_7>; user { label = "Heartbeat"; diff --git a/trunk/arch/arm/boot/dts/imx53.dtsi b/trunk/arch/arm/boot/dts/imx53.dtsi index 76ebb1ad2675..f45d4b1e21b5 100644 --- a/trunk/arch/arm/boot/dts/imx53.dtsi +++ b/trunk/arch/arm/boot/dts/imx53.dtsi @@ -81,17 +81,19 @@ reg = <0x50000000 0x40000>; ranges; - esdhc@50004000 { /* ESDHC1 */ + esdhc1: esdhc@50004000 { compatible = "fsl,imx53-esdhc"; reg = <0x50004000 0x4000>; interrupts = <1>; + bus-width = <4>; status = "disabled"; }; - esdhc@50008000 { /* ESDHC2 */ + esdhc2: esdhc@50008000 { compatible = "fsl,imx53-esdhc"; reg = <0x50008000 0x4000>; interrupts = <2>; + bus-width = <4>; status = "disabled"; }; @@ -102,7 +104,7 @@ status = "disabled"; }; - ecspi@50010000 { /* ECSPI1 */ + ecspi1: ecspi@50010000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; @@ -120,43 +122,45 @@ status = "disabled"; }; - esdhc@50020000 { /* ESDHC3 */ + esdhc3: esdhc@50020000 { compatible = "fsl,imx53-esdhc"; reg = <0x50020000 0x4000>; interrupts = <3>; + bus-width = <4>; status = "disabled"; }; - esdhc@50024000 { /* ESDHC4 */ + esdhc4: esdhc@50024000 { compatible = "fsl,imx53-esdhc"; reg = <0x50024000 0x4000>; interrupts = <4>; + bus-width = <4>; status = "disabled"; }; }; - usb@53f80000 { + usbotg: usb@53f80000 { compatible = "fsl,imx53-usb", "fsl,imx27-usb"; reg = <0x53f80000 0x0200>; interrupts = <18>; status = "disabled"; }; - usb@53f80200 { + usbh1: usb@53f80200 { compatible = "fsl,imx53-usb", "fsl,imx27-usb"; reg = <0x53f80200 0x0200>; interrupts = <14>; status = "disabled"; }; - usb@53f80400 { + usbh2: usb@53f80400 { compatible = "fsl,imx53-usb", "fsl,imx27-usb"; reg = <0x53f80400 0x0200>; interrupts = <16>; status = "disabled"; }; - usb@53f80600 { + usbh3: usb@53f80600 { compatible = "fsl,imx53-usb", "fsl,imx27-usb"; reg = <0x53f80600 0x0200>; interrupts = <17>; @@ -203,20 +207,20 @@ #interrupt-cells = <2>; }; - wdog@53f98000 { /* WDOG1 */ + wdog1: wdog@53f98000 { compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; reg = <0x53f98000 0x4000>; interrupts = <58>; }; - wdog@53f9c000 { /* WDOG2 */ + wdog2: wdog@53f9c000 { compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; reg = <0x53f9c000 0x4000>; interrupts = <59>; status = "disabled"; }; - iomuxc@53fa8000 { + iomuxc: iomuxc@53fa8000 { compatible = "fsl,imx53-iomuxc"; reg = <0x53fa8000 0x4000>; @@ -316,6 +320,24 @@ }; }; + can1 { + pinctrl_can1_1: can1grp-1 { + fsl,pins = < + 847 0x80000000 /* MX53_PAD_PATA_INTRQ__CAN1_TXCAN */ + 853 0x80000000 /* MX53_PAD_PATA_DIOR__CAN1_RXCAN */ + >; + }; + }; + + can2 { + pinctrl_can2_1: can2grp-1 { + fsl,pins = < + 67 0x80000000 /* MX53_PAD_KEY_COL4__CAN2_TXCAN */ + 74 0x80000000 /* MX53_PAD_KEY_ROW4__CAN2_RXCAN */ + >; + }; + }; + i2c1 { pinctrl_i2c1_1: i2c1grp-1 { fsl,pins = < @@ -334,6 +356,15 @@ }; }; + i2c3 { + pinctrl_i2c3_1: i2c3grp-1 { + fsl,pins = < + 1102 0xc0000000 /* MX53_PAD_GPIO_6__I2C3_SDA */ + 1130 0xc0000000 /* MX53_PAD_GPIO_5__I2C3_SCL */ + >; + }; + }; + uart1 { pinctrl_uart1_1: uart1grp-1 { fsl,pins = < @@ -369,6 +400,25 @@ >; }; }; + + uart4 { + pinctrl_uart4_1: uart4grp-1 { + fsl,pins = < + 11 0x1c5 /* MX53_PAD_KEY_COL0__UART4_TXD_MUX */ + 18 0x1c5 /* MX53_PAD_KEY_ROW0__UART4_RXD_MUX */ + >; + }; + }; + + uart5 { + pinctrl_uart5_1: uart5grp-1 { + fsl,pins = < + 24 0x1c5 /* MX53_PAD_KEY_COL1__UART5_TXD_MUX */ + 31 0x1c5 /* MX53_PAD_KEY_ROW1__UART5_RXD_MUX */ + >; + }; + }; + }; uart1: serial@53fbc000 { @@ -429,10 +479,10 @@ #interrupt-cells = <2>; }; - i2c@53fec000 { /* I2C3 */ + i2c3: i2c@53fec000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; reg = <0x53fec000 0x4000>; interrupts = <64>; status = "disabled"; @@ -460,7 +510,7 @@ status = "disabled"; }; - ecspi@63fac000 { /* ECSPI2 */ + ecspi2: ecspi@63fac000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; @@ -469,14 +519,14 @@ status = "disabled"; }; - sdma@63fb0000 { + sdma: sdma@63fb0000 { compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; reg = <0x63fb0000 0x4000>; interrupts = <6>; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; }; - cspi@63fc0000 { + cspi: cspi@63fc0000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; @@ -485,19 +535,19 @@ status = "disabled"; }; - i2c@63fc4000 { /* I2C2 */ + i2c2: i2c@63fc4000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; reg = <0x63fc4000 0x4000>; interrupts = <63>; status = "disabled"; }; - i2c@63fc8000 { /* I2C1 */ + i2c1: i2c@63fc8000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; reg = <0x63fc8000 0x4000>; interrupts = <62>; status = "disabled"; @@ -512,13 +562,13 @@ status = "disabled"; }; - audmux@63fd0000 { + audmux: audmux@63fd0000 { compatible = "fsl,imx53-audmux", "fsl,imx31-audmux"; reg = <0x63fd0000 0x4000>; status = "disabled"; }; - nand@63fdb000 { + nfc: nand@63fdb000 { compatible = "fsl,imx53-nand"; reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>; interrupts = <8>; @@ -534,7 +584,7 @@ status = "disabled"; }; - ethernet@63fec000 { + fec: ethernet@63fec000 { compatible = "fsl,imx53-fec", "fsl,imx25-fec"; reg = <0x63fec000 0x4000>; interrupts = <87>; diff --git a/trunk/arch/arm/boot/dts/imx6q-sabreauto.dts b/trunk/arch/arm/boot/dts/imx6q-sabreauto.dts new file mode 100644 index 000000000000..826e4ad1477e --- /dev/null +++ b/trunk/arch/arm/boot/dts/imx6q-sabreauto.dts @@ -0,0 +1,64 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "imx6q.dtsi" + +/ { + model = "Freescale i.MX6 Quad SABRE Automotive Board"; + compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; + + memory { + reg = <0x10000000 0x80000000>; + }; + + soc { + aips-bus@02000000 { /* AIPS1 */ + iomuxc@020e0000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + hog { + pinctrl_hog: hoggrp { + fsl,pins = < + 1376 0x80000000 /* MX6Q_PAD_NANDF_CS2__GPIO_6_15 */ + 13 0x80000000 /* MX6Q_PAD_SD2_DAT2__GPIO_1_13 */ + >; + }; + }; + }; + }; + + aips-bus@02100000 { /* AIPS2 */ + uart4: serial@021f0000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4_1>; + status = "okay"; + }; + + ethernet@02188000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet_2>; + phy-mode = "rgmii"; + status = "okay"; + }; + + usdhc@02198000 { /* uSDHC3 */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3_1>; + cd-gpios = <&gpio6 15 0>; + wp-gpios = <&gpio1 13 0>; + status = "okay"; + }; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/imx6q-sabresd.dts b/trunk/arch/arm/boot/dts/imx6q-sabresd.dts index e596c28c214d..a42402562b7b 100644 --- a/trunk/arch/arm/boot/dts/imx6q-sabresd.dts +++ b/trunk/arch/arm/boot/dts/imx6q-sabresd.dts @@ -38,6 +38,8 @@ hog { pinctrl_hog: hoggrp { fsl,pins = < + 1004 0x80000000 /* MX6Q_PAD_GPIO_4__GPIO_1_4 */ + 1012 0x80000000 /* MX6Q_PAD_GPIO_5__GPIO_1_5 */ 1402 0x80000000 /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */ 1410 0x80000000 /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */ 1418 0x80000000 /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */ @@ -73,4 +75,20 @@ }; }; }; + + gpio-keys { + compatible = "gpio-keys"; + + volume-up { + label = "Volume Up"; + gpios = <&gpio1 4 0>; + linux,code = <115>; /* KEY_VOLUMEUP */ + }; + + volume-down { + label = "Volume Down"; + gpios = <&gpio1 5 0>; + linux,code = <114>; /* KEY_VOLUMEDOWN */ + }; + }; }; diff --git a/trunk/arch/arm/boot/dts/imx6q.dtsi b/trunk/arch/arm/boot/dts/imx6q.dtsi index f3990b04fecf..6dfeaedef307 100644 --- a/trunk/arch/arm/boot/dts/imx6q.dtsi +++ b/trunk/arch/arm/boot/dts/imx6q.dtsi @@ -36,6 +36,14 @@ compatible = "arm,cortex-a9"; reg = <0>; next-level-cache = <&L2>; + operating-points = < + /* kHz uV */ + 792000 1100000 + 396000 950000 + 198000 850000 + >; + clock-latency = <61036>; /* two CLK32 periods */ + cpu0-supply = <®_cpu>; }; cpu@1 { @@ -100,7 +108,7 @@ clocks = <&clks 106>; }; - gpmi-nand@00112000 { + nfc: gpmi-nand@00112000 { compatible = "fsl,imx6q-gpmi-nand"; #address-cells = <1>; #size-cells = <1>; @@ -144,12 +152,12 @@ reg = <0x02000000 0x40000>; ranges; - spdif@02004000 { + spdif: spdif@02004000 { reg = <0x02004000 0x4000>; interrupts = <0 52 0x04>; }; - ecspi@02008000 { /* eCSPI1 */ + ecspi1: ecspi@02008000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; @@ -160,7 +168,7 @@ status = "disabled"; }; - ecspi@0200c000 { /* eCSPI2 */ + ecspi2: ecspi@0200c000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; @@ -171,7 +179,7 @@ status = "disabled"; }; - ecspi@02010000 { /* eCSPI3 */ + ecspi3: ecspi@02010000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; @@ -182,7 +190,7 @@ status = "disabled"; }; - ecspi@02014000 { /* eCSPI4 */ + ecspi4: ecspi@02014000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; @@ -193,7 +201,7 @@ status = "disabled"; }; - ecspi@02018000 { /* eCSPI5 */ + ecspi5: ecspi@02018000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; @@ -213,7 +221,7 @@ status = "disabled"; }; - esai@02024000 { + esai: esai@02024000 { reg = <0x02024000 0x4000>; interrupts = <0 51 0x04>; }; @@ -248,7 +256,7 @@ status = "disabled"; }; - asrc@02034000 { + asrc: asrc@02034000 { reg = <0x02034000 0x4000>; interrupts = <0 50 0x04>; }; @@ -258,7 +266,7 @@ }; }; - vpu@02040000 { + vpu: vpu@02040000 { reg = <0x02040000 0x3c000>; interrupts = <0 3 0x04 0 12 0x04>; }; @@ -267,37 +275,37 @@ reg = <0x0207c000 0x4000>; }; - pwm@02080000 { /* PWM1 */ + pwm1: pwm@02080000 { reg = <0x02080000 0x4000>; interrupts = <0 83 0x04>; }; - pwm@02084000 { /* PWM2 */ + pwm2: pwm@02084000 { reg = <0x02084000 0x4000>; interrupts = <0 84 0x04>; }; - pwm@02088000 { /* PWM3 */ + pwm3: pwm@02088000 { reg = <0x02088000 0x4000>; interrupts = <0 85 0x04>; }; - pwm@0208c000 { /* PWM4 */ + pwm4: pwm@0208c000 { reg = <0x0208c000 0x4000>; interrupts = <0 86 0x04>; }; - flexcan@02090000 { /* CAN1 */ + can1: flexcan@02090000 { reg = <0x02090000 0x4000>; interrupts = <0 110 0x04>; }; - flexcan@02094000 { /* CAN2 */ + can2: flexcan@02094000 { reg = <0x02094000 0x4000>; interrupts = <0 111 0x04>; }; - gpt@02098000 { + gpt: gpt@02098000 { compatible = "fsl,imx6q-gpt"; reg = <0x02098000 0x4000>; interrupts = <0 55 0x04>; @@ -373,19 +381,19 @@ #interrupt-cells = <2>; }; - kpp@020b8000 { + kpp: kpp@020b8000 { reg = <0x020b8000 0x4000>; interrupts = <0 82 0x04>; }; - wdog@020bc000 { /* WDOG1 */ + wdog1: wdog@020bc000 { compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; reg = <0x020bc000 0x4000>; interrupts = <0 80 0x04>; clocks = <&clks 0>; }; - wdog@020c0000 { /* WDOG2 */ + wdog2: wdog@020c0000 { compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; reg = <0x020c0000 0x4000>; interrupts = <0 81 0x04>; @@ -447,7 +455,7 @@ anatop-max-voltage = <2750000>; }; - regulator-vddcore@140 { + reg_cpu: regulator-vddcore@140 { compatible = "fsl,anatop-regulator"; regulator-name = "cpu"; regulator-min-microvolt = <725000>; @@ -505,27 +513,35 @@ }; snvs@020cc000 { - reg = <0x020cc000 0x4000>; - interrupts = <0 19 0x04 0 20 0x04>; + compatible = "fsl,sec-v4.0-mon", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x020cc000 0x4000>; + + snvs-rtc-lp@34 { + compatible = "fsl,sec-v4.0-mon-rtc-lp"; + reg = <0x34 0x58>; + interrupts = <0 19 0x04 0 20 0x04>; + }; }; - epit@020d0000 { /* EPIT1 */ + epit1: epit@020d0000 { /* EPIT1 */ reg = <0x020d0000 0x4000>; interrupts = <0 56 0x04>; }; - epit@020d4000 { /* EPIT2 */ + epit2: epit@020d4000 { /* EPIT2 */ reg = <0x020d4000 0x4000>; interrupts = <0 57 0x04>; }; - src@020d8000 { + src: src@020d8000 { compatible = "fsl,imx6q-src"; reg = <0x020d8000 0x4000>; interrupts = <0 91 0x04 0 96 0x04>; }; - gpc@020dc000 { + gpc: gpc@020dc000 { compatible = "fsl,imx6q-gpc"; reg = <0x020dc000 0x4000>; interrupts = <0 89 0x04 0 90 0x04>; @@ -536,7 +552,7 @@ reg = <0x020e0000 0x38>; }; - iomuxc@020e0000 { + iomuxc: iomuxc@020e0000 { compatible = "fsl,imx6q-iomuxc"; reg = <0x020e0000 0x4000>; @@ -748,17 +764,17 @@ }; }; - dcic@020e4000 { /* DCIC1 */ + dcic1: dcic@020e4000 { reg = <0x020e4000 0x4000>; interrupts = <0 124 0x04>; }; - dcic@020e8000 { /* DCIC2 */ + dcic2: dcic@020e8000 { reg = <0x020e8000 0x4000>; interrupts = <0 125 0x04>; }; - sdma@020ec000 { + sdma: sdma@020ec000 { compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; reg = <0x020ec000 0x4000>; interrupts = <0 2 0x04>; @@ -784,7 +800,7 @@ reg = <0x0217c000 0x4000>; }; - usb@02184000 { /* USB OTG */ + usbotg: usb@02184000 { compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184000 0x200>; interrupts = <0 43 0x04>; @@ -794,7 +810,7 @@ status = "disabled"; }; - usb@02184200 { /* USB1 */ + usbh1: usb@02184200 { compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184200 0x200>; interrupts = <0 40 0x04>; @@ -804,7 +820,7 @@ status = "disabled"; }; - usb@02184400 { /* USB2 */ + usbh2: usb@02184400 { compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184400 0x200>; interrupts = <0 41 0x04>; @@ -813,7 +829,7 @@ status = "disabled"; }; - usb@02184600 { /* USB3 */ + usbh3: usb@02184600 { compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184600 0x200>; interrupts = <0 42 0x04>; @@ -822,14 +838,14 @@ status = "disabled"; }; - usbmisc: usbmisc@02184800 { + usbmisc: usbmisc: usbmisc@02184800 { #index-cells = <1>; compatible = "fsl,imx6q-usbmisc"; reg = <0x02184800 0x200>; clocks = <&clks 162>; }; - ethernet@02188000 { + fec: ethernet@02188000 { compatible = "fsl,imx6q-fec"; reg = <0x02188000 0x4000>; interrupts = <0 118 0x04 0 119 0x04>; @@ -843,66 +859,70 @@ interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>; }; - usdhc@02190000 { /* uSDHC1 */ + usdhc1: usdhc@02190000 { compatible = "fsl,imx6q-usdhc"; reg = <0x02190000 0x4000>; interrupts = <0 22 0x04>; clocks = <&clks 163>, <&clks 163>, <&clks 163>; clock-names = "ipg", "ahb", "per"; + bus-width = <4>; status = "disabled"; }; - usdhc@02194000 { /* uSDHC2 */ + usdhc2: usdhc@02194000 { compatible = "fsl,imx6q-usdhc"; reg = <0x02194000 0x4000>; interrupts = <0 23 0x04>; clocks = <&clks 164>, <&clks 164>, <&clks 164>; clock-names = "ipg", "ahb", "per"; + bus-width = <4>; status = "disabled"; }; - usdhc@02198000 { /* uSDHC3 */ + usdhc3: usdhc@02198000 { compatible = "fsl,imx6q-usdhc"; reg = <0x02198000 0x4000>; interrupts = <0 24 0x04>; clocks = <&clks 165>, <&clks 165>, <&clks 165>; clock-names = "ipg", "ahb", "per"; + bus-width = <4>; status = "disabled"; }; - usdhc@0219c000 { /* uSDHC4 */ + usdhc4: usdhc@0219c000 { compatible = "fsl,imx6q-usdhc"; reg = <0x0219c000 0x4000>; interrupts = <0 25 0x04>; clocks = <&clks 166>, <&clks 166>, <&clks 166>; clock-names = "ipg", "ahb", "per"; + bus-width = <4>; status = "disabled"; }; - i2c@021a0000 { /* I2C1 */ + i2c1: i2c@021a0000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; reg = <0x021a0000 0x4000>; interrupts = <0 36 0x04>; clocks = <&clks 125>; status = "disabled"; }; - i2c@021a4000 { /* I2C2 */ + i2c2: i2c@021a4000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; reg = <0x021a4000 0x4000>; interrupts = <0 37 0x04>; clocks = <&clks 126>; status = "disabled"; }; - i2c@021a8000 { /* I2C3 */ + i2c3: i2c@021a8000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; reg = <0x021a8000 0x4000>; interrupts = <0 38 0x04>; clocks = <&clks 127>; @@ -913,12 +933,12 @@ reg = <0x021ac000 0x4000>; }; - mmdc@021b0000 { /* MMDC0 */ + mmdc0: mmdc@021b0000 { /* MMDC0 */ compatible = "fsl,imx6q-mmdc"; reg = <0x021b0000 0x4000>; }; - mmdc@021b4000 { /* MMDC1 */ + mmdc1: mmdc@021b4000 { /* MMDC1 */ reg = <0x021b4000 0x4000>; }; @@ -946,7 +966,7 @@ interrupts = <0 109 0x04>; }; - audmux@021d8000 { + audmux: audmux@021d8000 { compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux"; reg = <0x021d8000 0x4000>; status = "disabled"; diff --git a/trunk/arch/arm/boot/dts/lpc32xx.dtsi b/trunk/arch/arm/boot/dts/lpc32xx.dtsi index e5ffe960dbf3..1582f484a867 100644 --- a/trunk/arch/arm/boot/dts/lpc32xx.dtsi +++ b/trunk/arch/arm/boot/dts/lpc32xx.dtsi @@ -182,6 +182,13 @@ pnx,timeout = <0x64>; }; + mpwm: mpwm@400E8000 { + compatible = "nxp,lpc3220-motor-pwm"; + reg = <0x400E8000 0x78>; + status = "disabled"; + #pwm-cells = <2>; + }; + i2cusb: i2c@31020300 { compatible = "nxp,pnx-i2c"; reg = <0x31020300 0x100>; diff --git a/trunk/arch/arm/boot/dts/omap2.dtsi b/trunk/arch/arm/boot/dts/omap2.dtsi index 581cb081cb0f..761c4b69b25b 100644 --- a/trunk/arch/arm/boot/dts/omap2.dtsi +++ b/trunk/arch/arm/boot/dts/omap2.dtsi @@ -12,6 +12,7 @@ / { compatible = "ti,omap2430", "ti,omap2420", "ti,omap2"; + interrupt-parent = <&intc>; aliases { serial0 = &uart1; @@ -65,5 +66,90 @@ ti,hwmods = "uart3"; clock-frequency = <48000000>; }; + + timer2: timer@4802a000 { + compatible = "ti,omap2-timer"; + reg = <0x4802a000 0x400>; + interrupts = <38>; + ti,hwmods = "timer2"; + }; + + timer3: timer@48078000 { + compatible = "ti,omap2-timer"; + reg = <0x48078000 0x400>; + interrupts = <39>; + ti,hwmods = "timer3"; + }; + + timer4: timer@4807a000 { + compatible = "ti,omap2-timer"; + reg = <0x4807a000 0x400>; + interrupts = <40>; + ti,hwmods = "timer4"; + }; + + timer5: timer@4807c000 { + compatible = "ti,omap2-timer"; + reg = <0x4807c000 0x400>; + interrupts = <41>; + ti,hwmods = "timer5"; + ti,timer-dsp; + }; + + timer6: timer@4807e000 { + compatible = "ti,omap2-timer"; + reg = <0x4807e000 0x400>; + interrupts = <42>; + ti,hwmods = "timer6"; + ti,timer-dsp; + }; + + timer7: timer@48080000 { + compatible = "ti,omap2-timer"; + reg = <0x48080000 0x400>; + interrupts = <43>; + ti,hwmods = "timer7"; + ti,timer-dsp; + }; + + timer8: timer@48082000 { + compatible = "ti,omap2-timer"; + reg = <0x48082000 0x400>; + interrupts = <44>; + ti,hwmods = "timer8"; + ti,timer-dsp; + }; + + timer9: timer@48084000 { + compatible = "ti,omap2-timer"; + reg = <0x48084000 0x400>; + interrupts = <45>; + ti,hwmods = "timer9"; + ti,timer-pwm; + }; + + timer10: timer@48086000 { + compatible = "ti,omap2-timer"; + reg = <0x48086000 0x400>; + interrupts = <46>; + ti,hwmods = "timer10"; + ti,timer-pwm; + }; + + timer11: timer@48088000 { + compatible = "ti,omap2-timer"; + reg = <0x48088000 0x400>; + interrupts = <47>; + ti,hwmods = "timer11"; + ti,timer-pwm; + }; + + timer12: timer@4808a000 { + compatible = "ti,omap2-timer"; + reg = <0x4808a000 0x400>; + interrupts = <48>; + ti,hwmods = "timer12"; + ti,timer-pwm; + }; }; }; diff --git a/trunk/arch/arm/boot/dts/omap2420.dtsi b/trunk/arch/arm/boot/dts/omap2420.dtsi index bfd76b4a0ddc..af6560908905 100644 --- a/trunk/arch/arm/boot/dts/omap2420.dtsi +++ b/trunk/arch/arm/boot/dts/omap2420.dtsi @@ -14,6 +14,12 @@ compatible = "ti,omap2420", "ti,omap2"; ocp { + counter32k: counter@48004000 { + compatible = "ti,omap-counter32k"; + reg = <0x48004000 0x20>; + ti,hwmods = "counter_32k"; + }; + omap2420_pmx: pinmux@48000030 { compatible = "ti,omap2420-padconf", "pinctrl-single"; reg = <0x48000030 0x0113>; @@ -30,7 +36,6 @@ interrupts = <59>, /* TX interrupt */ <60>; /* RX interrupt */ interrupt-names = "tx", "rx"; - interrupt-parent = <&intc>; ti,hwmods = "mcbsp1"; }; @@ -41,8 +46,15 @@ interrupts = <62>, /* TX interrupt */ <63>; /* RX interrupt */ interrupt-names = "tx", "rx"; - interrupt-parent = <&intc>; ti,hwmods = "mcbsp2"; }; + + timer1: timer@48028000 { + compatible = "ti,omap2-timer"; + reg = <0x48028000 0x400>; + interrupts = <37>; + ti,hwmods = "timer1"; + ti,timer-alwon; + }; }; }; diff --git a/trunk/arch/arm/boot/dts/omap2430.dtsi b/trunk/arch/arm/boot/dts/omap2430.dtsi index 4565d9750f4d..c3924457c9b6 100644 --- a/trunk/arch/arm/boot/dts/omap2430.dtsi +++ b/trunk/arch/arm/boot/dts/omap2430.dtsi @@ -14,6 +14,12 @@ compatible = "ti,omap2430", "ti,omap2"; ocp { + counter32k: counter@49020000 { + compatible = "ti,omap-counter32k"; + reg = <0x49020000 0x20>; + ti,hwmods = "counter_32k"; + }; + omap2430_pmx: pinmux@49002030 { compatible = "ti,omap2430-padconf", "pinctrl-single"; reg = <0x49002030 0x0154>; @@ -32,7 +38,6 @@ <60>, /* RX interrupt */ <61>; /* RX overflow interrupt */ interrupt-names = "common", "tx", "rx", "rx_overflow"; - interrupt-parent = <&intc>; ti,buffer-size = <128>; ti,hwmods = "mcbsp1"; }; @@ -45,7 +50,6 @@ <62>, /* TX interrupt */ <63>; /* RX interrupt */ interrupt-names = "common", "tx", "rx"; - interrupt-parent = <&intc>; ti,buffer-size = <128>; ti,hwmods = "mcbsp2"; }; @@ -58,7 +62,6 @@ <89>, /* TX interrupt */ <90>; /* RX interrupt */ interrupt-names = "common", "tx", "rx"; - interrupt-parent = <&intc>; ti,buffer-size = <128>; ti,hwmods = "mcbsp3"; }; @@ -71,7 +74,6 @@ <54>, /* TX interrupt */ <55>; /* RX interrupt */ interrupt-names = "common", "tx", "rx"; - interrupt-parent = <&intc>; ti,buffer-size = <128>; ti,hwmods = "mcbsp4"; }; @@ -84,9 +86,16 @@ <81>, /* TX interrupt */ <82>; /* RX interrupt */ interrupt-names = "common", "tx", "rx"; - interrupt-parent = <&intc>; ti,buffer-size = <128>; ti,hwmods = "mcbsp5"; }; + + timer1: timer@49018000 { + compatible = "ti,omap2-timer"; + reg = <0x49018000 0x400>; + interrupts = <37>; + ti,hwmods = "timer1"; + ti,timer-alwon; + }; }; }; diff --git a/trunk/arch/arm/boot/dts/omap3-beagle-xm.dts b/trunk/arch/arm/boot/dts/omap3-beagle-xm.dts index c38cf76df81f..3705a81c1fc2 100644 --- a/trunk/arch/arm/boot/dts/omap3-beagle-xm.dts +++ b/trunk/arch/arm/boot/dts/omap3-beagle-xm.dts @@ -55,12 +55,6 @@ interrupts = <7>; /* SYS_NIRQ cascaded to intc */ interrupt-parent = <&intc>; - vsim: regulator-vsim { - compatible = "ti,twl4030-vsim"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - }; - twl_audio: audio { compatible = "ti,twl4030-audio"; codec { diff --git a/trunk/arch/arm/boot/dts/omap3-beagle.dts b/trunk/arch/arm/boot/dts/omap3-beagle.dts new file mode 100644 index 000000000000..f624dc85d441 --- /dev/null +++ b/trunk/arch/arm/boot/dts/omap3-beagle.dts @@ -0,0 +1,67 @@ +/* + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +/include/ "omap3.dtsi" + +/ { + model = "TI OMAP3 BeagleBoard"; + compatible = "ti,omap3-beagle", "ti,omap3"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + + leds { + compatible = "gpio-leds"; + pmu_stat { + label = "beagleboard::pmu_stat"; + gpios = <&twl_gpio 19 0>; /* LEDB */ + }; + + heartbeat { + label = "beagleboard::usr0"; + gpios = <&gpio5 22 0>; /* 150 -> D6 LED */ + linux,default-trigger = "heartbeat"; + }; + + mmc { + label = "beagleboard::usr1"; + gpios = <&gpio5 21 0>; /* 149 -> D7 LED */ + linux,default-trigger = "mmc0"; + }; + }; + +}; + +&i2c1 { + clock-frequency = <2600000>; + + twl: twl@48 { + reg = <0x48>; + interrupts = <7>; /* SYS_NIRQ cascaded to intc */ + interrupt-parent = <&intc>; + }; +}; + +/include/ "twl4030.dtsi" + +&mmc1 { + vmmc-supply = <&vmmc1>; + vmmc_aux-supply = <&vsim>; + bus-width = <8>; +}; + +&mmc2 { + status = "disabled"; +}; + +&mmc3 { + status = "disabled"; +}; diff --git a/trunk/arch/arm/boot/dts/omap3.dtsi b/trunk/arch/arm/boot/dts/omap3.dtsi index 696e929d0304..1acc26148ffc 100644 --- a/trunk/arch/arm/boot/dts/omap3.dtsi +++ b/trunk/arch/arm/boot/dts/omap3.dtsi @@ -12,6 +12,7 @@ / { compatible = "ti,omap3430", "ti,omap3"; + interrupt-parent = <&intc>; aliases { serial0 = &uart1; @@ -60,6 +61,12 @@ ranges; ti,hwmods = "l3_main"; + counter32k: counter@48320000 { + compatible = "ti,omap-counter32k"; + reg = <0x48320000 0x20>; + ti,hwmods = "counter_32k"; + }; + intc: interrupt-controller@48200000 { compatible = "ti,omap2-intc"; interrupt-controller; @@ -240,7 +247,6 @@ <59>, /* TX interrupt */ <60>; /* RX interrupt */ interrupt-names = "common", "tx", "rx"; - interrupt-parent = <&intc>; ti,buffer-size = <128>; ti,hwmods = "mcbsp1"; }; @@ -255,7 +261,6 @@ <63>, /* RX interrupt */ <4>; /* Sidetone */ interrupt-names = "common", "tx", "rx", "sidetone"; - interrupt-parent = <&intc>; ti,buffer-size = <1280>; ti,hwmods = "mcbsp2", "mcbsp2_sidetone"; }; @@ -270,7 +275,6 @@ <90>, /* RX interrupt */ <5>; /* Sidetone */ interrupt-names = "common", "tx", "rx", "sidetone"; - interrupt-parent = <&intc>; ti,buffer-size = <128>; ti,hwmods = "mcbsp3", "mcbsp3_sidetone"; }; @@ -283,7 +287,6 @@ <54>, /* TX interrupt */ <55>; /* RX interrupt */ interrupt-names = "common", "tx", "rx"; - interrupt-parent = <&intc>; ti,buffer-size = <128>; ti,hwmods = "mcbsp4"; }; @@ -296,9 +299,103 @@ <81>, /* TX interrupt */ <82>; /* RX interrupt */ interrupt-names = "common", "tx", "rx"; - interrupt-parent = <&intc>; ti,buffer-size = <128>; ti,hwmods = "mcbsp5"; }; + + timer1: timer@48318000 { + compatible = "ti,omap2-timer"; + reg = <0x48318000 0x400>; + interrupts = <37>; + ti,hwmods = "timer1"; + ti,timer-alwon; + }; + + timer2: timer@49032000 { + compatible = "ti,omap2-timer"; + reg = <0x49032000 0x400>; + interrupts = <38>; + ti,hwmods = "timer2"; + }; + + timer3: timer@49034000 { + compatible = "ti,omap2-timer"; + reg = <0x49034000 0x400>; + interrupts = <39>; + ti,hwmods = "timer3"; + }; + + timer4: timer@49036000 { + compatible = "ti,omap2-timer"; + reg = <0x49036000 0x400>; + interrupts = <40>; + ti,hwmods = "timer4"; + }; + + timer5: timer@49038000 { + compatible = "ti,omap2-timer"; + reg = <0x49038000 0x400>; + interrupts = <41>; + ti,hwmods = "timer5"; + ti,timer-dsp; + }; + + timer6: timer@4903a000 { + compatible = "ti,omap2-timer"; + reg = <0x4903a000 0x400>; + interrupts = <42>; + ti,hwmods = "timer6"; + ti,timer-dsp; + }; + + timer7: timer@4903c000 { + compatible = "ti,omap2-timer"; + reg = <0x4903c000 0x400>; + interrupts = <43>; + ti,hwmods = "timer7"; + ti,timer-dsp; + }; + + timer8: timer@4903e000 { + compatible = "ti,omap2-timer"; + reg = <0x4903e000 0x400>; + interrupts = <44>; + ti,hwmods = "timer8"; + ti,timer-pwm; + ti,timer-dsp; + }; + + timer9: timer@49040000 { + compatible = "ti,omap2-timer"; + reg = <0x49040000 0x400>; + interrupts = <45>; + ti,hwmods = "timer9"; + ti,timer-pwm; + }; + + timer10: timer@48086000 { + compatible = "ti,omap2-timer"; + reg = <0x48086000 0x400>; + interrupts = <46>; + ti,hwmods = "timer10"; + ti,timer-pwm; + }; + + timer11: timer@48088000 { + compatible = "ti,omap2-timer"; + reg = <0x48088000 0x400>; + interrupts = <47>; + ti,hwmods = "timer11"; + ti,timer-pwm; + }; + + timer12: timer@48304000 { + compatible = "ti,omap2-timer"; + reg = <0x48304000 0x400>; + interrupts = <95>; + ti,hwmods = "timer12"; + ti,timer-alwon; + ti,timer-secure; + }; }; }; diff --git a/trunk/arch/arm/boot/dts/omap4-panda-a4.dts b/trunk/arch/arm/boot/dts/omap4-panda-a4.dts new file mode 100644 index 000000000000..75466d2abfb5 --- /dev/null +++ b/trunk/arch/arm/boot/dts/omap4-panda-a4.dts @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/include/ "omap4-panda.dts" + +/* Pandaboard Rev A4+ have external pullups on SCL & SDA */ +&dss_hdmi_pins { + pinctrl-single,pins = < + 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ + 0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */ + 0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */ + >; +}; diff --git a/trunk/arch/arm/boot/dts/omap4-pandaES.dts b/trunk/arch/arm/boot/dts/omap4-panda-es.dts similarity index 70% rename from trunk/arch/arm/boot/dts/omap4-pandaES.dts rename to trunk/arch/arm/boot/dts/omap4-panda-es.dts index d4ba43a48d9b..73bc1a67e444 100644 --- a/trunk/arch/arm/boot/dts/omap4-pandaES.dts +++ b/trunk/arch/arm/boot/dts/omap4-panda-es.dts @@ -22,3 +22,12 @@ "AFML", "Line In", "AFMR", "Line In"; }; + +/* PandaboardES has external pullups on SCL & SDA */ +&dss_hdmi_pins { + pinctrl-single,pins = < + 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ + 0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */ + 0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */ + >; +}; diff --git a/trunk/arch/arm/boot/dts/omap4-panda.dts b/trunk/arch/arm/boot/dts/omap4-panda.dts index e8f927cbb376..4122efe31cfd 100644 --- a/trunk/arch/arm/boot/dts/omap4-panda.dts +++ b/trunk/arch/arm/boot/dts/omap4-panda.dts @@ -65,6 +65,8 @@ &twl6040_pins &mcpdm_pins &mcbsp1_pins + &dss_hdmi_pins + &tpd12s015_pins >; twl6040_pins: pinmux_twl6040_pins { @@ -92,6 +94,22 @@ 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */ >; }; + + dss_hdmi_pins: pinmux_dss_hdmi_pins { + pinctrl-single,pins = < + 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ + 0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */ + 0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */ + >; + }; + + tpd12s015_pins: pinmux_tpd12s015_pins { + pinctrl-single,pins = < + 0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */ + 0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */ + 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */ + >; + }; }; &i2c1 { @@ -184,3 +202,7 @@ &dmic { status = "disabled"; }; + +&twl_usb_comparator { + usb-supply = <&vusb>; +}; diff --git a/trunk/arch/arm/boot/dts/omap4-sdp-es23plus.dts b/trunk/arch/arm/boot/dts/omap4-sdp-es23plus.dts new file mode 100644 index 000000000000..b4a40ffbce31 --- /dev/null +++ b/trunk/arch/arm/boot/dts/omap4-sdp-es23plus.dts @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/include/ "omap4-sdp.dts" + +/* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */ +&dss_hdmi_pins { + pinctrl-single,pins = < + 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ + 0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */ + 0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */ + >; +}; diff --git a/trunk/arch/arm/boot/dts/omap4-sdp.dts b/trunk/arch/arm/boot/dts/omap4-sdp.dts index 5b7e04fbff50..43e5258a9372 100644 --- a/trunk/arch/arm/boot/dts/omap4-sdp.dts +++ b/trunk/arch/arm/boot/dts/omap4-sdp.dts @@ -124,6 +124,8 @@ &dmic_pins &mcbsp1_pins &mcbsp2_pins + &dss_hdmi_pins + &tpd12s015_pins >; uart2_pins: pinmux_uart2_pins { @@ -194,6 +196,22 @@ 0xbc 0x100 /* abe_mcbsp2_fsx.abe_mcbsp2_fsx INPUT | MODE0 */ >; }; + + dss_hdmi_pins: pinmux_dss_hdmi_pins { + pinctrl-single,pins = < + 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ + 0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */ + 0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */ + >; + }; + + tpd12s015_pins: pinmux_tpd12s015_pins { + pinctrl-single,pins = < + 0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */ + 0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */ + 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */ + >; + }; }; &i2c1 { @@ -406,3 +424,7 @@ &mcbsp3 { status = "disabled"; }; + +&twl_usb_comparator { + usb-supply = <&vusb>; +}; diff --git a/trunk/arch/arm/boot/dts/omap4-var_som.dts b/trunk/arch/arm/boot/dts/omap4-var-som.dts similarity index 100% rename from trunk/arch/arm/boot/dts/omap4-var_som.dts rename to trunk/arch/arm/boot/dts/omap4-var-som.dts diff --git a/trunk/arch/arm/boot/dts/omap4.dtsi b/trunk/arch/arm/boot/dts/omap4.dtsi index 3883f94fdbd0..739bb79e410e 100644 --- a/trunk/arch/arm/boot/dts/omap4.dtsi +++ b/trunk/arch/arm/boot/dts/omap4.dtsi @@ -95,6 +95,12 @@ ranges; ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; + counter32k: counter@4a304000 { + compatible = "ti,omap-counter32k"; + reg = <0x4a304000 0x20>; + ti,hwmods = "counter_32k"; + }; + omap4_pmx_core: pinmux@4a100040 { compatible = "ti,omap4-padconf", "pinctrl-single"; reg = <0x4a100040 0x0196>; @@ -340,7 +346,6 @@ <0x49032000 0x7f>; /* L3 Interconnect */ reg-names = "mpu", "dma"; interrupts = <0 112 0x4>; - interrupt-parent = <&gic>; ti,hwmods = "mcpdm"; }; @@ -350,7 +355,6 @@ <0x4902e000 0x7f>; /* L3 Interconnect */ reg-names = "mpu", "dma"; interrupts = <0 114 0x4>; - interrupt-parent = <&gic>; ti,hwmods = "dmic"; }; @@ -361,7 +365,6 @@ reg-names = "mpu", "dma"; interrupts = <0 17 0x4>; interrupt-names = "common"; - interrupt-parent = <&gic>; ti,buffer-size = <128>; ti,hwmods = "mcbsp1"; }; @@ -373,7 +376,6 @@ reg-names = "mpu", "dma"; interrupts = <0 22 0x4>; interrupt-names = "common"; - interrupt-parent = <&gic>; ti,buffer-size = <128>; ti,hwmods = "mcbsp2"; }; @@ -385,7 +387,6 @@ reg-names = "mpu", "dma"; interrupts = <0 23 0x4>; interrupt-names = "common"; - interrupt-parent = <&gic>; ti,buffer-size = <128>; ti,hwmods = "mcbsp3"; }; @@ -396,7 +397,6 @@ reg-names = "mpu"; interrupts = <0 16 0x4>; interrupt-names = "common"; - interrupt-parent = <&gic>; ti,buffer-size = <128>; ti,hwmods = "mcbsp4"; }; @@ -431,12 +431,103 @@ hw-caps-temp-alert; }; - ocp2scp { + ocp2scp@4a0ad000 { compatible = "ti,omap-ocp2scp"; + reg = <0x4a0ad000 0x1f>; #address-cells = <1>; #size-cells = <1>; ranges; ti,hwmods = "ocp2scp_usb_phy"; }; + + timer1: timer@4a318000 { + compatible = "ti,omap2-timer"; + reg = <0x4a318000 0x80>; + interrupts = <0 37 0x4>; + ti,hwmods = "timer1"; + ti,timer-alwon; + }; + + timer2: timer@48032000 { + compatible = "ti,omap2-timer"; + reg = <0x48032000 0x80>; + interrupts = <0 38 0x4>; + ti,hwmods = "timer2"; + }; + + timer3: timer@48034000 { + compatible = "ti,omap2-timer"; + reg = <0x48034000 0x80>; + interrupts = <0 39 0x4>; + ti,hwmods = "timer3"; + }; + + timer4: timer@48036000 { + compatible = "ti,omap2-timer"; + reg = <0x48036000 0x80>; + interrupts = <0 40 0x4>; + ti,hwmods = "timer4"; + }; + + timer5: timer@40138000 { + compatible = "ti,omap2-timer"; + reg = <0x40138000 0x80>, + <0x49038000 0x80>; + interrupts = <0 41 0x4>; + ti,hwmods = "timer5"; + ti,timer-dsp; + }; + + timer6: timer@4013a000 { + compatible = "ti,omap2-timer"; + reg = <0x4013a000 0x80>, + <0x4903a000 0x80>; + interrupts = <0 42 0x4>; + ti,hwmods = "timer6"; + ti,timer-dsp; + }; + + timer7: timer@4013c000 { + compatible = "ti,omap2-timer"; + reg = <0x4013c000 0x80>, + <0x4903c000 0x80>; + interrupts = <0 43 0x4>; + ti,hwmods = "timer7"; + ti,timer-dsp; + }; + + timer8: timer@4013e000 { + compatible = "ti,omap2-timer"; + reg = <0x4013e000 0x80>, + <0x4903e000 0x80>; + interrupts = <0 44 0x4>; + ti,hwmods = "timer8"; + ti,timer-pwm; + ti,timer-dsp; + }; + + timer9: timer@4803e000 { + compatible = "ti,omap2-timer"; + reg = <0x4803e000 0x80>; + interrupts = <0 45 0x4>; + ti,hwmods = "timer9"; + ti,timer-pwm; + }; + + timer10: timer@48086000 { + compatible = "ti,omap2-timer"; + reg = <0x48086000 0x80>; + interrupts = <0 46 0x4>; + ti,hwmods = "timer10"; + ti,timer-pwm; + }; + + timer11: timer@48088000 { + compatible = "ti,omap2-timer"; + reg = <0x48088000 0x80>; + interrupts = <0 47 0x4>; + ti,hwmods = "timer11"; + ti,timer-pwm; + }; }; }; diff --git a/trunk/arch/arm/boot/dts/omap5-evm.dts b/trunk/arch/arm/boot/dts/omap5-evm.dts index c663eba73168..8722c15bbba2 100644 --- a/trunk/arch/arm/boot/dts/omap5-evm.dts +++ b/trunk/arch/arm/boot/dts/omap5-evm.dts @@ -8,6 +8,7 @@ /dts-v1/; /include/ "omap5.dtsi" +/include/ "samsung_k3pe0e000b.dtsi" / { model = "TI OMAP5 EVM board"; @@ -15,7 +16,7 @@ memory { device_type = "memory"; - reg = <0x80000000 0x40000000>; /* 1 GB */ + reg = <0x80000000 0x80000000>; /* 2 GB */ }; vmmcsd_fixed: fixedregulator-mmcsd { @@ -140,3 +141,13 @@ &mcbsp3 { status = "disabled"; }; + +&emif1 { + cs1-used; + device-handle = <&samsung_K3PE0E000B>; +}; + +&emif2 { + cs1-used; + device-handle = <&samsung_K3PE0E000B>; +}; diff --git a/trunk/arch/arm/boot/dts/omap5.dtsi b/trunk/arch/arm/boot/dts/omap5.dtsi index 42c78beb4fdc..790bb2a4b343 100644 --- a/trunk/arch/arm/boot/dts/omap5.dtsi +++ b/trunk/arch/arm/boot/dts/omap5.dtsi @@ -77,6 +77,12 @@ ranges; ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; + counter32k: counter@4ae04000 { + compatible = "ti,omap-counter32k"; + reg = <0x4ae04000 0x40>; + ti,hwmods = "counter_32k"; + }; + omap5_pmx_core: pinmux@4a002840 { compatible = "ti,omap4-padconf", "pinctrl-single"; reg = <0x4a002840 0x01b6>; @@ -104,6 +110,8 @@ gpio1: gpio@4ae10000 { compatible = "ti,omap4-gpio"; + reg = <0x4ae10000 0x200>; + interrupts = <0 29 0x4>; ti,hwmods = "gpio1"; gpio-controller; #gpio-cells = <2>; @@ -113,6 +121,8 @@ gpio2: gpio@48055000 { compatible = "ti,omap4-gpio"; + reg = <0x48055000 0x200>; + interrupts = <0 30 0x4>; ti,hwmods = "gpio2"; gpio-controller; #gpio-cells = <2>; @@ -122,6 +132,8 @@ gpio3: gpio@48057000 { compatible = "ti,omap4-gpio"; + reg = <0x48057000 0x200>; + interrupts = <0 31 0x4>; ti,hwmods = "gpio3"; gpio-controller; #gpio-cells = <2>; @@ -131,6 +143,8 @@ gpio4: gpio@48059000 { compatible = "ti,omap4-gpio"; + reg = <0x48059000 0x200>; + interrupts = <0 32 0x4>; ti,hwmods = "gpio4"; gpio-controller; #gpio-cells = <2>; @@ -140,6 +154,8 @@ gpio5: gpio@4805b000 { compatible = "ti,omap4-gpio"; + reg = <0x4805b000 0x200>; + interrupts = <0 33 0x4>; ti,hwmods = "gpio5"; gpio-controller; #gpio-cells = <2>; @@ -149,6 +165,8 @@ gpio6: gpio@4805d000 { compatible = "ti,omap4-gpio"; + reg = <0x4805d000 0x200>; + interrupts = <0 34 0x4>; ti,hwmods = "gpio6"; gpio-controller; #gpio-cells = <2>; @@ -158,6 +176,8 @@ gpio7: gpio@48051000 { compatible = "ti,omap4-gpio"; + reg = <0x48051000 0x200>; + interrupts = <0 35 0x4>; ti,hwmods = "gpio7"; gpio-controller; #gpio-cells = <2>; @@ -167,6 +187,8 @@ gpio8: gpio@48053000 { compatible = "ti,omap4-gpio"; + reg = <0x48053000 0x200>; + interrupts = <0 121 0x4>; ti,hwmods = "gpio8"; gpio-controller; #gpio-cells = <2>; @@ -176,6 +198,8 @@ i2c1: i2c@48070000 { compatible = "ti,omap4-i2c"; + reg = <0x48070000 0x100>; + interrupts = <0 56 0x4>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c1"; @@ -183,6 +207,8 @@ i2c2: i2c@48072000 { compatible = "ti,omap4-i2c"; + reg = <0x48072000 0x100>; + interrupts = <0 57 0x4>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c2"; @@ -190,20 +216,26 @@ i2c3: i2c@48060000 { compatible = "ti,omap4-i2c"; + reg = <0x48060000 0x100>; + interrupts = <0 61 0x4>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c3"; }; - i2c4: i2c@4807A000 { + i2c4: i2c@4807a000 { compatible = "ti,omap4-i2c"; + reg = <0x4807a000 0x100>; + interrupts = <0 62 0x4>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c4"; }; - i2c5: i2c@4807C000 { + i2c5: i2c@4807c000 { compatible = "ti,omap4-i2c"; + reg = <0x4807c000 0x100>; + interrupts = <0 60 0x4>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c5"; @@ -211,42 +243,56 @@ uart1: serial@4806a000 { compatible = "ti,omap4-uart"; + reg = <0x4806a000 0x100>; + interrupts = <0 72 0x4>; ti,hwmods = "uart1"; clock-frequency = <48000000>; }; uart2: serial@4806c000 { compatible = "ti,omap4-uart"; + reg = <0x4806c000 0x100>; + interrupts = <0 73 0x4>; ti,hwmods = "uart2"; clock-frequency = <48000000>; }; uart3: serial@48020000 { compatible = "ti,omap4-uart"; + reg = <0x48020000 0x100>; + interrupts = <0 74 0x4>; ti,hwmods = "uart3"; clock-frequency = <48000000>; }; uart4: serial@4806e000 { compatible = "ti,omap4-uart"; + reg = <0x4806e000 0x100>; + interrupts = <0 70 0x4>; ti,hwmods = "uart4"; clock-frequency = <48000000>; }; uart5: serial@48066000 { - compatible = "ti,omap5-uart"; + compatible = "ti,omap4-uart"; + reg = <0x48066000 0x100>; + interrupts = <0 105 0x4>; ti,hwmods = "uart5"; clock-frequency = <48000000>; }; uart6: serial@48068000 { - compatible = "ti,omap6-uart"; + compatible = "ti,omap4-uart"; + reg = <0x48068000 0x100>; + interrupts = <0 106 0x4>; ti,hwmods = "uart6"; clock-frequency = <48000000>; }; mmc1: mmc@4809c000 { compatible = "ti,omap4-hsmmc"; + reg = <0x4809c000 0x400>; + interrupts = <0 83 0x4>; ti,hwmods = "mmc1"; ti,dual-volt; ti,needs-special-reset; @@ -254,24 +300,32 @@ mmc2: mmc@480b4000 { compatible = "ti,omap4-hsmmc"; + reg = <0x480b4000 0x400>; + interrupts = <0 86 0x4>; ti,hwmods = "mmc2"; ti,needs-special-reset; }; mmc3: mmc@480ad000 { compatible = "ti,omap4-hsmmc"; + reg = <0x480ad000 0x400>; + interrupts = <0 94 0x4>; ti,hwmods = "mmc3"; ti,needs-special-reset; }; mmc4: mmc@480d1000 { compatible = "ti,omap4-hsmmc"; + reg = <0x480d1000 0x400>; + interrupts = <0 96 0x4>; ti,hwmods = "mmc4"; ti,needs-special-reset; }; mmc5: mmc@480d5000 { compatible = "ti,omap4-hsmmc"; + reg = <0x480d5000 0x400>; + interrupts = <0 59 0x4>; ti,hwmods = "mmc5"; ti,needs-special-reset; }; @@ -287,7 +341,6 @@ <0x49032000 0x7f>; /* L3 Interconnect */ reg-names = "mpu", "dma"; interrupts = <0 112 0x4>; - interrupt-parent = <&gic>; ti,hwmods = "mcpdm"; }; @@ -297,7 +350,6 @@ <0x4902e000 0x7f>; /* L3 Interconnect */ reg-names = "mpu", "dma"; interrupts = <0 114 0x4>; - interrupt-parent = <&gic>; ti,hwmods = "dmic"; }; @@ -308,7 +360,6 @@ reg-names = "mpu", "dma"; interrupts = <0 17 0x4>; interrupt-names = "common"; - interrupt-parent = <&gic>; ti,buffer-size = <128>; ti,hwmods = "mcbsp1"; }; @@ -320,7 +371,6 @@ reg-names = "mpu", "dma"; interrupts = <0 22 0x4>; interrupt-names = "common"; - interrupt-parent = <&gic>; ti,buffer-size = <128>; ti,hwmods = "mcbsp2"; }; @@ -332,9 +382,119 @@ reg-names = "mpu", "dma"; interrupts = <0 23 0x4>; interrupt-names = "common"; - interrupt-parent = <&gic>; ti,buffer-size = <128>; ti,hwmods = "mcbsp3"; }; + + timer1: timer@4ae18000 { + compatible = "ti,omap2-timer"; + reg = <0x4ae18000 0x80>; + interrupts = <0 37 0x4>; + ti,hwmods = "timer1"; + ti,timer-alwon; + }; + + timer2: timer@48032000 { + compatible = "ti,omap2-timer"; + reg = <0x48032000 0x80>; + interrupts = <0 38 0x4>; + ti,hwmods = "timer2"; + }; + + timer3: timer@48034000 { + compatible = "ti,omap2-timer"; + reg = <0x48034000 0x80>; + interrupts = <0 39 0x4>; + ti,hwmods = "timer3"; + }; + + timer4: timer@48036000 { + compatible = "ti,omap2-timer"; + reg = <0x48036000 0x80>; + interrupts = <0 40 0x4>; + ti,hwmods = "timer4"; + }; + + timer5: timer@40138000 { + compatible = "ti,omap2-timer"; + reg = <0x40138000 0x80>, + <0x49038000 0x80>; + interrupts = <0 41 0x4>; + ti,hwmods = "timer5"; + ti,timer-dsp; + }; + + timer6: timer@4013a000 { + compatible = "ti,omap2-timer"; + reg = <0x4013a000 0x80>, + <0x4903a000 0x80>; + interrupts = <0 42 0x4>; + ti,hwmods = "timer6"; + ti,timer-dsp; + ti,timer-pwm; + }; + + timer7: timer@4013c000 { + compatible = "ti,omap2-timer"; + reg = <0x4013c000 0x80>, + <0x4903c000 0x80>; + interrupts = <0 43 0x4>; + ti,hwmods = "timer7"; + ti,timer-dsp; + }; + + timer8: timer@4013e000 { + compatible = "ti,omap2-timer"; + reg = <0x4013e000 0x80>, + <0x4903e000 0x80>; + interrupts = <0 44 0x4>; + ti,hwmods = "timer8"; + ti,timer-dsp; + ti,timer-pwm; + }; + + timer9: timer@4803e000 { + compatible = "ti,omap2-timer"; + reg = <0x4803e000 0x80>; + interrupts = <0 45 0x4>; + ti,hwmods = "timer9"; + }; + + timer10: timer@48086000 { + compatible = "ti,omap2-timer"; + reg = <0x48086000 0x80>; + interrupts = <0 46 0x4>; + ti,hwmods = "timer10"; + }; + + timer11: timer@48088000 { + compatible = "ti,omap2-timer"; + reg = <0x48088000 0x80>; + interrupts = <0 47 0x4>; + ti,hwmods = "timer11"; + ti,timer-pwm; + }; + + emif1: emif@0x4c000000 { + compatible = "ti,emif-4d5"; + ti,hwmods = "emif1"; + phy-type = <2>; /* DDR PHY type: Intelli PHY */ + reg = <0x4c000000 0x400>; + interrupts = <0 110 0x4>; + hw-caps-read-idle-ctrl; + hw-caps-ll-interface; + hw-caps-temp-alert; + }; + + emif2: emif@0x4d000000 { + compatible = "ti,emif-4d5"; + ti,hwmods = "emif2"; + phy-type = <2>; /* DDR PHY type: Intelli PHY */ + reg = <0x4d000000 0x400>; + interrupts = <0 111 0x4>; + hw-caps-read-idle-ctrl; + hw-caps-ll-interface; + hw-caps-temp-alert; + }; }; }; diff --git a/trunk/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi b/trunk/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi new file mode 100644 index 000000000000..9657a5cbc3ad --- /dev/null +++ b/trunk/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi @@ -0,0 +1,67 @@ +/* + * Timings and Geometry for Samsung K3PE0E000B memory part + */ + +/ { + samsung_K3PE0E000B: lpddr2 { + compatible = "Samsung,K3PE0E000B","jedec,lpddr2-s4"; + density = <4096>; + io-width = <32>; + + tRPab-min-tck = <3>; + tRCD-min-tck = <3>; + tWR-min-tck = <3>; + tRASmin-min-tck = <3>; + tRRD-min-tck = <2>; + tWTR-min-tck = <2>; + tXP-min-tck = <2>; + tRTP-min-tck = <2>; + tCKE-min-tck = <3>; + tCKESR-min-tck = <3>; + tFAW-min-tck = <8>; + + timings_samsung_K3PE0E000B_533MHz: lpddr2-timings@0 { + compatible = "jedec,lpddr2-timings"; + min-freq = <10000000>; + max-freq = <533333333>; + tRPab = <21000>; + tRCD = <18000>; + tWR = <15000>; + tRAS-min = <42000>; + tRRD = <10000>; + tWTR = <7500>; + tXP = <7500>; + tRTP = <7500>; + tCKESR = <15000>; + tDQSCK-max = <5500>; + tFAW = <50000>; + tZQCS = <90000>; + tZQCL = <360000>; + tZQinit = <1000000>; + tRAS-max-ns = <70000>; + tDQSCK-max-derated = <6000>; + }; + + timings_samsung_K3PE0E000B_266MHz: lpddr2-timings@1 { + compatible = "jedec,lpddr2-timings"; + min-freq = <10000000>; + max-freq = <266666666>; + tRPab = <21000>; + tRCD = <18000>; + tWR = <15000>; + tRAS-min = <42000>; + tRRD = <10000>; + tWTR = <7500>; + tXP = <7500>; + tRTP = <7500>; + tCKESR = <15000>; + tDQSCK-max = <5500>; + tFAW = <50000>; + tZQCS = <90000>; + tZQCL = <360000>; + tZQinit = <1000000>; + tRAS-max-ns = <70000>; + tDQSCK-max-derated = <6000>; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/snowball.dts b/trunk/arch/arm/boot/dts/snowball.dts index 702c0baa6004..9e02a913eb62 100644 --- a/trunk/arch/arm/boot/dts/snowball.dts +++ b/trunk/arch/arm/boot/dts/snowball.dts @@ -14,7 +14,7 @@ / { model = "Calao Systems Snowball platform with device tree"; - compatible = "calaosystems,snowball-a9500"; + compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500"; memory { reg = <0x00000000 0x20000000>; @@ -120,10 +120,10 @@ }; // External Micro SD slot - sdi@80126000 { + sdi0_per1@80126000 { arm,primecell-periphid = <0x10480180>; max-frequency = <50000000>; - bus-width = <8>; + bus-width = <4>; mmc-cap-mmc-highspeed; vmmc-supply = <&ab8500_ldo_aux3_reg>; @@ -134,7 +134,7 @@ }; // On-board eMMC - sdi@80114000 { + sdi4_per2@80114000 { arm,primecell-periphid = <0x10480180>; max-frequency = <50000000>; bus-width = <8>; @@ -183,5 +183,137 @@ reg = <0x33>; }; }; + + prcmu@80157000 { + db8500-prcmu-regulators { + db8500_vape_reg: db8500_vape { + regulator-name = "db8500-vape"; + }; + + db8500_varm_reg: db8500_varm { + regulator-name = "db8500-varm"; + }; + + db8500_vmodem_reg: db8500_vmodem { + regulator-name = "db8500-vmodem"; + }; + + db8500_vpll_reg: db8500_vpll { + regulator-name = "db8500-vpll"; + }; + + db8500_vsmps1_reg: db8500_vsmps1 { + regulator-name = "db8500-vsmps1"; + }; + + db8500_vsmps2_reg: db8500_vsmps2 { + regulator-name = "db8500-vsmps2"; + }; + + db8500_vsmps3_reg: db8500_vsmps3 { + regulator-name = "db8500-vsmps3"; + }; + + db8500_vrf1_reg: db8500_vrf1 { + regulator-name = "db8500-vrf1"; + }; + + db8500_sva_mmdsp_reg: db8500_sva_mmdsp { + regulator-name = "db8500-sva-mmdsp"; + }; + + db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { + regulator-name = "db8500-sva-mmdsp-ret"; + }; + + db8500_sva_pipe_reg: db8500_sva_pipe { + regulator-name = "db8500_sva_pipe"; + }; + + db8500_sia_mmdsp_reg: db8500_sia_mmdsp { + regulator-name = "db8500_sia_mmdsp"; + }; + + db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret { + regulator-name = "db8500-sia-mmdsp-ret"; + }; + + db8500_sia_pipe_reg: db8500_sia_pipe { + regulator-name = "db8500-sia-pipe"; + }; + + db8500_sga_reg: db8500_sga { + regulator-name = "db8500-sga"; + }; + + db8500_b2r2_mcde_reg: db8500_b2r2_mcde { + regulator-name = "db8500-b2r2-mcde"; + }; + + db8500_esram12_reg: db8500_esram12 { + regulator-name = "db8500-esram12"; + }; + + db8500_esram12_ret_reg: db8500_esram12_ret { + regulator-name = "db8500-esram12-ret"; + }; + + db8500_esram34_reg: db8500_esram34 { + regulator-name = "db8500-esram34"; + }; + + db8500_esram34_ret_reg: db8500_esram34_ret { + regulator-name = "db8500-esram34-ret"; + }; + }; + + ab8500@5 { + ab8500-regulators { + ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { + regulator-name = "V-DISPLAY"; + }; + + ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { + regulator-name = "V-eMMC1"; + }; + + ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { + regulator-name = "V-MMC-SD"; + }; + + ab8500_ldo_initcore_reg: ab8500_ldo_initcore { + regulator-name = "V-INTCORE"; + }; + + ab8500_ldo_tvout_reg: ab8500_ldo_tvout { + regulator-name = "V-TVOUT"; + }; + + ab8500_ldo_usb_reg: ab8500_ldo_usb { + regulator-name = "dummy"; + }; + + ab8500_ldo_audio_reg: ab8500_ldo_audio { + regulator-name = "V-AUD"; + }; + + ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { + regulator-name = "V-AMIC1"; + }; + + ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 { + regulator-name = "V-AMIC2"; + }; + + ab8500_ldo_dmic_reg: ab8500_ldo_dmic { + regulator-name = "V-DMIC"; + }; + + ab8500_ldo_ana_reg: ab8500_ldo_ana { + regulator-name = "V-CSI/DSI"; + }; + }; + }; + }; }; }; diff --git a/trunk/arch/arm/boot/dts/stuib.dtsi b/trunk/arch/arm/boot/dts/stuib.dtsi new file mode 100644 index 000000000000..39446a247e79 --- /dev/null +++ b/trunk/arch/arm/boot/dts/stuib.dtsi @@ -0,0 +1,78 @@ +/* + * Copyright 2012 ST-Ericsson AB + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/ { + soc-u9500 { + i2c@80004000 { + stmpe1601: stmpe1601@40 { + compatible = "st,stmpe1601"; + reg = <0x40>; + interrupts = <26 0x1>; + interrupt-parent = <&gpio6>; + interrupt-controller; + + wakeup-source; + st,autosleep-timeout = <1024>; + + stmpe_keypad { + compatible = "st,stmpe-keypad"; + + debounce-interval = <64>; + st,scan-count = <8>; + st,no-autorepeat; + + linux,keymap = <0x205006b + 0x4010074 + 0x3050072 + 0x1030004 + 0x502006a + 0x500000a + 0x5008b + 0x706001c + 0x405000b + 0x6070003 + 0x3040067 + 0x303006c + 0x60400e7 + 0x602009e + 0x4020073 + 0x5050002 + 0x4030069 + 0x3020008>; + }; + }; + }; + + i2c@80110000 { + bu21013_tp@0x5c { + compatible = "rhom,bu21013_tp"; + reg = <0x5c>; + touch-gpio = <&gpio2 20 0x4>; + avdd-supply = <&ab8500_ldo_aux1_reg>; + + rhom,touch-max-x = <384>; + rhom,touch-max-y = <704>; + rhom,flip-y; + }; + + bu21013_tp@0x5d { + compatible = "rhom,bu21013_tp"; + reg = <0x5d>; + touch-gpio = <&gpio2 20 0x4>; + avdd-supply = <&ab8500_ldo_aux1_reg>; + + rhom,touch-max-x = <384>; + rhom,touch-max-y = <704>; + rhom,flip-y; + }; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/tegra20-harmony.dts b/trunk/arch/arm/boot/dts/tegra20-harmony.dts index c3ef1ad26b6a..43eb72af8948 100644 --- a/trunk/arch/arm/boot/dts/tegra20-harmony.dts +++ b/trunk/arch/arm/boot/dts/tegra20-harmony.dts @@ -10,6 +10,18 @@ reg = <0x00000000 0x40000000>; }; + host1x { + hdmi { + status = "okay"; + + vdd-supply = <&hdmi_vdd_reg>; + pll-supply = <&hdmi_pll_reg>; + + nvidia,ddc-i2c-bus = <&hdmi_ddc>; + nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ + }; + }; + pinmux { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -262,9 +274,9 @@ }; }; - i2c@7000c400 { + hdmi_ddc: i2c@7000c400 { status = "okay"; - clock-frequency = <400000>; + clock-frequency = <100000>; }; i2c@7000c500 { @@ -297,131 +309,98 @@ vinldo9-supply = <&sm2_reg>; regulators { - #address-cells = <1>; - #size-cells = <0>; - - sys_reg: regulator@0 { - reg = <0>; - regulator-compatible = "sys"; + sys_reg: sys { regulator-name = "vdd_sys"; regulator-always-on; }; - regulator@1 { - reg = <1>; - regulator-compatible = "sm0"; + sm0 { regulator-name = "vdd_sm0,vdd_core"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - regulator@2 { - reg = <2>; - regulator-compatible = "sm1"; + sm1 { regulator-name = "vdd_sm1,vdd_cpu"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; }; - sm2_reg: regulator@3 { - reg = <3>; - regulator-compatible = "sm2"; + sm2_reg: sm2 { regulator-name = "vdd_sm2,vin_ldo*"; regulator-min-microvolt = <3700000>; regulator-max-microvolt = <3700000>; regulator-always-on; }; - regulator@4 { - reg = <4>; - regulator-compatible = "ldo0"; + ldo0 { regulator-name = "vdd_ldo0,vddio_pex_clk"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - regulator@5 { - reg = <5>; - regulator-compatible = "ldo1"; + ldo1 { regulator-name = "vdd_ldo1,avdd_pll*"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; regulator-always-on; }; - regulator@6 { - reg = <6>; - regulator-compatible = "ldo2"; + ldo2 { regulator-name = "vdd_ldo2,vdd_rtc"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - regulator@7 { - reg = <7>; - regulator-compatible = "ldo3"; + ldo3 { regulator-name = "vdd_ldo3,avdd_usb*"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - regulator@8 { - reg = <8>; - regulator-compatible = "ldo4"; + ldo4 { regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - regulator@9 { - reg = <9>; - regulator-compatible = "ldo5"; + ldo5 { regulator-name = "vdd_ldo5,vcore_mmc"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - regulator@10 { - reg = <10>; - regulator-compatible = "ldo6"; + ldo6 { regulator-name = "vdd_ldo6,avdd_vdac"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - regulator@11 { - reg = <11>; - regulator-compatible = "ldo7"; + hdmi_vdd_reg: ldo7 { regulator-name = "vdd_ldo7,avdd_hdmi"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - regulator@12 { - reg = <12>; - regulator-compatible = "ldo8"; + hdmi_pll_reg: ldo8 { regulator-name = "vdd_ldo8,avdd_hdmi_pll"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - regulator@13 { - reg = <13>; - regulator-compatible = "ldo9"; + ldo9 { regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - regulator@14 { - reg = <14>; - regulator-compatible = "ldo_rtc"; + ldo_rtc { regulator-name = "vdd_rtc_out,vdd_cell"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -429,6 +408,11 @@ }; }; }; + + temperature-sensor@4c { + compatible = "adi,adt7461"; + reg = <0x4c>; + }; }; pmc { diff --git a/trunk/arch/arm/boot/dts/tegra20-paz00.dts b/trunk/arch/arm/boot/dts/tegra20-paz00.dts index ddf287f52d49..6a93d1404c76 100644 --- a/trunk/arch/arm/boot/dts/tegra20-paz00.dts +++ b/trunk/arch/arm/boot/dts/tegra20-paz00.dts @@ -291,37 +291,26 @@ vinldo9-supply = <&sm2_reg>; regulators { - #address-cells = <1>; - #size-cells = <0>; - - sys_reg: regulator@0 { - reg = <0>; - regulator-compatible = "sys"; + sys_reg: sys { regulator-name = "vdd_sys"; regulator-always-on; }; - regulator@1 { - reg = <1>; - regulator-compatible = "sm0"; + sm0 { regulator-name = "+1.2vs_sm0,vdd_core"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - regulator@2 { - reg = <2>; - regulator-compatible = "sm1"; + sm1 { regulator-name = "+1.0vs_sm1,vdd_cpu"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; }; - sm2_reg: regulator@3 { - reg = <3>; - regulator-compatible = "sm2"; + sm2_reg: sm2 { regulator-name = "+3.7vs_sm2,vin_ldo*"; regulator-min-microvolt = <3700000>; regulator-max-microvolt = <3700000>; @@ -330,53 +319,41 @@ /* LDO0 is not connected to anything */ - regulator@5 { - reg = <5>; - regulator-compatible = "ldo1"; + ldo1 { regulator-name = "+1.1vs_ldo1,avdd_pll*"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; regulator-always-on; }; - regulator@6 { - reg = <6>; - regulator-compatible = "ldo2"; + ldo2 { regulator-name = "+1.2vs_ldo2,vdd_rtc"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - regulator@7 { - reg = <7>; - regulator-compatible = "ldo3"; + ldo3 { regulator-name = "+3.3vs_ldo3,avdd_usb*"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - regulator@8 { - reg = <8>; - regulator-compatible = "ldo4"; + ldo4 { regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - regulator@9 { - reg = <9>; - regulator-compatible = "ldo5"; + ldo5 { regulator-name = "+2.85vs_ldo5,vcore_mmc"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - regulator@10 { - reg = <10>; - regulator-compatible = "ldo6"; + ldo6 { /* * Research indicates this should be * 1.8v; other boards that use this @@ -390,34 +367,26 @@ regulator-max-microvolt = <1800000>; }; - regulator@11 { - reg = <11>; - regulator-compatible = "ldo7"; + ldo7 { regulator-name = "+3.3vs_ldo7,avdd_hdmi"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - regulator@12 { - reg = <12>; - regulator-compatible = "ldo8"; + ldo8 { regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - regulator@13 { - reg = <13>; - regulator-compatible = "ldo9"; + ldo9 { regulator-name = "+2.85vs_ldo9,vdd_ddr_rx"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - regulator@14 { - reg = <14>; - regulator-compatible = "ldo_rtc"; + ldo_rtc { regulator-name = "+3.3vs_rtc"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; diff --git a/trunk/arch/arm/boot/dts/tegra20-plutux.dts b/trunk/arch/arm/boot/dts/tegra20-plutux.dts index 331a3ef24d59..289480026fbf 100644 --- a/trunk/arch/arm/boot/dts/tegra20-plutux.dts +++ b/trunk/arch/arm/boot/dts/tegra20-plutux.dts @@ -6,6 +6,12 @@ model = "Avionic Design Plutux board"; compatible = "ad,plutux", "ad,tamonten", "nvidia,tegra20"; + host1x { + hdmi { + status = "okay"; + }; + }; + i2c@7000c000 { wm8903: wm8903@1a { compatible = "wlf,wm8903"; diff --git a/trunk/arch/arm/boot/dts/tegra20-seaboard.dts b/trunk/arch/arm/boot/dts/tegra20-seaboard.dts index f0ba901676ac..eafeca65eb21 100644 --- a/trunk/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/trunk/arch/arm/boot/dts/tegra20-seaboard.dts @@ -395,37 +395,26 @@ vinldo9-supply = <&sm2_reg>; regulators { - #address-cells = <1>; - #size-cells = <0>; - - sys_reg: regulator@0 { - reg = <0>; - regulator-compatible = "sys"; + sys_reg: sys { regulator-name = "vdd_sys"; regulator-always-on; }; - regulator@1 { - reg = <1>; - regulator-compatible = "sm0"; + sm0 { regulator-name = "vdd_sm0,vdd_core"; regulator-min-microvolt = <1300000>; regulator-max-microvolt = <1300000>; regulator-always-on; }; - regulator@2 { - reg = <2>; - regulator-compatible = "sm1"; + sm1 { regulator-name = "vdd_sm1,vdd_cpu"; regulator-min-microvolt = <1125000>; regulator-max-microvolt = <1125000>; regulator-always-on; }; - sm2_reg: regulator@3 { - reg = <3>; - regulator-compatible = "sm2"; + sm2_reg: sm2 { regulator-name = "vdd_sm2,vin_ldo*"; regulator-min-microvolt = <3700000>; regulator-max-microvolt = <3700000>; @@ -434,86 +423,66 @@ /* LDO0 is not connected to anything */ - regulator@5 { - reg = <5>; - regulator-compatible = "ldo1"; + ldo1 { regulator-name = "vdd_ldo1,avdd_pll*"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; regulator-always-on; }; - regulator@6 { - reg = <6>; - regulator-compatible = "ldo2"; + ldo2 { regulator-name = "vdd_ldo2,vdd_rtc"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - regulator@7 { - reg = <7>; - regulator-compatible = "ldo3"; + ldo3 { regulator-name = "vdd_ldo3,avdd_usb*"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - regulator@8 { - reg = <8>; - regulator-compatible = "ldo4"; + ldo4 { regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - regulator@9 { - reg = <9>; - regulator-compatible = "ldo5"; + ldo5 { regulator-name = "vdd_ldo5,vcore_mmc"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - regulator@10 { - reg = <10>; - regulator-compatible = "ldo6"; + ldo6 { regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - regulator@11 { - reg = <11>; - regulator-compatible = "ldo7"; + ldo7 { regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - regulator@12 { - reg = <12>; - regulator-compatible = "ldo8"; + ldo8 { regulator-name = "vdd_ldo8,avdd_hdmi_pll"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - regulator@13 { - reg = <13>; - regulator-compatible = "ldo9"; + ldo9 { regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - regulator@14 { - reg = <14>; - regulator-compatible = "ldo_rtc"; + ldo_rtc { regulator-name = "vdd_rtc_out,vdd_cell"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -592,6 +561,12 @@ status = "okay"; }; + sdhci@c8000000 { + status = "okay"; + power-gpios = <&gpio 86 0>; /* gpio PK6 */ + bus-width = <4>; + }; + sdhci@c8000400 { status = "okay"; cd-gpios = <&gpio 69 0>; /* gpio PI5 */ diff --git a/trunk/arch/arm/boot/dts/tegra20-tamonten.dtsi b/trunk/arch/arm/boot/dts/tegra20-tamonten.dtsi index f18cec9f6a77..a239ccdfaa52 100644 --- a/trunk/arch/arm/boot/dts/tegra20-tamonten.dtsi +++ b/trunk/arch/arm/boot/dts/tegra20-tamonten.dtsi @@ -8,6 +8,16 @@ reg = <0x00000000 0x20000000>; }; + host1x { + hdmi { + vdd-supply = <&hdmi_vdd_reg>; + pll-supply = <&hdmi_pll_reg>; + + nvidia,ddc-i2c-bus = <&hdmi_ddc>; + nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ + }; + }; + pinmux { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -62,10 +72,6 @@ nvidia,pins = "dap4"; nvidia,function = "dap4"; }; - ddc { - nvidia,pins = "ddc"; - nvidia,function = "i2c2"; - }; dta { nvidia,pins = "dta", "dtd"; nvidia,function = "sdio2"; @@ -91,7 +97,7 @@ nvidia,function = "pcie"; }; hdint { - nvidia,pins = "hdint", "pta"; + nvidia,pins = "hdint"; nvidia,function = "hdmi"; }; i2cp { @@ -230,6 +236,39 @@ nvidia,pull = <1>; }; }; + + state_i2cmux_ddc: pinmux_i2cmux_ddc { + ddc { + nvidia,pins = "ddc"; + nvidia,function = "i2c2"; + }; + pta { + nvidia,pins = "pta"; + nvidia,function = "rsvd4"; + }; + }; + + state_i2cmux_pta: pinmux_i2cmux_pta { + ddc { + nvidia,pins = "ddc"; + nvidia,function = "rsvd4"; + }; + pta { + nvidia,pins = "pta"; + nvidia,function = "i2c2"; + }; + }; + + state_i2cmux_idle: pinmux_i2cmux_idle { + ddc { + nvidia,pins = "ddc"; + nvidia,function = "rsvd4"; + }; + pta { + nvidia,pins = "pta"; + nvidia,function = "rsvd4"; + }; + }; }; i2s@70002800 { @@ -246,6 +285,36 @@ status = "okay"; }; + i2c@7000c400 { + clock-frequency = <100000>; + status = "okay"; + }; + + i2cmux { + compatible = "i2c-mux-pinctrl"; + #address-cells = <1>; + #size-cells = <0>; + + i2c-parent = <&{/i2c@7000c400}>; + + pinctrl-names = "ddc", "pta", "idle"; + pinctrl-0 = <&state_i2cmux_ddc>; + pinctrl-1 = <&state_i2cmux_pta>; + pinctrl-2 = <&state_i2cmux_idle>; + + hdmi_ddc: i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + i2c@7000d000 { clock-frequency = <400000>; status = "okay"; @@ -271,97 +340,72 @@ vinldo9-supply = <&sm2_reg>; regulators { - #address-cells = <1>; - #size-cells = <0>; - - sys_reg: regulator@0 { - reg = <0>; - regulator-compatible = "sys"; + sys_reg: sys { regulator-name = "vdd_sys"; regulator-always-on; }; - regulator@1 { - reg = <1>; - regulator-compatible = "sm0"; + sm0 { regulator-name = "vdd_sys_sm0,vdd_core"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - regulator@2 { - reg = <2>; - regulator-compatible = "sm1"; + sm1 { regulator-name = "vdd_sys_sm1,vdd_cpu"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; }; - sm2_reg: regulator@3 { - reg = <3>; - regulator-compatible = "sm2"; + sm2_reg: sm2 { regulator-name = "vdd_sys_sm2,vin_ldo*"; regulator-min-microvolt = <3700000>; regulator-max-microvolt = <3700000>; regulator-always-on; }; - regulator@4 { - reg = <4>; - regulator-compatible = "ldo0"; + ldo0 { regulator-name = "vdd_ldo0,vddio_pex_clk"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - regulator@5 { - reg = <5>; - regulator-compatible = "ldo1"; + ldo1 { regulator-name = "vdd_ldo1,avdd_pll*"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; regulator-always-on; }; - regulator@6 { - reg = <6>; - regulator-compatible = "ldo2"; + ldo2 { regulator-name = "vdd_ldo2,vdd_rtc"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - regulator@7 { - reg = <7>; - regulator-compatible = "ldo3"; + ldo3 { regulator-name = "vdd_ldo3,avdd_usb*"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - regulator@8 { - reg = <8>; - regulator-compatible = "ldo4"; + ldo4 { regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - regulator@9 { - reg = <9>; - regulator-compatible = "ldo5"; + ldo5 { regulator-name = "vdd_ldo5,vcore_mmc"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; }; - regulator@10 { - reg = <10>; - regulator-compatible = "ldo6"; + ldo6 { regulator-name = "vdd_ldo6,avdd_vdac"; /* * According to the Tegra 2 Automotive @@ -373,25 +417,19 @@ regulator-max-microvolt = <2850000>; }; - regulator@11 { - reg = <11>; - regulator-compatible = "ldo7"; + hdmi_vdd_reg: ldo7 { regulator-name = "vdd_ldo7,avdd_hdmi"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - regulator@12 { - reg = <12>; - regulator-compatible = "ldo8"; + hdmi_pll_reg: ldo8 { regulator-name = "vdd_ldo8,avdd_hdmi_pll"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - regulator@13 { - reg = <13>; - regulator-compatible = "ldo9"; + ldo9 { regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam"; /* * According to the Tegra 2 Automotive @@ -404,9 +442,7 @@ regulator-always-on; }; - regulator@14 { - reg = <14>; - regulator-compatible = "ldo_rtc"; + ldo_rtc { regulator-name = "vdd_rtc_out"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -414,6 +450,11 @@ }; }; }; + + temperature-sensor@4c { + compatible = "onnn,nct1008"; + reg = <0x4c>; + }; }; pmc { diff --git a/trunk/arch/arm/boot/dts/tegra20-tec.dts b/trunk/arch/arm/boot/dts/tegra20-tec.dts index 9aff31b0fe4a..402b21004bef 100644 --- a/trunk/arch/arm/boot/dts/tegra20-tec.dts +++ b/trunk/arch/arm/boot/dts/tegra20-tec.dts @@ -6,10 +6,13 @@ model = "Avionic Design Tamonten Evaluation Carrier"; compatible = "ad,tec", "ad,tamonten", "nvidia,tegra20"; - i2c@7000c000 { - clock-frequency = <400000>; - status = "okay"; + host1x { + hdmi { + status = "okay"; + }; + }; + i2c@7000c000 { wm8903: wm8903@1a { compatible = "wlf,wm8903"; reg = <0x1a>; diff --git a/trunk/arch/arm/boot/dts/tegra20-trimslice.dts b/trunk/arch/arm/boot/dts/tegra20-trimslice.dts index 27fb8a67ea42..b70b4cb754c8 100644 --- a/trunk/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/trunk/arch/arm/boot/dts/tegra20-trimslice.dts @@ -10,6 +10,18 @@ reg = <0x00000000 0x40000000>; }; + host1x { + hdmi { + status = "okay"; + + vdd-supply = <&hdmi_vdd_reg>; + pll-supply = <&hdmi_pll_reg>; + + nvidia,ddc-i2c-bus = <&hdmi_ddc>; + nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ + }; + }; + pinmux { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -249,14 +261,24 @@ clock-frequency = <216000000>; }; - i2c@7000c000 { + dvi_ddc: i2c@7000c000 { status = "okay"; - clock-frequency = <400000>; + clock-frequency = <100000>; }; - i2c@7000c400 { + spi@7000c380 { status = "okay"; - clock-frequency = <400000>; + spi-max-frequency = <48000000>; + spi-flash@0 { + compatible = "winbond,w25q80bl"; + reg = <0>; + spi-max-frequency = <48000000>; + }; + }; + + hdmi_ddc: i2c@7000c400 { + status = "okay"; + clock-frequency = <100000>; }; i2c@7000c500 { @@ -300,6 +322,30 @@ bus-width = <4>; }; + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + hdmi_vdd_reg: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "avdd_hdmi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + hdmi_pll_reg: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "avdd_hdmi_pll"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + }; + sound { compatible = "nvidia,tegra-audio-trimslice"; nvidia,i2s-controller = <&tegra_i2s1>; diff --git a/trunk/arch/arm/boot/dts/tegra20-ventana.dts b/trunk/arch/arm/boot/dts/tegra20-ventana.dts index 3e5952fcfbc5..adc47547eaae 100644 --- a/trunk/arch/arm/boot/dts/tegra20-ventana.dts +++ b/trunk/arch/arm/boot/dts/tegra20-ventana.dts @@ -64,11 +64,6 @@ nvidia,pins = "dap4"; nvidia,function = "dap4"; }; - ddc { - nvidia,pins = "ddc", "owc", "spdi", "spdo", - "uac"; - nvidia,function = "rsvd2"; - }; dta { nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; nvidia,function = "vi"; @@ -98,7 +93,7 @@ nvidia,function = "pcie"; }; hdint { - nvidia,pins = "hdint", "pta"; + nvidia,pins = "hdint"; nvidia,function = "hdmi"; }; i2cp { @@ -129,6 +124,10 @@ "lspi", "lvp1", "lvs"; nvidia,function = "displaya"; }; + owc { + nvidia,pins = "owc", "spdi", "spdo", "uac"; + nvidia,function = "rsvd2"; + }; pmc { nvidia,pins = "pmc"; nvidia,function = "pwr_on"; @@ -237,6 +236,49 @@ "ld23_22"; nvidia,pull = <1>; }; + drive_sdio1 { + nvidia,pins = "drive_sdio1"; + nvidia,high-speed-mode = <0>; + nvidia,schmitt = <1>; + nvidia,low-power-mode = <3>; + nvidia,pull-down-strength = <31>; + nvidia,pull-up-strength = <31>; + nvidia,slew-rate-rising = <3>; + nvidia,slew-rate-falling = <3>; + }; + }; + + state_i2cmux_ddc: pinmux_i2cmux_ddc { + ddc { + nvidia,pins = "ddc"; + nvidia,function = "i2c2"; + }; + pta { + nvidia,pins = "pta"; + nvidia,function = "rsvd4"; + }; + }; + + state_i2cmux_pta: pinmux_i2cmux_pta { + ddc { + nvidia,pins = "ddc"; + nvidia,function = "rsvd4"; + }; + pta { + nvidia,pins = "pta"; + nvidia,function = "i2c2"; + }; + }; + + state_i2cmux_idle: pinmux_i2cmux_idle { + ddc { + nvidia,pins = "ddc"; + nvidia,function = "rsvd4"; + }; + pta { + nvidia,pins = "pta"; + nvidia,function = "rsvd4"; + }; }; }; @@ -281,6 +323,31 @@ clock-frequency = <400000>; }; + i2cmux { + compatible = "i2c-mux-pinctrl"; + #address-cells = <1>; + #size-cells = <0>; + + i2c-parent = <&{/i2c@7000c400}>; + + pinctrl-names = "ddc", "pta", "idle"; + pinctrl-0 = <&state_i2cmux_ddc>; + pinctrl-1 = <&state_i2cmux_pta>; + pinctrl-2 = <&state_i2cmux_idle>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + i2c@7000c500 { status = "okay"; clock-frequency = <400000>; @@ -311,37 +378,26 @@ vinldo9-supply = <&sm2_reg>; regulators { - #address-cells = <1>; - #size-cells = <0>; - - sys_reg: regulator@0 { - reg = <0>; - regulator-compatible = "sys"; + sys_reg: sys { regulator-name = "vdd_sys"; regulator-always-on; }; - regulator@1 { - reg = <1>; - regulator-compatible = "sm0"; + sm0 { regulator-name = "vdd_sm0,vdd_core"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - regulator@2 { - reg = <2>; - regulator-compatible = "sm1"; + sm1 { regulator-name = "vdd_sm1,vdd_cpu"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; }; - sm2_reg: regulator@3 { - reg = <3>; - regulator-compatible = "sm2"; + sm2_reg: sm2 { regulator-name = "vdd_sm2,vin_ldo*"; regulator-min-microvolt = <3700000>; regulator-max-microvolt = <3700000>; @@ -350,86 +406,66 @@ /* LDO0 is not connected to anything */ - regulator@5 { - reg = <5>; - regulator-compatible = "ldo1"; + ldo1 { regulator-name = "vdd_ldo1,avdd_pll*"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; regulator-always-on; }; - regulator@6 { - reg = <6>; - regulator-compatible = "ldo2"; + ldo2 { regulator-name = "vdd_ldo2,vdd_rtc"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - regulator@7 { - reg = <7>; - regulator-compatible = "ldo3"; + ldo3 { regulator-name = "vdd_ldo3,avdd_usb*"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - regulator@8 { - reg = <8>; - regulator-compatible = "ldo4"; + ldo4 { regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - regulator@9 { - reg = <9>; - regulator-compatible = "ldo5"; + ldo5 { regulator-name = "vdd_ldo5,vcore_mmc"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - regulator@10 { - reg = <10>; - regulator-compatible = "ldo6"; + ldo6 { regulator-name = "vdd_ldo6,avdd_vdac"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - regulator@11 { - reg = <11>; - regulator-compatible = "ldo7"; + ldo7 { regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - regulator@12 { - reg = <12>; - regulator-compatible = "ldo8"; + ldo8 { regulator-name = "vdd_ldo8,avdd_hdmi_pll"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - regulator@13 { - reg = <13>; - regulator-compatible = "ldo9"; + ldo9 { regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; }; - regulator@14 { - reg = <14>; - regulator-compatible = "ldo_rtc"; + ldo_rtc { regulator-name = "vdd_rtc_out,vdd_cell"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -437,6 +473,11 @@ }; }; }; + + temperature-sensor@4c { + compatible = "onnn,nct1008"; + reg = <0x4c>; + }; }; pmc { @@ -456,6 +497,12 @@ status = "okay"; }; + sdhci@c8000000 { + status = "okay"; + power-gpios = <&gpio 86 0>; /* gpio PK6 */ + bus-width = <4>; + }; + sdhci@c8000400 { status = "okay"; cd-gpios = <&gpio 69 0>; /* gpio PI5 */ diff --git a/trunk/arch/arm/boot/dts/tegra20-whistler.dts b/trunk/arch/arm/boot/dts/tegra20-whistler.dts index c636d002d6d8..20d576ecd555 100644 --- a/trunk/arch/arm/boot/dts/tegra20-whistler.dts +++ b/trunk/arch/arm/boot/dts/tegra20-whistler.dts @@ -10,6 +10,18 @@ reg = <0x00000000 0x20000000>; }; + host1x { + hdmi { + status = "okay"; + + vdd-supply = <&hdmi_vdd_reg>; + pll-supply = <&hdmi_pll_reg>; + + nvidia,ddc-i2c-bus = <&hdmi_ddc>; + nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ + }; + }; + pinmux { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -246,6 +258,11 @@ clock-frequency = <216000000>; }; + hdmi_ddc: i2c@7000c400 { + status = "okay"; + clock-frequency = <100000>; + }; + i2c@7000d000 { status = "okay"; clock-frequency = <100000>; @@ -295,243 +312,182 @@ in20-supply = <&mbatt_reg>; regulators { - #address-cells = <1>; - #size-cells = <0>; - - mbatt_reg: regulator@0 { - reg = <0>; - regulator-compatible = "mbatt"; + mbatt_reg: mbatt { regulator-name = "vbat_pmu"; regulator-always-on; }; - regulator@1 { - reg = <1>; - regulator-compatible = "sd1"; + sd1 { regulator-name = "nvvdd_sv1,vdd_cpu_pmu"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; }; - regulator@2 { - reg = <2>; - regulator-compatible = "sd2"; + sd2 { regulator-name = "nvvdd_sv2,vdd_core"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - nvvdd_sv3_reg: regulator@3 { - reg = <3>; - regulator-compatible = "sd3"; + nvvdd_sv3_reg: sd3 { regulator-name = "nvvdd_sv3"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - regulator@4 { - reg = <4>; - regulator-compatible = "ldo1"; + ldo1 { regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - regulator@5 { - reg = <5>; - regulator-compatible = "ldo2"; + ldo2 { regulator-name = "nvvdd_ldo2,avdd_pll*"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; regulator-always-on; }; - regulator@6 { - reg = <6>; - regulator-compatible = "ldo3"; + ldo3 { regulator-name = "nvvdd_ldo3,vcom_1v8b"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - regulator@7 { - reg = <7>; - regulator-compatible = "ldo4"; + ldo4 { regulator-name = "nvvdd_ldo4,avdd_usb*"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - regulator@8 { - reg = <8>; - regulator-compatible = "ldo5"; + ldo5 { regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-always-on; }; - regulator@9 { - reg = <9>; - regulator-compatible = "ldo6"; + hdmi_pll_reg: ldo6 { regulator-name = "nvvdd_ldo6,avdd_hdmi_pll"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - regulator@10 { - reg = <10>; - regulator-compatible = "ldo7"; + ldo7 { regulator-name = "nvvdd_ldo7,avddio_audio"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-always-on; }; - regulator@11 { - reg = <11>; - regulator-compatible = "ldo8"; + ldo8 { regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; }; - regulator@12 { - reg = <12>; - regulator-compatible = "ldo9"; + ldo9 { regulator-name = "nvvdd_ldo9,avdd_cam*"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; }; - regulator@13 { - reg = <13>; - regulator-compatible = "ldo10"; + ldo10 { regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; regulator-always-on; }; - regulator@14 { - reg = <14>; - regulator-compatible = "ldo11"; + hdmi_vdd_reg: ldo11 { regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - regulator@15 { - reg = <15>; - regulator-compatible = "ldo12"; + ldo12 { regulator-name = "nvvdd_ldo12,vddio_sdio"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-always-on; }; - regulator@16 { - reg = <16>; - regulator-compatible = "ldo13"; + ldo13 { regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; }; - regulator@17 { - reg = <17>; - regulator-compatible = "ldo14"; + ldo14 { regulator-name = "nvvdd_ldo14,avdd_vdac"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; }; - regulator@18 { - reg = <18>; - regulator-compatible = "ldo15"; + ldo15 { regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - regulator@19 { - reg = <19>; - regulator-compatible = "ldo16"; + ldo16 { regulator-name = "nvvdd_ldo16,vdd_dbrtr"; regulator-min-microvolt = <1300000>; regulator-max-microvolt = <1300000>; }; - regulator@20 { - reg = <20>; - regulator-compatible = "ldo17"; + ldo17 { regulator-name = "nvvdd_ldo17,vddio_mipi"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - regulator@21 { - reg = <21>; - regulator-compatible = "ldo18"; + ldo18 { regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - regulator@22 { - reg = <22>; - regulator-compatible = "ldo19"; + ldo19 { regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; }; - regulator@23 { - reg = <23>; - regulator-compatible = "ldo20"; + ldo20 { regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - regulator@24 { - reg = <24>; - regulator-compatible = "out5v"; + out5v { regulator-name = "usb0_vbus_reg"; }; - regulator@25 { - reg = <25>; - regulator-compatible = "out33v"; + out33v { regulator-name = "pmu_out3v3"; }; - regulator@26 { - reg = <26>; - regulator-compatible = "bbat"; + bbat { regulator-name = "pmu_bbat"; regulator-min-microvolt = <2400000>; regulator-max-microvolt = <2400000>; regulator-always-on; }; - regulator@27 { - reg = <27>; - regulator-compatible = "sdby"; + sdby { regulator-name = "vdd_aon"; regulator-always-on; }; - regulator@28 { - reg = <28>; - regulator-compatible = "vrtc"; + vrtc { regulator-name = "vrtc,pmu_vccadc"; regulator-always-on; }; diff --git a/trunk/arch/arm/boot/dts/tegra20.dtsi b/trunk/arch/arm/boot/dts/tegra20.dtsi index f3a09d0d45bc..fba998e3954a 100644 --- a/trunk/arch/arm/boot/dts/tegra20.dtsi +++ b/trunk/arch/arm/boot/dts/tegra20.dtsi @@ -4,6 +4,102 @@ compatible = "nvidia,tegra20"; interrupt-parent = <&intc>; + host1x { + compatible = "nvidia,tegra20-host1x", "simple-bus"; + reg = <0x50000000 0x00024000>; + interrupts = <0 65 0x04 /* mpcore syncpt */ + 0 67 0x04>; /* mpcore general */ + + #address-cells = <1>; + #size-cells = <1>; + + ranges = <0x54000000 0x54000000 0x04000000>; + + mpe { + compatible = "nvidia,tegra20-mpe"; + reg = <0x54040000 0x00040000>; + interrupts = <0 68 0x04>; + }; + + vi { + compatible = "nvidia,tegra20-vi"; + reg = <0x54080000 0x00040000>; + interrupts = <0 69 0x04>; + }; + + epp { + compatible = "nvidia,tegra20-epp"; + reg = <0x540c0000 0x00040000>; + interrupts = <0 70 0x04>; + }; + + isp { + compatible = "nvidia,tegra20-isp"; + reg = <0x54100000 0x00040000>; + interrupts = <0 71 0x04>; + }; + + gr2d { + compatible = "nvidia,tegra20-gr2d"; + reg = <0x54140000 0x00040000>; + interrupts = <0 72 0x04>; + }; + + gr3d { + compatible = "nvidia,tegra20-gr3d"; + reg = <0x54180000 0x00040000>; + }; + + dc@54200000 { + compatible = "nvidia,tegra20-dc"; + reg = <0x54200000 0x00040000>; + interrupts = <0 73 0x04>; + + rgb { + status = "disabled"; + }; + }; + + dc@54240000 { + compatible = "nvidia,tegra20-dc"; + reg = <0x54240000 0x00040000>; + interrupts = <0 74 0x04>; + + rgb { + status = "disabled"; + }; + }; + + hdmi { + compatible = "nvidia,tegra20-hdmi"; + reg = <0x54280000 0x00040000>; + interrupts = <0 75 0x04>; + status = "disabled"; + }; + + tvo { + compatible = "nvidia,tegra20-tvo"; + reg = <0x542c0000 0x00040000>; + interrupts = <0 76 0x04>; + status = "disabled"; + }; + + dsi { + compatible = "nvidia,tegra20-dsi"; + reg = <0x54300000 0x00040000>; + status = "disabled"; + }; + }; + + cache-controller@50043000 { + compatible = "arm,pl310-cache"; + reg = <0x50043000 0x1000>; + arm,data-latency = <5 5 2>; + arm,tag-latency = <4 4 2>; + cache-unified; + cache-level = <2>; + }; + intc: interrupt-controller { compatible = "arm,cortex-a9-gic"; reg = <0x50041000 0x1000 @@ -138,6 +234,16 @@ status = "disabled"; }; + spi@7000c380 { + compatible = "nvidia,tegra20-sflash"; + reg = <0x7000c380 0x80>; + interrupts = <0 39 0x04>; + nvidia,dma-request-selector = <&apbdma 11>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + i2c@7000c400 { compatible = "nvidia,tegra20-i2c"; reg = <0x7000c400 0x100>; @@ -165,6 +271,46 @@ status = "disabled"; }; + spi@7000d400 { + compatible = "nvidia,tegra20-slink"; + reg = <0x7000d400 0x200>; + interrupts = <0 59 0x04>; + nvidia,dma-request-selector = <&apbdma 15>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi@7000d600 { + compatible = "nvidia,tegra20-slink"; + reg = <0x7000d600 0x200>; + interrupts = <0 82 0x04>; + nvidia,dma-request-selector = <&apbdma 16>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi@7000d800 { + compatible = "nvidia,tegra20-slink"; + reg = <0x7000d480 0x200>; + interrupts = <0 83 0x04>; + nvidia,dma-request-selector = <&apbdma 17>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi@7000da00 { + compatible = "nvidia,tegra20-slink"; + reg = <0x7000da00 0x200>; + interrupts = <0 93 0x04>; + nvidia,dma-request-selector = <&apbdma 18>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + pmc { compatible = "nvidia,tegra20-pmc"; reg = <0x7000e400 0x400>; diff --git a/trunk/arch/arm/boot/dts/tegra30-cardhu-a02.dts b/trunk/arch/arm/boot/dts/tegra30-cardhu-a02.dts index dd4222f00eca..adc88aa50eb6 100644 --- a/trunk/arch/arm/boot/dts/tegra30-cardhu-a02.dts +++ b/trunk/arch/arm/boot/dts/tegra30-cardhu-a02.dts @@ -83,5 +83,11 @@ gpio = <&gpio 83 0>; /* GPIO PK3 */ }; }; + + sdhci@78000400 { + status = "okay"; + power-gpios = <&gpio 28 0>; /* gpio PD4 */ + bus-width = <4>; + }; }; diff --git a/trunk/arch/arm/boot/dts/tegra30-cardhu-a04.dts b/trunk/arch/arm/boot/dts/tegra30-cardhu-a04.dts index 0828f097ca86..08163e145d57 100644 --- a/trunk/arch/arm/boot/dts/tegra30-cardhu-a04.dts +++ b/trunk/arch/arm/boot/dts/tegra30-cardhu-a04.dts @@ -95,4 +95,10 @@ gpio = <&gpio 232 0>; /* GPIO PDD0 */ }; }; + + sdhci@78000400 { + status = "okay"; + power-gpios = <&gpio 27 0>; /* gpio PD3 */ + bus-width = <4>; + }; }; diff --git a/trunk/arch/arm/boot/dts/tegra30-cardhu.dtsi b/trunk/arch/arm/boot/dts/tegra30-cardhu.dtsi index d10c9c5a3606..bdb2a660f376 100644 --- a/trunk/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/trunk/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -52,6 +52,22 @@ nvidia,pull = <2>; nvidia,tristate = <0>; }; + sdmmc3_clk_pa6 { + nvidia,pins = "sdmmc3_clk_pa6"; + nvidia,function = "sdmmc3"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + sdmmc3_cmd_pa7 { + nvidia,pins = "sdmmc3_cmd_pa7", + "sdmmc3_dat0_pb7", + "sdmmc3_dat1_pb6", + "sdmmc3_dat2_pb5", + "sdmmc3_dat3_pb4"; + nvidia,function = "sdmmc3"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + }; sdmmc4_clk_pcc4 { nvidia,pins = "sdmmc4_clk_pcc4", "sdmmc4_rst_n_pcc3"; @@ -81,6 +97,15 @@ nvidia,pull = <0>; nvidia,tristate = <0>; }; + sdio3 { + nvidia,pins = "drive_sdio3"; + nvidia,high-speed-mode = <0>; + nvidia,schmitt = <0>; + nvidia,pull-down-strength = <46>; + nvidia,pull-up-strength = <42>; + nvidia,slew-rate-rising = <1>; + nvidia,slew-rate-falling = <1>; + }; }; }; @@ -171,56 +196,41 @@ vccio-supply = <&vdd_ac_bat_reg>; regulators { - #address-cells = <1>; - #size-cells = <0>; - - vdd1_reg: regulator@0 { - reg = <0>; - regulator-compatible = "vdd1"; + vdd1_reg: vdd1 { regulator-name = "vddio_ddr_1v2"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - vdd2_reg: regulator@1 { - reg = <1>; - regulator-compatible = "vdd2"; + vdd2_reg: vdd2 { regulator-name = "vdd_1v5_gen"; regulator-min-microvolt = <1500000>; regulator-max-microvolt = <1500000>; regulator-always-on; }; - vddctrl_reg: regulator@2 { - reg = <2>; - regulator-compatible = "vddctrl"; + vddctrl_reg: vddctrl { regulator-name = "vdd_cpu,vdd_sys"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; }; - vio_reg: regulator@3 { - reg = <3>; - regulator-compatible = "vio"; + vio_reg: vio { regulator-name = "vdd_1v8_gen"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; - ldo1_reg: regulator@4 { - reg = <4>; - regulator-compatible = "ldo1"; + ldo1_reg: ldo1 { regulator-name = "vdd_pexa,vdd_pexb"; regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1050000>; }; - ldo2_reg: regulator@5 { - reg = <5>; - regulator-compatible = "ldo2"; + ldo2_reg: ldo2 { regulator-name = "vdd_sata,avdd_plle"; regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1050000>; @@ -228,44 +238,34 @@ /* LDO3 is not connected to anything */ - ldo4_reg: regulator@7 { - reg = <7>; - regulator-compatible = "ldo4"; + ldo4_reg: ldo4 { regulator-name = "vdd_rtc"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - ldo5_reg: regulator@8 { - reg = <8>; - regulator-compatible = "ldo5"; + ldo5_reg: ldo5 { regulator-name = "vddio_sdmmc,avdd_vdac"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - ldo6_reg: regulator@9 { - reg = <9>; - regulator-compatible = "ldo6"; + ldo6_reg: ldo6 { regulator-name = "avdd_dsi_csi,pwrdet_mipi"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - ldo7_reg: regulator@10 { - reg = <10>; - regulator-compatible = "ldo7"; + ldo7_reg: ldo7 { regulator-name = "vdd_pllm,x,u,a_p_c_s"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; - ldo8_reg: regulator@11 { - reg = <11>; - regulator-compatible = "ldo8"; + ldo8_reg: ldo8 { regulator-name = "vdd_ddr_hs"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; @@ -275,6 +275,16 @@ }; }; + spi@7000da00 { + status = "okay"; + spi-max-frequency = <25000000>; + spi-flash@1 { + compatible = "winbond,w25q32"; + reg = <1>; + spi-max-frequency = <20000000>; + }; + }; + ahub { i2s@70080400 { status = "okay"; @@ -409,6 +419,8 @@ regulator-name = "vdd_com"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; enable-active-high; gpio = <&gpio 24 0>; /* gpio PD0 */ vin-supply = <&sys_3v3_reg>; diff --git a/trunk/arch/arm/boot/dts/tegra30.dtsi b/trunk/arch/arm/boot/dts/tegra30.dtsi index df7f2270fc91..efa603d47a6a 100644 --- a/trunk/arch/arm/boot/dts/tegra30.dtsi +++ b/trunk/arch/arm/boot/dts/tegra30.dtsi @@ -4,6 +4,102 @@ compatible = "nvidia,tegra30"; interrupt-parent = <&intc>; + host1x { + compatible = "nvidia,tegra30-host1x", "simple-bus"; + reg = <0x50000000 0x00024000>; + interrupts = <0 65 0x04 /* mpcore syncpt */ + 0 67 0x04>; /* mpcore general */ + + #address-cells = <1>; + #size-cells = <1>; + + ranges = <0x54000000 0x54000000 0x04000000>; + + mpe { + compatible = "nvidia,tegra30-mpe"; + reg = <0x54040000 0x00040000>; + interrupts = <0 68 0x04>; + }; + + vi { + compatible = "nvidia,tegra30-vi"; + reg = <0x54080000 0x00040000>; + interrupts = <0 69 0x04>; + }; + + epp { + compatible = "nvidia,tegra30-epp"; + reg = <0x540c0000 0x00040000>; + interrupts = <0 70 0x04>; + }; + + isp { + compatible = "nvidia,tegra30-isp"; + reg = <0x54100000 0x00040000>; + interrupts = <0 71 0x04>; + }; + + gr2d { + compatible = "nvidia,tegra30-gr2d"; + reg = <0x54140000 0x00040000>; + interrupts = <0 72 0x04>; + }; + + gr3d { + compatible = "nvidia,tegra30-gr3d"; + reg = <0x54180000 0x00040000>; + }; + + dc@54200000 { + compatible = "nvidia,tegra30-dc"; + reg = <0x54200000 0x00040000>; + interrupts = <0 73 0x04>; + + rgb { + status = "disabled"; + }; + }; + + dc@54240000 { + compatible = "nvidia,tegra30-dc"; + reg = <0x54240000 0x00040000>; + interrupts = <0 74 0x04>; + + rgb { + status = "disabled"; + }; + }; + + hdmi { + compatible = "nvidia,tegra30-hdmi"; + reg = <0x54280000 0x00040000>; + interrupts = <0 75 0x04>; + status = "disabled"; + }; + + tvo { + compatible = "nvidia,tegra30-tvo"; + reg = <0x542c0000 0x00040000>; + interrupts = <0 76 0x04>; + status = "disabled"; + }; + + dsi { + compatible = "nvidia,tegra30-dsi"; + reg = <0x54300000 0x00040000>; + status = "disabled"; + }; + }; + + cache-controller@50043000 { + compatible = "arm,pl310-cache"; + reg = <0x50043000 0x1000>; + arm,data-latency = <6 6 2>; + arm,tag-latency = <5 5 2>; + cache-unified; + cache-level = <2>; + }; + intc: interrupt-controller { compatible = "arm,cortex-a9-gic"; reg = <0x50041000 0x1000 @@ -168,6 +264,66 @@ status = "disabled"; }; + spi@7000d400 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000d400 0x200>; + interrupts = <0 59 0x04>; + nvidia,dma-request-selector = <&apbdma 15>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi@7000d600 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000d600 0x200>; + interrupts = <0 82 0x04>; + nvidia,dma-request-selector = <&apbdma 16>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi@7000d800 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000d480 0x200>; + interrupts = <0 83 0x04>; + nvidia,dma-request-selector = <&apbdma 17>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi@7000da00 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000da00 0x200>; + interrupts = <0 93 0x04>; + nvidia,dma-request-selector = <&apbdma 18>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi@7000dc00 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000dc00 0x200>; + interrupts = <0 94 0x04>; + nvidia,dma-request-selector = <&apbdma 27>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi@7000de00 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000de00 0x200>; + interrupts = <0 79 0x04>; + nvidia,dma-request-selector = <&apbdma 28>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + pmc { compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc"; reg = <0x7000e400 0x400>; diff --git a/trunk/arch/arm/boot/dts/twl4030.dtsi b/trunk/arch/arm/boot/dts/twl4030.dtsi index ff000172c93c..63411b036932 100644 --- a/trunk/arch/arm/boot/dts/twl4030.dtsi +++ b/trunk/arch/arm/boot/dts/twl4030.dtsi @@ -37,6 +37,24 @@ regulator-max-microvolt = <3150000>; }; + vusb1v5: regulator-vusb1v5 { + compatible = "ti,twl4030-vusb1v5"; + }; + + vusb1v8: regulator-vusb1v8 { + compatible = "ti,twl4030-vusb1v8"; + }; + + vusb3v1: regulator-vusb3v1 { + compatible = "ti,twl4030-vusb3v1"; + }; + + vsim: regulator-vsim { + compatible = "ti,twl4030-vsim"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + }; + twl_gpio: gpio { compatible = "ti,twl4030-gpio"; gpio-controller; @@ -44,4 +62,13 @@ interrupt-controller; #interrupt-cells = <1>; }; + + twl4030-usb { + compatible = "ti,twl4030-usb"; + interrupts = <10>, <4>; + usb1v5-supply = <&vusb1v5>; + usb1v8-supply = <&vusb1v8>; + usb3v1-supply = <&vusb3v1>; + usb_mode = <1>; + }; }; diff --git a/trunk/arch/arm/boot/dts/twl6030.dtsi b/trunk/arch/arm/boot/dts/twl6030.dtsi index 123e2c40218a..9996cfc5ee80 100644 --- a/trunk/arch/arm/boot/dts/twl6030.dtsi +++ b/trunk/arch/arm/boot/dts/twl6030.dtsi @@ -86,4 +86,9 @@ clk32kg: regulator-clk32kg { compatible = "ti,twl6030-clk32kg"; }; + + twl_usb_comparator: usb-comparator { + compatible = "ti,twl6030-usb"; + interrupts = <4>, <10>; + }; }; diff --git a/trunk/arch/arm/boot/dts/u9540.dts b/trunk/arch/arm/boot/dts/u9540.dts new file mode 100644 index 000000000000..95892ec6c342 --- /dev/null +++ b/trunk/arch/arm/boot/dts/u9540.dts @@ -0,0 +1,72 @@ +/* + * Copyright 2012 ST-Ericsson AB + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "dbx5x0.dtsi" + +/ { + model = "ST-Ericsson U9540 platform with Device Tree"; + compatible = "st-ericsson,u9540"; + + memory { + reg = <0x00000000 0x20000000>; + }; + + soc-u9500 { + uart@80120000 { + status = "okay"; + }; + + uart@80121000 { + status = "okay"; + }; + + uart@80007000 { + status = "okay"; + }; + + // External Micro SD slot + sdi0_per1@80126000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <100000000>; + bus-width = <4>; + mmc-cap-sd-highspeed; + mmc-cap-mmc-highspeed; + vmmc-supply = <&ab8500_ldo_aux3_reg>; + + cd-gpios = <&gpio7 6 0x4>; // 230 + cd-inverted; + + status = "okay"; + }; + + + // WLAN SDIO channel + sdi1_per2@80118000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <50000000>; + bus-width = <4>; + + status = "okay"; + }; + + // On-board eMMC + sdi4_per2@80114000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <100000000>; + bus-width = <8>; + mmc-cap-mmc-highspeed; + vmmc-supply = <&ab8500_ldo_aux2_reg>; + + status = "okay"; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/zynq-7000.dtsi b/trunk/arch/arm/boot/dts/zynq-7000.dtsi new file mode 100644 index 000000000000..401c1262d4ed --- /dev/null +++ b/trunk/arch/arm/boot/dts/zynq-7000.dtsi @@ -0,0 +1,166 @@ +/* + * Copyright (C) 2011 Xilinx + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +/include/ "skeleton.dtsi" + +/ { + compatible = "xlnx,zynq-7000"; + + amba { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + ranges; + + intc: interrupt-controller@f8f01000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <1>; + interrupt-controller; + reg = <0xF8F01000 0x1000>, + <0xF8F00100 0x100>; + }; + + L2: cache-controller { + compatible = "arm,pl310-cache"; + reg = <0xF8F02000 0x1000>; + arm,data-latency = <2 3 2>; + arm,tag-latency = <2 3 2>; + cache-unified; + cache-level = <2>; + }; + + uart0: uart@e0000000 { + compatible = "xlnx,xuartps"; + reg = <0xE0000000 0x1000>; + interrupts = <0 27 4>; + clock = <50000000>; + }; + + uart1: uart@e0001000 { + compatible = "xlnx,xuartps"; + reg = <0xE0001000 0x1000>; + interrupts = <0 50 4>; + clock = <50000000>; + }; + + slcr: slcr@f8000000 { + compatible = "xlnx,zynq-slcr"; + reg = <0xF8000000 0x1000>; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + ps_clk: ps_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + /* clock-frequency set in board-specific file */ + clock-output-names = "ps_clk"; + }; + armpll: armpll { + #clock-cells = <0>; + compatible = "xlnx,zynq-pll"; + clocks = <&ps_clk>; + reg = <0x100 0x110>; + clock-output-names = "armpll"; + }; + ddrpll: ddrpll { + #clock-cells = <0>; + compatible = "xlnx,zynq-pll"; + clocks = <&ps_clk>; + reg = <0x104 0x114>; + clock-output-names = "ddrpll"; + }; + iopll: iopll { + #clock-cells = <0>; + compatible = "xlnx,zynq-pll"; + clocks = <&ps_clk>; + reg = <0x108 0x118>; + clock-output-names = "iopll"; + }; + uart_clk: uart_clk { + #clock-cells = <1>; + compatible = "xlnx,zynq-periph-clock"; + clocks = <&iopll &armpll &ddrpll>; + reg = <0x154>; + clock-output-names = "uart0_ref_clk", + "uart1_ref_clk"; + }; + cpu_clk: cpu_clk { + #clock-cells = <1>; + compatible = "xlnx,zynq-cpu-clock"; + clocks = <&iopll &armpll &ddrpll>; + reg = <0x120 0x1C4>; + clock-output-names = "cpu_6x4x", + "cpu_3x2x", + "cpu_2x", + "cpu_1x"; + }; + }; + }; + + ttc0: ttc0@f8001000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "xlnx,ttc"; + reg = <0xF8001000 0x1000>; + clocks = <&cpu_clk 3>; + clock-names = "cpu_1x"; + clock-ranges; + + ttc0_0: ttc0.0 { + status = "disabled"; + reg = <0>; + interrupts = <0 10 4>; + }; + ttc0_1: ttc0.1 { + status = "disabled"; + reg = <1>; + interrupts = <0 11 4>; + }; + ttc0_2: ttc0.2 { + status = "disabled"; + reg = <2>; + interrupts = <0 12 4>; + }; + }; + + ttc1: ttc1@f8002000 { + #interrupt-parent = <&intc>; + #address-cells = <1>; + #size-cells = <0>; + compatible = "xlnx,ttc"; + reg = <0xF8002000 0x1000>; + clocks = <&cpu_clk 3>; + clock-names = "cpu_1x"; + clock-ranges; + + ttc1_0: ttc1.0 { + status = "disabled"; + reg = <0>; + interrupts = <0 37 4>; + }; + ttc1_1: ttc1.1 { + status = "disabled"; + reg = <1>; + interrupts = <0 38 4>; + }; + ttc1_2: ttc1.2 { + status = "disabled"; + reg = <2>; + interrupts = <0 39 4>; + }; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/zynq-ep107.dts b/trunk/arch/arm/boot/dts/zynq-ep107.dts deleted file mode 100644 index 37ca192fb193..000000000000 --- a/trunk/arch/arm/boot/dts/zynq-ep107.dts +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Copyright (C) 2011 Xilinx - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/dts-v1/; -/ { - model = "Xilinx Zynq EP107"; - compatible = "xlnx,zynq-ep107"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&intc>; - - memory { - device_type = "memory"; - reg = <0x0 0x10000000>; - }; - - chosen { - bootargs = "console=ttyPS0,9600 root=/dev/ram rw initrd=0x800000,8M earlyprintk"; - linux,stdout-path = &uart0; - }; - - amba { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - intc: interrupt-controller@f8f01000 { - interrupt-controller; - compatible = "arm,gic"; - reg = <0xF8F01000 0x1000>; - #interrupt-cells = <2>; - }; - - uart0: uart@e0000000 { - compatible = "xlnx,xuartps"; - reg = <0xE0000000 0x1000>; - interrupts = <59 0>; - clock = <50000000>; - }; - }; -}; diff --git a/trunk/arch/arm/boot/dts/zynq-zc702.dts b/trunk/arch/arm/boot/dts/zynq-zc702.dts new file mode 100644 index 000000000000..c772942a399a --- /dev/null +++ b/trunk/arch/arm/boot/dts/zynq-zc702.dts @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2011 Xilinx + * Copyright (C) 2012 National Instruments Corp. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +/dts-v1/; +/include/ "zynq-7000.dtsi" + +/ { + model = "Zynq ZC702 Development Board"; + compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; + + memory { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + chosen { + bootargs = "console=ttyPS1,115200 earlyprintk"; + }; + +}; + +&ps_clk { + clock-frequency = <33333330>; +}; + +&ttc0_0 { + status = "ok"; + compatible = "xlnx,ttc-counter-clocksource"; +}; + +&ttc0_1 { + status = "ok"; + compatible = "xlnx,ttc-counter-clockevent"; +}; diff --git a/trunk/arch/arm/configs/imx_v4_v5_defconfig b/trunk/arch/arm/configs/imx_v4_v5_defconfig index 78ed575feb1a..f71302c3ac33 100644 --- a/trunk/arch/arm/configs/imx_v4_v5_defconfig +++ b/trunk/arch/arm/configs/imx_v4_v5_defconfig @@ -18,7 +18,9 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_CFQ is not set CONFIG_ARCH_MXC=y -CONFIG_ARCH_IMX_V4_V5=y +CONFIG_ARCH_MULTI_V4T=y +CONFIG_ARCH_MULTI_V5=y +# CONFIG_ARCH_MULTI_V7 is not set CONFIG_ARCH_MX1ADS=y CONFIG_MACH_SCB9328=y CONFIG_MACH_APF9328=y diff --git a/trunk/arch/arm/configs/imx_v6_v7_defconfig b/trunk/arch/arm/configs/imx_v6_v7_defconfig index 394ded624e37..44f117aab52c 100644 --- a/trunk/arch/arm/configs/imx_v6_v7_defconfig +++ b/trunk/arch/arm/configs/imx_v6_v7_defconfig @@ -17,6 +17,8 @@ CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set CONFIG_ARCH_MXC=y +CONFIG_ARCH_MULTI_V6=y +CONFIG_ARCH_MULTI_V7=y CONFIG_MACH_MX31LILLY=y CONFIG_MACH_MX31LITE=y CONFIG_MACH_PCM037=y diff --git a/trunk/arch/arm/configs/mxs_defconfig b/trunk/arch/arm/configs/mxs_defconfig index 048aaca60814..7bf535104e26 100644 --- a/trunk/arch/arm/configs/mxs_defconfig +++ b/trunk/arch/arm/configs/mxs_defconfig @@ -61,6 +61,8 @@ CONFIG_MTD_NAND_GPMI_NAND=y CONFIG_NETDEVICES=y CONFIG_NET_ETHERNET=y CONFIG_ENC28J60=y +CONFIG_USB_USBNET=y +CONFIG_USB_NET_SMSC95XX=y # CONFIG_NETDEV_1000 is not set # CONFIG_NETDEV_10000 is not set # CONFIG_WLAN is not set @@ -158,6 +160,10 @@ CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=y CONFIG_ROOT_NFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_850=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_15=y CONFIG_PRINTK_TIME=y CONFIG_FRAME_WARN=2048 CONFIG_MAGIC_SYSRQ=y diff --git a/trunk/arch/arm/configs/u8500_defconfig b/trunk/arch/arm/configs/u8500_defconfig index da6845493caa..6fe7ede6f0c2 100644 --- a/trunk/arch/arm/configs/u8500_defconfig +++ b/trunk/arch/arm/configs/u8500_defconfig @@ -76,6 +76,7 @@ CONFIG_AB8500_CORE=y CONFIG_REGULATOR=y CONFIG_REGULATOR_AB8500=y CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y # CONFIG_HID_SUPPORT is not set CONFIG_USB_GADGET=y CONFIG_AB8500_USB=y diff --git a/trunk/arch/arm/include/debug/imx.S b/trunk/arch/arm/include/debug/imx.S new file mode 100644 index 000000000000..0c4e17d4d359 --- /dev/null +++ b/trunk/arch/arm/include/debug/imx.S @@ -0,0 +1,74 @@ +/* arch/arm/mach-imx/include/mach/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#define IMX6Q_UART1_BASE_ADDR 0x02020000 +#define IMX6Q_UART2_BASE_ADDR 0x021e8000 +#define IMX6Q_UART3_BASE_ADDR 0x021ec000 +#define IMX6Q_UART4_BASE_ADDR 0x021f0000 +#define IMX6Q_UART5_BASE_ADDR 0x021f4000 + +/* + * IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion + * of IMX6Q_UART##n##_BASE_ADDR. + */ +#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR +#define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n) +#define IMX6Q_DEBUG_UART_BASE IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT) + +#ifdef CONFIG_DEBUG_IMX1_UART +#define UART_PADDR 0x00206000 +#elif defined (CONFIG_DEBUG_IMX25_UART) +#define UART_PADDR 0x43f90000 +#elif defined (CONFIG_DEBUG_IMX21_IMX27_UART) +#define UART_PADDR 0x1000a000 +#elif defined (CONFIG_DEBUG_IMX31_IMX35_UART) +#define UART_PADDR 0x43f90000 +#elif defined (CONFIG_DEBUG_IMX51_UART) +#define UART_PADDR 0x73fbc000 +#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) +#define UART_PADDR 0x53fbc000 +#elif defined (CONFIG_DEBUG_IMX6Q_UART) +#define UART_PADDR IMX6Q_DEBUG_UART_BASE +#endif + +/* + * FIXME: This is a copy of IMX_IO_P2V in hardware.h, and needs to + * stay sync with that. It's hard to maintain, and should be fixed + * globally for multi-platform build to use a fixed virtual address + * for low-level debug uart port across platforms. + */ +#define IMX_IO_P2V(x) ( \ + (((x) & 0x80000000) >> 7) | \ + (0xf4000000 + \ + (((x) & 0x50000000) >> 6) + \ + (((x) & 0x0b000000) >> 4) + \ + (((x) & 0x000fffff)))) + +#define UART_VADDR IMX_IO_P2V(UART_PADDR) + + .macro addruart, rp, rv, tmp + ldr \rp, =UART_PADDR @ physical + ldr \rv, =UART_VADDR @ virtual + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #0x40] @ TXDATA + .endm + + .macro waituart,rd,rx + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #0x98] @ SR2 + tst \rd, #1 << 3 @ TXDC + beq 1002b @ wait until transmit done + .endm diff --git a/trunk/arch/arm/mach-davinci/Kconfig b/trunk/arch/arm/mach-davinci/Kconfig index f8eecb959413..0153950f6068 100644 --- a/trunk/arch/arm/mach-davinci/Kconfig +++ b/trunk/arch/arm/mach-davinci/Kconfig @@ -58,6 +58,14 @@ config ARCH_DAVINCI_TNETV107X comment "DaVinci Board Type" +config MACH_DA8XX_DT + bool "Support DA8XX platforms using device tree" + default y + depends on ARCH_DAVINCI_DA8XX + help + Say y here to include support for TI DaVinci DA850 based using + Flattened Device Tree. More information at Documentation/devicetree + config MACH_DAVINCI_EVM bool "TI DM644x EVM" default ARCH_DAVINCI_DM644x diff --git a/trunk/arch/arm/mach-davinci/Makefile b/trunk/arch/arm/mach-davinci/Makefile index 2227effcb0e9..fb5c1aa98a63 100644 --- a/trunk/arch/arm/mach-davinci/Makefile +++ b/trunk/arch/arm/mach-davinci/Makefile @@ -22,6 +22,7 @@ obj-$(CONFIG_AINTC) += irq.o obj-$(CONFIG_CP_INTC) += cp_intc.o # Board specific +obj-$(CONFIG_MACH_DA8XX_DT) += da8xx-dt.o obj-$(CONFIG_MACH_DAVINCI_EVM) += board-dm644x-evm.o obj-$(CONFIG_MACH_SFFSDR) += board-sffsdr.o obj-$(CONFIG_MACH_NEUROS_OSD2) += board-neuros-osd2.o diff --git a/trunk/arch/arm/mach-davinci/board-dm355-evm.c b/trunk/arch/arm/mach-davinci/board-dm355-evm.c index 88ebea89abdf..cdf8d0746e79 100644 --- a/trunk/arch/arm/mach-davinci/board-dm355-evm.c +++ b/trunk/arch/arm/mach-davinci/board-dm355-evm.c @@ -324,7 +324,7 @@ static __init void dm355_evm_init(void) if (IS_ERR(aemif)) WARN("%s: unable to get AEMIF clock\n", __func__); else - clk_enable(aemif); + clk_prepare_enable(aemif); platform_add_devices(davinci_evm_devices, ARRAY_SIZE(davinci_evm_devices)); diff --git a/trunk/arch/arm/mach-davinci/board-dm355-leopard.c b/trunk/arch/arm/mach-davinci/board-dm355-leopard.c index 2f88103c6459..d41954507fc2 100644 --- a/trunk/arch/arm/mach-davinci/board-dm355-leopard.c +++ b/trunk/arch/arm/mach-davinci/board-dm355-leopard.c @@ -246,7 +246,7 @@ static __init void dm355_leopard_init(void) if (IS_ERR(aemif)) WARN("%s: unable to get AEMIF clock\n", __func__); else - clk_enable(aemif); + clk_prepare_enable(aemif); platform_add_devices(davinci_leopard_devices, ARRAY_SIZE(davinci_leopard_devices)); diff --git a/trunk/arch/arm/mach-davinci/board-dm365-evm.c b/trunk/arch/arm/mach-davinci/board-dm365-evm.c index 1b4a8adcfdc9..5d49c75388ca 100644 --- a/trunk/arch/arm/mach-davinci/board-dm365-evm.c +++ b/trunk/arch/arm/mach-davinci/board-dm365-evm.c @@ -478,7 +478,7 @@ static void __init evm_init_cpld(void) aemif_clk = clk_get(NULL, "aemif"); if (IS_ERR(aemif_clk)) return; - clk_enable(aemif_clk); + clk_prepare_enable(aemif_clk); if (request_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE, "cpld") == NULL) @@ -489,7 +489,7 @@ static void __init evm_init_cpld(void) SECTION_SIZE); fail: pr_err("ERROR: can't map CPLD\n"); - clk_disable(aemif_clk); + clk_disable_unprepare(aemif_clk); return; } diff --git a/trunk/arch/arm/mach-davinci/board-dm644x-evm.c b/trunk/arch/arm/mach-davinci/board-dm644x-evm.c index f22572cee49d..a84dfcbc1154 100644 --- a/trunk/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/trunk/arch/arm/mach-davinci/board-dm644x-evm.c @@ -776,7 +776,7 @@ static __init void davinci_evm_init(void) struct davinci_soc_info *soc_info = &davinci_soc_info; aemif_clk = clk_get(NULL, "aemif"); - clk_enable(aemif_clk); + clk_prepare_enable(aemif_clk); if (HAS_ATA) { if (HAS_NAND || HAS_NOR) diff --git a/trunk/arch/arm/mach-davinci/board-neuros-osd2.c b/trunk/arch/arm/mach-davinci/board-neuros-osd2.c index 144bf31d68dd..3e3e3afebf88 100644 --- a/trunk/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/trunk/arch/arm/mach-davinci/board-neuros-osd2.c @@ -188,7 +188,7 @@ static __init void davinci_ntosd2_init(void) struct davinci_soc_info *soc_info = &davinci_soc_info; aemif_clk = clk_get(NULL, "aemif"); - clk_enable(aemif_clk); + clk_prepare_enable(aemif_clk); if (HAS_ATA) { if (HAS_NAND) diff --git a/trunk/arch/arm/mach-davinci/da850.c b/trunk/arch/arm/mach-davinci/da850.c index b90c172d5541..68c5fe01857c 100644 --- a/trunk/arch/arm/mach-davinci/da850.c +++ b/trunk/arch/arm/mach-davinci/da850.c @@ -212,6 +212,12 @@ static struct clk tptc2_clk = { .flags = ALWAYS_ENABLED, }; +static struct clk pruss_clk = { + .name = "pruss", + .parent = &pll0_sysclk2, + .lpsc = DA8XX_LPSC0_PRUSS, +}; + static struct clk uart0_clk = { .name = "uart0", .parent = &pll0_sysclk2, @@ -385,6 +391,7 @@ static struct clk_lookup da850_clks[] = { CLK(NULL, "tptc1", &tptc1_clk), CLK(NULL, "tpcc1", &tpcc1_clk), CLK(NULL, "tptc2", &tptc2_clk), + CLK("pruss_uio", "pruss", &pruss_clk), CLK(NULL, "uart0", &uart0_clk), CLK(NULL, "uart1", &uart1_clk), CLK(NULL, "uart2", &uart2_clk), @@ -781,12 +788,6 @@ static struct map_desc da850_io_desc[] = { .length = DA8XX_CP_INTC_SIZE, .type = MT_DEVICE }, - { - .virtual = SRAM_VIRT, - .pfn = __phys_to_pfn(DA8XX_ARM_RAM_BASE), - .length = SZ_8K, - .type = MT_DEVICE - }, }; static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE }; @@ -1239,8 +1240,8 @@ static struct davinci_soc_info davinci_soc_info_da850 = { .gpio_irq = IRQ_DA8XX_GPIO0, .serial_dev = &da8xx_serial_device, .emac_pdata = &da8xx_emac_pdata, - .sram_dma = DA8XX_ARM_RAM_BASE, - .sram_len = SZ_8K, + .sram_dma = DA8XX_SHARED_RAM_BASE, + .sram_len = SZ_128K, }; void __init da850_init(void) diff --git a/trunk/arch/arm/mach-davinci/da8xx-dt.c b/trunk/arch/arm/mach-davinci/da8xx-dt.c new file mode 100644 index 000000000000..37c27af18fa0 --- /dev/null +++ b/trunk/arch/arm/mach-davinci/da8xx-dt.c @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * Modified from mach-omap/omap2/board-generic.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include +#include + +#include + +#include +#include +#include + +#define DA8XX_NUM_UARTS 3 + +void __init da8xx_uart_clk_enable(void) +{ + int i; + for (i = 0; i < DA8XX_NUM_UARTS; i++) + davinci_serial_setup_clk(i, NULL); +} + +static struct of_device_id da8xx_irq_match[] __initdata = { + { .compatible = "ti,cp-intc", .data = cp_intc_of_init, }, + { } +}; + +static void __init da8xx_init_irq(void) +{ + of_irq_init(da8xx_irq_match); +} + +#ifdef CONFIG_ARCH_DAVINCI_DA850 + +static void __init da850_init_machine(void) +{ + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + + da8xx_uart_clk_enable(); +} + +static const char *da850_boards_compat[] __initdata = { + "enbw,cmc", + "ti,da850-evm", + "ti,da850", + NULL, +}; + +DT_MACHINE_START(DA850_DT, "Generic DA850/OMAP-L138/AM18x") + .map_io = da850_init, + .init_irq = da8xx_init_irq, + .timer = &davinci_timer, + .init_machine = da850_init_machine, + .dt_compat = da850_boards_compat, + .init_late = davinci_init_late, + .restart = da8xx_restart, +MACHINE_END + +#endif diff --git a/trunk/arch/arm/mach-davinci/devices-da8xx.c b/trunk/arch/arm/mach-davinci/devices-da8xx.c index bd2f72b414bc..46c9a0c09ae5 100644 --- a/trunk/arch/arm/mach-davinci/devices-da8xx.c +++ b/trunk/arch/arm/mach-davinci/devices-da8xx.c @@ -22,6 +22,7 @@ #include #include #include +#include #include "clock.h" #include "asp.h" @@ -32,6 +33,7 @@ #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ #define DA8XX_I2C0_BASE 0x01c22000 #define DA8XX_RTC_BASE 0x01c23000 +#define DA8XX_PRUSS_MEM_BASE 0x01c30000 #define DA8XX_MMCSD0_BASE 0x01c40000 #define DA8XX_SPI0_BASE 0x01c41000 #define DA830_SPI1_BASE 0x01e12000 @@ -518,6 +520,75 @@ void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata) } } +static struct resource da8xx_pruss_resources[] = { + { + .start = DA8XX_PRUSS_MEM_BASE, + .end = DA8XX_PRUSS_MEM_BASE + 0xFFFF, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_DA8XX_EVTOUT0, + .end = IRQ_DA8XX_EVTOUT0, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_DA8XX_EVTOUT1, + .end = IRQ_DA8XX_EVTOUT1, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_DA8XX_EVTOUT2, + .end = IRQ_DA8XX_EVTOUT2, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_DA8XX_EVTOUT3, + .end = IRQ_DA8XX_EVTOUT3, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_DA8XX_EVTOUT4, + .end = IRQ_DA8XX_EVTOUT4, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_DA8XX_EVTOUT5, + .end = IRQ_DA8XX_EVTOUT5, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_DA8XX_EVTOUT6, + .end = IRQ_DA8XX_EVTOUT6, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_DA8XX_EVTOUT7, + .end = IRQ_DA8XX_EVTOUT7, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct uio_pruss_pdata da8xx_uio_pruss_pdata = { + .pintc_base = 0x4000, +}; + +static struct platform_device da8xx_uio_pruss_dev = { + .name = "pruss_uio", + .id = -1, + .num_resources = ARRAY_SIZE(da8xx_pruss_resources), + .resource = da8xx_pruss_resources, + .dev = { + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &da8xx_uio_pruss_pdata, + } +}; + +int __init da8xx_register_uio_pruss(void) +{ + da8xx_uio_pruss_pdata.sram_pool = sram_get_gen_pool(); + return platform_device_register(&da8xx_uio_pruss_dev); +} + static const struct display_panel disp_panel = { QVGA, 16, @@ -900,7 +971,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr) if (IS_ERR(da850_sata_clk)) return PTR_ERR(da850_sata_clk); - ret = clk_enable(da850_sata_clk); + ret = clk_prepare_enable(da850_sata_clk); if (ret) goto err0; @@ -931,7 +1002,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr) return 0; err1: - clk_disable(da850_sata_clk); + clk_disable_unprepare(da850_sata_clk); err0: clk_put(da850_sata_clk); return ret; @@ -939,7 +1010,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr) static void da850_sata_exit(struct device *dev) { - clk_disable(da850_sata_clk); + clk_disable_unprepare(da850_sata_clk); clk_put(da850_sata_clk); } diff --git a/trunk/arch/arm/mach-davinci/dm355.c b/trunk/arch/arm/mach-davinci/dm355.c index a255434908db..b49c3b77d55e 100644 --- a/trunk/arch/arm/mach-davinci/dm355.c +++ b/trunk/arch/arm/mach-davinci/dm355.c @@ -758,12 +758,6 @@ static struct map_desc dm355_io_desc[] = { .length = IO_SIZE, .type = MT_DEVICE }, - { - .virtual = SRAM_VIRT, - .pfn = __phys_to_pfn(0x00010000), - .length = SZ_32K, - .type = MT_MEMORY_NONCACHED, - }, }; /* Contents of JTAG ID register used to identify exact cpu type */ diff --git a/trunk/arch/arm/mach-davinci/dm365.c b/trunk/arch/arm/mach-davinci/dm365.c index b680c832e0ba..6c3980540be0 100644 --- a/trunk/arch/arm/mach-davinci/dm365.c +++ b/trunk/arch/arm/mach-davinci/dm365.c @@ -985,12 +985,6 @@ static struct map_desc dm365_io_desc[] = { .length = IO_SIZE, .type = MT_DEVICE }, - { - .virtual = SRAM_VIRT, - .pfn = __phys_to_pfn(0x00010000), - .length = SZ_32K, - .type = MT_MEMORY_NONCACHED, - }, }; static struct resource dm365_ks_resources[] = { diff --git a/trunk/arch/arm/mach-davinci/dm644x.c b/trunk/arch/arm/mach-davinci/dm644x.c index cd0c8b1e1ecf..9ab1f105cf00 100644 --- a/trunk/arch/arm/mach-davinci/dm644x.c +++ b/trunk/arch/arm/mach-davinci/dm644x.c @@ -786,12 +786,6 @@ static struct map_desc dm644x_io_desc[] = { .length = IO_SIZE, .type = MT_DEVICE }, - { - .virtual = SRAM_VIRT, - .pfn = __phys_to_pfn(0x00008000), - .length = SZ_16K, - .type = MT_MEMORY_NONCACHED, - }, }; /* Contents of JTAG ID register used to identify exact cpu type */ diff --git a/trunk/arch/arm/mach-davinci/dm646x.c b/trunk/arch/arm/mach-davinci/dm646x.c index 97c0f8e555bd..ac7b431c4c8e 100644 --- a/trunk/arch/arm/mach-davinci/dm646x.c +++ b/trunk/arch/arm/mach-davinci/dm646x.c @@ -756,12 +756,6 @@ static struct map_desc dm646x_io_desc[] = { .length = IO_SIZE, .type = MT_DEVICE }, - { - .virtual = SRAM_VIRT, - .pfn = __phys_to_pfn(0x00010000), - .length = SZ_32K, - .type = MT_MEMORY_NONCACHED, - }, }; /* Contents of JTAG ID register used to identify exact cpu type */ diff --git a/trunk/arch/arm/mach-davinci/include/mach/common.h b/trunk/arch/arm/mach-davinci/include/mach/common.h index bdc4aa8e672a..046c7238a3d6 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/common.h +++ b/trunk/arch/arm/mach-davinci/include/mach/common.h @@ -104,8 +104,6 @@ int davinci_pm_init(void); static inline int davinci_pm_init(void) { return 0; } #endif -/* standard place to map on-chip SRAMs; they *may* support DMA */ -#define SRAM_VIRT 0xfffe0000 #define SRAM_SIZE SZ_128K #endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */ diff --git a/trunk/arch/arm/mach-davinci/include/mach/da8xx.h b/trunk/arch/arm/mach-davinci/include/mach/da8xx.h index aaccdc4528fc..700d311c6854 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/trunk/arch/arm/mach-davinci/include/mach/da8xx.h @@ -26,6 +26,7 @@ #include #include #include +#include #include @@ -72,6 +73,7 @@ extern unsigned int da850_max_speed; #define DA8XX_AEMIF_CS2_BASE 0x60000000 #define DA8XX_AEMIF_CS3_BASE 0x62000000 #define DA8XX_AEMIF_CTL_BASE 0x68000000 +#define DA8XX_SHARED_RAM_BASE 0x80000000 #define DA8XX_ARM_RAM_BASE 0xffff0000 void __init da830_init(void); @@ -86,6 +88,7 @@ int da8xx_register_watchdog(void); int da8xx_register_usb20(unsigned mA, unsigned potpgt); int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); int da8xx_register_emac(void); +int da8xx_register_uio_pruss(void); int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata); int da8xx_register_mmcsd0(struct davinci_mmc_config *config); int da850_register_mmcsd1(struct davinci_mmc_config *config); diff --git a/trunk/arch/arm/mach-davinci/include/mach/serial.h b/trunk/arch/arm/mach-davinci/include/mach/serial.h index 46b3cd11c3c2..2d9d921e8b01 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/serial.h +++ b/trunk/arch/arm/mach-davinci/include/mach/serial.h @@ -43,6 +43,7 @@ struct davinci_uart_config { }; extern int davinci_serial_init(struct davinci_uart_config *); +extern int davinci_serial_setup_clk(unsigned instance, unsigned int *rate); #endif #endif /* __ASM_ARCH_SERIAL_H */ diff --git a/trunk/arch/arm/mach-davinci/include/mach/sram.h b/trunk/arch/arm/mach-davinci/include/mach/sram.h index 111f7cc71e07..4e5db56218b8 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/sram.h +++ b/trunk/arch/arm/mach-davinci/include/mach/sram.h @@ -24,4 +24,7 @@ extern void *sram_alloc(size_t len, dma_addr_t *dma); extern void sram_free(void *addr, size_t len); +/* Get the struct gen_pool * for use in platform data */ +extern struct gen_pool *sram_get_gen_pool(void); + #endif /* __MACH_SRAM_H */ diff --git a/trunk/arch/arm/mach-davinci/serial.c b/trunk/arch/arm/mach-davinci/serial.c index 1875740fe27c..f2625814c3c9 100644 --- a/trunk/arch/arm/mach-davinci/serial.c +++ b/trunk/arch/arm/mach-davinci/serial.c @@ -70,11 +70,33 @@ static void __init davinci_serial_reset(struct plat_serial8250_port *p) UART_DM646X_SCR_TX_WATERMARK); } -int __init davinci_serial_init(struct davinci_uart_config *info) +/* Enable UART clock and obtain its rate */ +int __init davinci_serial_setup_clk(unsigned instance, unsigned int *rate) { - int i; char name[16]; - struct clk *uart_clk; + struct clk *clk; + struct davinci_soc_info *soc_info = &davinci_soc_info; + struct device *dev = &soc_info->serial_dev->dev; + + sprintf(name, "uart%d", instance); + clk = clk_get(dev, name); + if (IS_ERR(clk)) { + pr_err("%s:%d: failed to get UART%d clock\n", + __func__, __LINE__, instance); + return PTR_ERR(clk); + } + + clk_prepare_enable(clk); + + if (rate) + *rate = clk_get_rate(clk); + + return 0; +} + +int __init davinci_serial_init(struct davinci_uart_config *info) +{ + int i, ret; struct davinci_soc_info *soc_info = &davinci_soc_info; struct device *dev = &soc_info->serial_dev->dev; struct plat_serial8250_port *p = dev->platform_data; @@ -87,16 +109,9 @@ int __init davinci_serial_init(struct davinci_uart_config *info) if (!(info->enabled_uarts & (1 << i))) continue; - sprintf(name, "uart%d", i); - uart_clk = clk_get(dev, name); - if (IS_ERR(uart_clk)) { - printk(KERN_ERR "%s:%d: failed to get UART%d clock\n", - __func__, __LINE__, i); + ret = davinci_serial_setup_clk(i, &p->uartclk); + if (ret) continue; - } - - clk_enable(uart_clk); - p->uartclk = clk_get_rate(uart_clk); if (!p->membase && p->mapbase) { p->membase = ioremap(p->mapbase, SZ_4K); diff --git a/trunk/arch/arm/mach-davinci/sram.c b/trunk/arch/arm/mach-davinci/sram.c index db0f7787faf1..c5f7ee5cc80a 100644 --- a/trunk/arch/arm/mach-davinci/sram.c +++ b/trunk/arch/arm/mach-davinci/sram.c @@ -10,6 +10,7 @@ */ #include #include +#include #include #include @@ -17,6 +18,11 @@ static struct gen_pool *sram_pool; +struct gen_pool *sram_get_gen_pool(void) +{ + return sram_pool; +} + void *sram_alloc(size_t len, dma_addr_t *dma) { unsigned long vaddr; @@ -32,7 +38,7 @@ void *sram_alloc(size_t len, dma_addr_t *dma) return NULL; if (dma) - *dma = dma_base + (vaddr - SRAM_VIRT); + *dma = gen_pool_virt_to_phys(sram_pool, vaddr); return (void *)vaddr; } @@ -53,8 +59,10 @@ EXPORT_SYMBOL(sram_free); */ static int __init sram_init(void) { + phys_addr_t phys = davinci_soc_info.sram_dma; unsigned len = davinci_soc_info.sram_len; int status = 0; + void *addr; if (len) { len = min_t(unsigned, len, SRAM_SIZE); @@ -62,8 +70,17 @@ static int __init sram_init(void) if (!sram_pool) status = -ENOMEM; } - if (sram_pool) - status = gen_pool_add(sram_pool, SRAM_VIRT, len, -1); + + if (sram_pool) { + addr = ioremap(phys, len); + if (!addr) + return -ENOMEM; + status = gen_pool_add_virt(sram_pool, (unsigned)addr, + phys, len, -1); + if (status < 0) + iounmap(addr); + } + WARN_ON(status < 0); return status; } diff --git a/trunk/arch/arm/mach-davinci/time.c b/trunk/arch/arm/mach-davinci/time.c index 75da315b6587..9847938785ca 100644 --- a/trunk/arch/arm/mach-davinci/time.c +++ b/trunk/arch/arm/mach-davinci/time.c @@ -379,7 +379,7 @@ static void __init davinci_timer_init(void) timer_clk = clk_get(NULL, "timer0"); BUG_ON(IS_ERR(timer_clk)); - clk_enable(timer_clk); + clk_prepare_enable(timer_clk); /* init timer hw */ timer_init(); @@ -429,7 +429,7 @@ void davinci_watchdog_reset(struct platform_device *pdev) wd_clk = clk_get(&pdev->dev, NULL); if (WARN_ON(IS_ERR(wd_clk))) return; - clk_enable(wd_clk); + clk_prepare_enable(wd_clk); /* disable, internal clock source */ __raw_writel(0, base + TCR); diff --git a/trunk/arch/arm/mach-exynos/Kconfig b/trunk/arch/arm/mach-exynos/Kconfig index da55107033dd..bb3b09aa9183 100644 --- a/trunk/arch/arm/mach-exynos/Kconfig +++ b/trunk/arch/arm/mach-exynos/Kconfig @@ -63,6 +63,7 @@ config SOC_EXYNOS5250 depends on ARCH_EXYNOS5 select S5P_PM if PM select S5P_SLEEP if PM + select S5P_DEV_MFC select SAMSUNG_DMADEV help Enable EXYNOS5250 SoC support diff --git a/trunk/arch/arm/mach-exynos/Makefile b/trunk/arch/arm/mach-exynos/Makefile index 9b58024f7d43..1797dee88a0d 100644 --- a/trunk/arch/arm/mach-exynos/Makefile +++ b/trunk/arch/arm/mach-exynos/Makefile @@ -53,7 +53,6 @@ obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o -obj-$(CONFIG_EXYNOS_DEV_DRM) += dev-drm.o obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o obj-$(CONFIG_ARCH_EXYNOS) += setup-i2c0.o diff --git a/trunk/arch/arm/mach-exynos/clock-exynos4.c b/trunk/arch/arm/mach-exynos/clock-exynos4.c index 6a45c9a9abe9..1870bee991b6 100644 --- a/trunk/arch/arm/mach-exynos/clock-exynos4.c +++ b/trunk/arch/arm/mach-exynos/clock-exynos4.c @@ -575,6 +575,10 @@ static struct clk exynos4_init_clocks_off[] = { .name = "adc", .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 15), + }, { + .name = "tmu_apbif", + .enable = exynos4_clk_ip_perir_ctrl, + .ctrlbit = (1 << 17), }, { .name = "keypad", .enable = exynos4_clk_ip_perir_ctrl, diff --git a/trunk/arch/arm/mach-exynos/clock-exynos5.c b/trunk/arch/arm/mach-exynos/clock-exynos5.c index c44ca1ee1b8d..f1e0386262a8 100644 --- a/trunk/arch/arm/mach-exynos/clock-exynos5.c +++ b/trunk/arch/arm/mach-exynos/clock-exynos5.c @@ -196,6 +196,11 @@ static int exynos5_clk_ip_isp1_ctrl(struct clk *clk, int enable) return s5p_gatectrl(EXYNOS5_CLKGATE_IP_ISP1, clk, enable); } +static int exynos5_clk_hdmiphy_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable); +} + /* Core list of CMU_CPU side */ static struct clksrc_clk exynos5_clk_mout_apll = { @@ -615,6 +620,11 @@ static struct clk exynos5_init_clocks_off[] = { .parent = &exynos5_clk_aclk_66.clk, .enable = exynos5_clk_ip_peric_ctrl, .ctrlbit = (1 << 24), + }, { + .name = "tmu_apbif", + .parent = &exynos5_clk_aclk_66.clk, + .enable = exynos5_clk_ip_peris_ctrl, + .ctrlbit = (1 << 21), }, { .name = "rtc", .parent = &exynos5_clk_aclk_66.clk, @@ -664,17 +674,22 @@ static struct clk exynos5_init_clocks_off[] = { .ctrlbit = (1 << 25), }, { .name = "mfc", - .devname = "s5p-mfc", + .devname = "s5p-mfc-v6", .enable = exynos5_clk_ip_mfc_ctrl, .ctrlbit = (1 << 0), }, { .name = "hdmi", - .devname = "exynos4-hdmi", + .devname = "exynos5-hdmi", .enable = exynos5_clk_ip_disp1_ctrl, .ctrlbit = (1 << 6), + }, { + .name = "hdmiphy", + .devname = "exynos5-hdmi", + .enable = exynos5_clk_hdmiphy_ctrl, + .ctrlbit = (1 << 0), }, { .name = "mixer", - .devname = "s5p-mixer", + .devname = "exynos5-mixer", .enable = exynos5_clk_ip_disp1_ctrl, .ctrlbit = (1 << 5), }, { diff --git a/trunk/arch/arm/mach-exynos/common.c b/trunk/arch/arm/mach-exynos/common.c index 1947be8e5f5b..4af8284f3597 100644 --- a/trunk/arch/arm/mach-exynos/common.c +++ b/trunk/arch/arm/mach-exynos/common.c @@ -997,11 +997,14 @@ static int __init exynos_init_irq_eint(void) * platforms switch over to using the pinctrl driver, the wakeup * interrupt support code here can be completely removed. */ + static const struct of_device_id exynos_pinctrl_ids[] = { + { .compatible = "samsung,pinctrl-exynos4210", }, + { .compatible = "samsung,pinctrl-exynos4x12", }, + }; struct device_node *pctrl_np, *wkup_np; - const char *pctrl_compat = "samsung,pinctrl-exynos4210"; const char *wkup_compat = "samsung,exynos4210-wakeup-eint"; - for_each_compatible_node(pctrl_np, NULL, pctrl_compat) { + for_each_matching_node(pctrl_np, exynos_pinctrl_ids) { if (of_device_is_available(pctrl_np)) { wkup_np = of_find_compatible_node(pctrl_np, NULL, wkup_compat); diff --git a/trunk/arch/arm/mach-exynos/dev-drm.c b/trunk/arch/arm/mach-exynos/dev-drm.c deleted file mode 100644 index 17c9c6ecc2e0..000000000000 --- a/trunk/arch/arm/mach-exynos/dev-drm.c +++ /dev/null @@ -1,29 +0,0 @@ -/* - * linux/arch/arm/mach-exynos/dev-drm.c - * - * Copyright (c) 2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS - core DRM device - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include -#include -#include - -#include - -static u64 exynos_drm_dma_mask = DMA_BIT_MASK(32); - -struct platform_device exynos_device_drm = { - .name = "exynos-drm", - .dev = { - .dma_mask = &exynos_drm_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; diff --git a/trunk/arch/arm/mach-exynos/include/mach/irqs.h b/trunk/arch/arm/mach-exynos/include/mach/irqs.h index 35bced6f9092..5adacd12e43b 100644 --- a/trunk/arch/arm/mach-exynos/include/mach/irqs.h +++ b/trunk/arch/arm/mach-exynos/include/mach/irqs.h @@ -136,6 +136,9 @@ #define EXYNOS4_IRQ_TSI IRQ_SPI(115) #define EXYNOS4_IRQ_SATA IRQ_SPI(116) +#define EXYNOS4_IRQ_TMU_TRIG0 COMBINER_IRQ(2, 4) +#define EXYNOS4_IRQ_TMU_TRIG1 COMBINER_IRQ(3, 4) + #define EXYNOS4_IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0) #define EXYNOS4_IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1) #define EXYNOS4_IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2) diff --git a/trunk/arch/arm/mach-exynos/include/mach/map.h b/trunk/arch/arm/mach-exynos/include/mach/map.h index 8480849affb9..772acd344cbd 100644 --- a/trunk/arch/arm/mach-exynos/include/mach/map.h +++ b/trunk/arch/arm/mach-exynos/include/mach/map.h @@ -88,6 +88,8 @@ #define EXYNOS4_PA_TWD 0x10500600 #define EXYNOS4_PA_L2CC 0x10502000 +#define EXYNOS4_PA_TMU 0x100C0000 + #define EXYNOS4_PA_MDMA0 0x10810000 #define EXYNOS4_PA_MDMA1 0x12850000 #define EXYNOS4_PA_PDMA0 0x12680000 diff --git a/trunk/arch/arm/mach-exynos/mach-exynos4-dt.c b/trunk/arch/arm/mach-exynos/mach-exynos4-dt.c index eadf4b59e7d2..8858068d2b6a 100644 --- a/trunk/arch/arm/mach-exynos/mach-exynos4-dt.c +++ b/trunk/arch/arm/mach-exynos/mach-exynos4-dt.c @@ -77,6 +77,8 @@ static const struct of_dev_auxdata exynos4_auxdata_lookup[] __initconst = { "exynos4210-spi.2", NULL), OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA0, "dma-pl330.0", NULL), OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA1, "dma-pl330.1", NULL), + OF_DEV_AUXDATA("samsung,exynos4210-tmu", EXYNOS4_PA_TMU, + "exynos-tmu", NULL), {}, }; @@ -94,6 +96,8 @@ static void __init exynos4_dt_machine_init(void) static char const *exynos4_dt_compat[] __initdata = { "samsung,exynos4210", + "samsung,exynos4212", + "samsung,exynos4412", NULL }; diff --git a/trunk/arch/arm/mach-exynos/mach-exynos5-dt.c b/trunk/arch/arm/mach-exynos/mach-exynos5-dt.c index db1cd8eacf28..25f464cf7979 100644 --- a/trunk/arch/arm/mach-exynos/mach-exynos5-dt.c +++ b/trunk/arch/arm/mach-exynos/mach-exynos5-dt.c @@ -11,6 +11,8 @@ #include #include +#include +#include #include #include @@ -18,6 +20,7 @@ #include #include +#include #include "common.h" @@ -47,6 +50,20 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { "s3c2440-i2c.0", NULL), OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1), "s3c2440-i2c.1", NULL), + OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2), + "s3c2440-i2c.2", NULL), + OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(3), + "s3c2440-i2c.3", NULL), + OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(4), + "s3c2440-i2c.4", NULL), + OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(5), + "s3c2440-i2c.5", NULL), + OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(6), + "s3c2440-i2c.6", NULL), + OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(7), + "s3c2440-i2c.7", NULL), + OF_DEV_AUXDATA("samsung,s3c2440-hdmiphy-i2c", EXYNOS5_PA_IIC(8), + "s3c2440-hdmiphy-i2c", NULL), OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0, "dw_mmc.0", NULL), OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1, @@ -61,6 +78,12 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { "exynos4210-spi.1", NULL), OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2, "exynos4210-spi.2", NULL), + OF_DEV_AUXDATA("samsung,exynos5-sata-ahci", 0x122F0000, + "exynos5-sata", NULL), + OF_DEV_AUXDATA("samsung,exynos5-sata-phy", 0x12170000, + "exynos5-sata-phy", NULL), + OF_DEV_AUXDATA("samsung,exynos5-sata-phy-i2c", 0x121D0000, + "exynos5-sata-phy-i2c", NULL), OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL), OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL), OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL), @@ -72,6 +95,13 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { "exynos-gsc.2", NULL), OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3, "exynos-gsc.3", NULL), + OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000, + "exynos5-hdmi", NULL), + OF_DEV_AUXDATA("samsung,exynos5-mixer", 0x14450000, + "exynos5-mixer", NULL), + OF_DEV_AUXDATA("samsung,mfc-v6", 0x11000000, "s5p-mfc-v6", NULL), + OF_DEV_AUXDATA("samsung,exynos5250-tmu", 0x10060000, + "exynos-tmu", NULL), {}, }; @@ -92,6 +122,17 @@ static char const *exynos5250_dt_compat[] __initdata = { NULL }; +static void __init exynos5_reserve(void) +{ + struct s5p_mfc_dt_meminfo mfc_mem; + + /* Reserve memory for MFC only if it's available */ + mfc_mem.compatible = "samsung,mfc-v6"; + if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem)) + s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff, + mfc_mem.lsize); +} + DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)") /* Maintainer: Kukjin Kim */ .init_irq = exynos5_init_irq, @@ -103,4 +144,5 @@ DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)") .timer = &exynos4_timer, .dt_compat = exynos5250_dt_compat, .restart = exynos5_restart, + .reserve = exynos5_reserve, MACHINE_END diff --git a/trunk/arch/arm/mach-exynos/mach-nuri.c b/trunk/arch/arm/mach-exynos/mach-nuri.c index c05d7aa84031..94970602df61 100644 --- a/trunk/arch/arm/mach-exynos/mach-nuri.c +++ b/trunk/arch/arm/mach-exynos/mach-nuri.c @@ -1327,9 +1327,6 @@ static struct platform_device *nuri_devices[] __initdata = { &cam_vdda_fixed_rdev, &cam_8m_12v_fixed_rdev, &exynos4_bus_devfreq, -#ifdef CONFIG_DRM_EXYNOS - &exynos_device_drm, -#endif }; static void __init nuri_map_io(void) diff --git a/trunk/arch/arm/mach-exynos/mach-origen.c b/trunk/arch/arm/mach-exynos/mach-origen.c index 9adf491674ea..d8dc6d7f0c00 100644 --- a/trunk/arch/arm/mach-exynos/mach-origen.c +++ b/trunk/arch/arm/mach-exynos/mach-origen.c @@ -709,9 +709,6 @@ static struct platform_device *origen_devices[] __initdata = { &s5p_device_mfc_l, &s5p_device_mfc_r, &s5p_device_mixer, -#ifdef CONFIG_DRM_EXYNOS - &exynos_device_drm, -#endif &exynos4_device_ohci, &origen_device_gpiokeys, &origen_lcd_hv070wsa, diff --git a/trunk/arch/arm/mach-exynos/mach-smdk4x12.c b/trunk/arch/arm/mach-exynos/mach-smdk4x12.c index 730f1ac65928..17b9ca48722e 100644 --- a/trunk/arch/arm/mach-exynos/mach-smdk4x12.c +++ b/trunk/arch/arm/mach-exynos/mach-smdk4x12.c @@ -317,9 +317,6 @@ static struct platform_device *smdk4x12_devices[] __initdata = { &s5p_device_mfc, &s5p_device_mfc_l, &s5p_device_mfc_r, -#ifdef CONFIG_DRM_EXYNOS - &exynos_device_drm, -#endif &samsung_device_keypad, }; diff --git a/trunk/arch/arm/mach-exynos/mach-smdkv310.c b/trunk/arch/arm/mach-exynos/mach-smdkv310.c index ee4fb1a9cb72..4f0ac5397ba3 100644 --- a/trunk/arch/arm/mach-exynos/mach-smdkv310.c +++ b/trunk/arch/arm/mach-exynos/mach-smdkv310.c @@ -300,9 +300,6 @@ static struct platform_device *smdkv310_devices[] __initdata = { &s5p_device_fimc_md, &s5p_device_g2d, &s5p_device_jpeg, -#ifdef CONFIG_DRM_EXYNOS - &exynos_device_drm, -#endif &exynos4_device_ac97, &exynos4_device_i2s0, &exynos4_device_ohci, diff --git a/trunk/arch/arm/mach-exynos/mach-universal_c210.c b/trunk/arch/arm/mach-exynos/mach-universal_c210.c index ebc9dd339a38..cfdf876a8626 100644 --- a/trunk/arch/arm/mach-exynos/mach-universal_c210.c +++ b/trunk/arch/arm/mach-exynos/mach-universal_c210.c @@ -1081,9 +1081,6 @@ static struct platform_device *universal_devices[] __initdata = { &s5p_device_onenand, &s5p_device_fimd0, &s5p_device_jpeg, -#ifdef CONFIG_DRM_EXYNOS - &exynos_device_drm, -#endif &s3c_device_usb_hsotg, &s5p_device_mfc, &s5p_device_mfc_l, diff --git a/trunk/arch/arm/mach-exynos/pm_domains.c b/trunk/arch/arm/mach-exynos/pm_domains.c index c0bc83a7663e..9f1351de52f7 100644 --- a/trunk/arch/arm/mach-exynos/pm_domains.c +++ b/trunk/arch/arm/mach-exynos/pm_domains.c @@ -19,6 +19,8 @@ #include #include #include +#include +#include #include #include @@ -83,12 +85,88 @@ static struct exynos_pm_domain PD = { \ } #ifdef CONFIG_OF +static void exynos_add_device_to_domain(struct exynos_pm_domain *pd, + struct device *dev) +{ + int ret; + + dev_dbg(dev, "adding to power domain %s\n", pd->pd.name); + + while (1) { + ret = pm_genpd_add_device(&pd->pd, dev); + if (ret != -EAGAIN) + break; + cond_resched(); + } + + pm_genpd_dev_need_restore(dev, true); +} + +static void exynos_remove_device_from_domain(struct device *dev) +{ + struct generic_pm_domain *genpd = dev_to_genpd(dev); + int ret; + + dev_dbg(dev, "removing from power domain %s\n", genpd->name); + + while (1) { + ret = pm_genpd_remove_device(genpd, dev); + if (ret != -EAGAIN) + break; + cond_resched(); + } +} + +static void exynos_read_domain_from_dt(struct device *dev) +{ + struct platform_device *pd_pdev; + struct exynos_pm_domain *pd; + struct device_node *node; + + node = of_parse_phandle(dev->of_node, "samsung,power-domain", 0); + if (!node) + return; + pd_pdev = of_find_device_by_node(node); + if (!pd_pdev) + return; + pd = platform_get_drvdata(pd_pdev); + exynos_add_device_to_domain(pd, dev); +} + +static int exynos_pm_notifier_call(struct notifier_block *nb, + unsigned long event, void *data) +{ + struct device *dev = data; + + switch (event) { + case BUS_NOTIFY_BIND_DRIVER: + if (dev->of_node) + exynos_read_domain_from_dt(dev); + + break; + + case BUS_NOTIFY_UNBOUND_DRIVER: + exynos_remove_device_from_domain(dev); + + break; + } + return NOTIFY_DONE; +} + +static struct notifier_block platform_nb = { + .notifier_call = exynos_pm_notifier_call, +}; + static __init int exynos_pm_dt_parse_domains(void) { + struct platform_device *pdev; struct device_node *np; for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") { struct exynos_pm_domain *pd; + int on; + + pdev = of_find_device_by_node(np); pd = kzalloc(sizeof(*pd), GFP_KERNEL); if (!pd) { @@ -97,15 +175,22 @@ static __init int exynos_pm_dt_parse_domains(void) return -ENOMEM; } - if (of_get_property(np, "samsung,exynos4210-pd-off", NULL)) - pd->is_off = true; - pd->name = np->name; + pd->pd.name = kstrdup(np->name, GFP_KERNEL); + pd->name = pd->pd.name; pd->base = of_iomap(np, 0); pd->pd.power_off = exynos_pd_power_off; pd->pd.power_on = exynos_pd_power_on; pd->pd.of_node = np; - pm_genpd_init(&pd->pd, NULL, false); + + platform_set_drvdata(pdev, pd); + + on = __raw_readl(pd->base + 0x4) & S5P_INT_LOCAL_PWR_EN; + + pm_genpd_init(&pd->pd, NULL, !on); } + + bus_register_notifier(&platform_bus_type, &platform_nb); + return 0; } #else diff --git a/trunk/arch/arm/plat-mxc/3ds_debugboard.c b/trunk/arch/arm/mach-imx/3ds_debugboard.c similarity index 99% rename from trunk/arch/arm/plat-mxc/3ds_debugboard.c rename to trunk/arch/arm/mach-imx/3ds_debugboard.c index 5c10ad05df74..134377352966 100644 --- a/trunk/arch/arm/plat-mxc/3ds_debugboard.c +++ b/trunk/arch/arm/mach-imx/3ds_debugboard.c @@ -21,7 +21,7 @@ #include #include -#include +#include "hardware.h" /* LAN9217 ethernet base address */ #define LAN9217_BASE_ADDR(n) (n + 0x0) diff --git a/trunk/arch/arm/plat-mxc/include/mach/3ds_debugboard.h b/trunk/arch/arm/mach-imx/3ds_debugboard.h similarity index 100% rename from trunk/arch/arm/plat-mxc/include/mach/3ds_debugboard.h rename to trunk/arch/arm/mach-imx/3ds_debugboard.h diff --git a/trunk/arch/arm/mach-imx/Kconfig b/trunk/arch/arm/mach-imx/Kconfig index 8d276584650e..b09924112f99 100644 --- a/trunk/arch/arm/mach-imx/Kconfig +++ b/trunk/arch/arm/mach-imx/Kconfig @@ -1,3 +1,70 @@ +config ARCH_MXC + bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 + select ARCH_REQUIRE_GPIOLIB + select ARM_PATCH_PHYS_VIRT + select AUTO_ZRELADDR if !ZBOOT_ROM + select CLKDEV_LOOKUP + select CLKSRC_MMIO + select GENERIC_CLOCKEVENTS + select GENERIC_IRQ_CHIP + select MULTI_IRQ_HANDLER + select SPARSE_IRQ + select USE_OF + help + Support for Freescale MXC/iMX-based family of processors + +menu "Freescale i.MX support" + depends on ARCH_MXC + +config MXC_IRQ_PRIOR + bool "Use IRQ priority" + help + Select this if you want to use prioritized IRQ handling. + This feature prevents higher priority ISR to be interrupted + by lower priority IRQ even IRQF_DISABLED flag is not set. + This may be useful in embedded applications, where are strong + requirements for timing. + Say N here, unless you have a specialized requirement. + +config MXC_TZIC + bool + +config MXC_AVIC + bool + +config MXC_DEBUG_BOARD + bool "Enable MXC debug board(for 3-stack)" + help + The debug board is an integral part of the MXC 3-stack(PDK) + platforms, it can be attached or removed from the peripheral + board. On debug board, several debug devices(ethernet, UART, + buttons, LEDs and JTAG) are implemented. Between the MCU and + these devices, a CPLD is added as a bridge which performs + data/address de-multiplexing and decode, signal level shift, + interrupt control and various board functions. + +config HAVE_EPIT + bool + +config MXC_USE_EPIT + bool "Use EPIT instead of GPT" + depends on HAVE_EPIT + help + Use EPIT as the system timer on systems that have it. Normally you + don't have a reason to do so as the EPIT has the same features and + uses the same clocks as the GPT. Anyway, on some systems the GPT + may be in use for other purposes. + +config MXC_ULPI + bool + +config ARCH_HAS_RNGA + bool + +config IRAM_ALLOC + bool + select GENERIC_ALLOCATOR + config HAVE_IMX_GPC bool @@ -5,6 +72,12 @@ config HAVE_IMX_MMDC bool config HAVE_IMX_SRC + def_bool y if SMP + +config IMX_HAVE_IOMUX_V1 + bool + +config ARCH_MXC_IOMUX_V3 bool config ARCH_MX1 @@ -104,7 +177,7 @@ config SOC_IMX51 select PINCTRL_IMX51 select SOC_IMX5 -if ARCH_IMX_V4_V5 +if ARCH_MULTI_V4T comment "MX1 platforms:" config MACH_MXLADS @@ -133,6 +206,10 @@ config MACH_APF9328 help Say Yes here if you are using the Armadeus APF9328 development board +endif + +if ARCH_MULTI_V5 + comment "MX21 platforms:" config MACH_MX21ADS @@ -195,6 +272,13 @@ config MACH_EUKREA_MBIMXSD25_BASEBOARD endchoice +config MACH_IMX25_DT + bool "Support i.MX25 platforms from device tree" + select SOC_IMX25 + help + Include support for Freescale i.MX25 based platforms + using the device tree for discovery + comment "MX27 platforms:" config MACH_MX27ADS @@ -384,7 +468,7 @@ config MACH_IMX27_DT endif -if ARCH_IMX_V6_V7 +if ARCH_MULTI_V6 comment "MX31 platforms:" @@ -649,6 +733,10 @@ config MACH_VPR200 Include support for VPR200 platform. This includes specific configurations for the board and its peripherals. +endif + +if ARCH_MULTI_V7 + comment "i.MX5 platforms:" config MACH_MX50_RDP @@ -748,7 +836,14 @@ config SOC_IMX53 config SOC_IMX6Q bool "i.MX6 Quad support" + select ARCH_HAS_CPUFREQ + select ARCH_HAS_OPP select ARM_CPU_SUSPEND if PM + select ARM_ERRATA_743622 + select ARM_ERRATA_751472 + select ARM_ERRATA_754322 + select ARM_ERRATA_764369 if SMP + select ARM_ERRATA_775420 select ARM_GIC select COMMON_CLK select CPU_V7 @@ -756,13 +851,20 @@ config SOC_IMX6Q select HAVE_CAN_FLEXCAN if CAN select HAVE_IMX_GPC select HAVE_IMX_MMDC - select HAVE_IMX_SRC select HAVE_SMP select MFD_SYSCON select PINCTRL select PINCTRL_IMX6Q + select PL310_ERRATA_588369 if CACHE_PL310 + select PL310_ERRATA_727915 if CACHE_PL310 + select PL310_ERRATA_769419 if CACHE_PL310 + select PM_OPP if PM help This enables support for Freescale i.MX6 Quad processor. endif + +source "arch/arm/mach-imx/devices/Kconfig" + +endmenu diff --git a/trunk/arch/arm/mach-imx/Makefile b/trunk/arch/arm/mach-imx/Makefile index 895754aeb4f3..0634b3152c24 100644 --- a/trunk/arch/arm/mach-imx/Makefile +++ b/trunk/arch/arm/mach-imx/Makefile @@ -1,3 +1,5 @@ +obj-y := time.o cpu.o system.o irq-common.o + obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o @@ -15,6 +17,24 @@ obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(i obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \ clk-pfd.o clk-busy.o clk.o +obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o +obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o + +obj-$(CONFIG_MXC_TZIC) += tzic.o +obj-$(CONFIG_MXC_AVIC) += avic.o + +obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o +obj-$(CONFIG_MXC_ULPI) += ulpi.o +obj-$(CONFIG_MXC_USE_EPIT) += epit.o +obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o +obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o +obj-$(CONFIG_CPU_IDLE) += cpuidle.o + +ifdef CONFIG_SND_IMX_SOC +obj-y += ssi-fiq.o +obj-y += ssi-fiq-ksym.o +endif + # Support for CMOS sensor interface obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o @@ -30,6 +50,7 @@ obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o +obj-$(CONFIG_MACH_IMX25_DT) += imx25-dt.o # i.MX27 based machines obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o @@ -89,3 +110,5 @@ obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o obj-$(CONFIG_SOC_IMX53) += mach-imx53.o + +obj-y += devices/ diff --git a/trunk/arch/arm/plat-mxc/avic.c b/trunk/arch/arm/mach-imx/avic.c similarity index 98% rename from trunk/arch/arm/plat-mxc/avic.c rename to trunk/arch/arm/mach-imx/avic.c index cbd55c36def3..0eff23ed92b9 100644 --- a/trunk/arch/arm/plat-mxc/avic.c +++ b/trunk/arch/arm/mach-imx/avic.c @@ -22,12 +22,11 @@ #include #include #include -#include #include #include -#include -#include +#include "common.h" +#include "hardware.h" #include "irq-common.h" #define AVIC_INTCNTL 0x00 /* int control reg */ diff --git a/trunk/arch/arm/plat-mxc/include/mach/board-mx31lilly.h b/trunk/arch/arm/mach-imx/board-mx31lilly.h similarity index 100% rename from trunk/arch/arm/plat-mxc/include/mach/board-mx31lilly.h rename to trunk/arch/arm/mach-imx/board-mx31lilly.h diff --git a/trunk/arch/arm/plat-mxc/include/mach/board-mx31lite.h b/trunk/arch/arm/mach-imx/board-mx31lite.h similarity index 100% rename from trunk/arch/arm/plat-mxc/include/mach/board-mx31lite.h rename to trunk/arch/arm/mach-imx/board-mx31lite.h diff --git a/trunk/arch/arm/plat-mxc/include/mach/board-mx31moboard.h b/trunk/arch/arm/mach-imx/board-mx31moboard.h similarity index 100% rename from trunk/arch/arm/plat-mxc/include/mach/board-mx31moboard.h rename to trunk/arch/arm/mach-imx/board-mx31moboard.h diff --git a/trunk/arch/arm/plat-mxc/include/mach/board-pcm038.h b/trunk/arch/arm/mach-imx/board-pcm038.h similarity index 100% rename from trunk/arch/arm/plat-mxc/include/mach/board-pcm038.h rename to trunk/arch/arm/mach-imx/board-pcm038.h diff --git a/trunk/arch/arm/mach-imx/clk-imx1.c b/trunk/arch/arm/mach-imx/clk-imx1.c index 516ddee1948e..15f9d223cf0b 100644 --- a/trunk/arch/arm/mach-imx/clk-imx1.c +++ b/trunk/arch/arm/mach-imx/clk-imx1.c @@ -22,9 +22,9 @@ #include #include -#include -#include #include "clk.h" +#include "common.h" +#include "hardware.h" /* CCM register addresses */ #define IO_ADDR_CCM(off) (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off))) @@ -82,7 +82,8 @@ int __init mx1_clocks_init(unsigned long fref) pr_err("imx1 clk %d: register failed with %ld\n", i, PTR_ERR(clk[i])); - clk_register_clkdev(clk[dma_gate], "ahb", "imx-dma"); + clk_register_clkdev(clk[dma_gate], "ahb", "imx1-dma"); + clk_register_clkdev(clk[hclk], "ipg", "imx1-dma"); clk_register_clkdev(clk[csi_gate], NULL, "mx1-camera.0"); clk_register_clkdev(clk[mma_gate], "mma", NULL); clk_register_clkdev(clk[usbd_gate], NULL, "imx_udc.0"); @@ -94,18 +95,18 @@ int __init mx1_clocks_init(unsigned long fref) clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.1"); clk_register_clkdev(clk[per1], "per", "imx1-uart.2"); clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.2"); - clk_register_clkdev(clk[hclk], NULL, "imx-i2c.0"); + clk_register_clkdev(clk[hclk], NULL, "imx1-i2c.0"); clk_register_clkdev(clk[per2], "per", "imx1-cspi.0"); clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.0"); clk_register_clkdev(clk[per2], "per", "imx1-cspi.1"); clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.1"); clk_register_clkdev(clk[per2], NULL, "imx-mmc.0"); - clk_register_clkdev(clk[per2], "per", "imx-fb.0"); - clk_register_clkdev(clk[dummy], "ipg", "imx-fb.0"); - clk_register_clkdev(clk[dummy], "ahb", "imx-fb.0"); + clk_register_clkdev(clk[per2], "per", "imx1-fb.0"); + clk_register_clkdev(clk[dummy], "ipg", "imx1-fb.0"); + clk_register_clkdev(clk[dummy], "ahb", "imx1-fb.0"); clk_register_clkdev(clk[hclk], "mshc", NULL); clk_register_clkdev(clk[per3], "ssi", NULL); - clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0"); + clk_register_clkdev(clk[clk32], NULL, "imx1-rtc.0"); clk_register_clkdev(clk[clko], "clko", NULL); mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT); diff --git a/trunk/arch/arm/mach-imx/clk-imx21.c b/trunk/arch/arm/mach-imx/clk-imx21.c index cf65148bc519..d7ed66091a2a 100644 --- a/trunk/arch/arm/mach-imx/clk-imx21.c +++ b/trunk/arch/arm/mach-imx/clk-imx21.c @@ -25,9 +25,9 @@ #include #include -#include -#include #include "clk.h" +#include "common.h" +#include "hardware.h" #define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off))) @@ -156,16 +156,16 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href) clk_register_clkdev(clk[cspi2_ipg_gate], "ipg", "imx21-cspi.1"); clk_register_clkdev(clk[per2], "per", "imx21-cspi.2"); clk_register_clkdev(clk[cspi3_ipg_gate], "ipg", "imx21-cspi.2"); - clk_register_clkdev(clk[per3], "per", "imx-fb.0"); - clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0"); - clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx-fb.0"); + clk_register_clkdev(clk[per3], "per", "imx21-fb.0"); + clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0"); + clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx21-fb.0"); clk_register_clkdev(clk[usb_gate], "per", "imx21-hcd.0"); clk_register_clkdev(clk[usb_hclk_gate], "ahb", "imx21-hcd.0"); - clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand.0"); - clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx-dma"); - clk_register_clkdev(clk[dma_gate], "ipg", "imx-dma"); + clk_register_clkdev(clk[nfc_gate], NULL, "imx21-nand.0"); + clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx21-dma"); + clk_register_clkdev(clk[dma_gate], "ipg", "imx21-dma"); clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[i2c_gate], NULL, "imx-i2c.0"); + clk_register_clkdev(clk[i2c_gate], NULL, "imx21-i2c.0"); clk_register_clkdev(clk[kpp_gate], NULL, "mxc-keypad"); clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0"); clk_register_clkdev(clk[brom_gate], "brom", NULL); diff --git a/trunk/arch/arm/mach-imx/clk-imx25.c b/trunk/arch/arm/mach-imx/clk-imx25.c index 01e2f843bf2e..b197aa73dc4b 100644 --- a/trunk/arch/arm/mach-imx/clk-imx25.c +++ b/trunk/arch/arm/mach-imx/clk-imx25.c @@ -23,11 +23,14 @@ #include #include #include +#include +#include +#include -#include -#include -#include #include "clk.h" +#include "common.h" +#include "hardware.h" +#include "mx25.h" #define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR) @@ -55,6 +58,8 @@ #define ccm(x) (CRM_BASE + (x)) +static struct clk_onecell_data clk_data; + static const char *cpu_sel_clks[] = { "mpll", "mpll_cpu_3_4", }; static const char *per_sel_clks[] = { "ahb", "upll", }; @@ -64,24 +69,30 @@ enum mx25_clks { per7_sel, per8_sel, per9_sel, per10_sel, per11_sel, per12_sel, per13_sel, per14_sel, per15_sel, per0, per1, per2, per3, per4, per5, per6, per7, per8, per9, per10, per11, per12, per13, per14, per15, - csi_ipg_per, esdhc1_ipg_per, esdhc2_ipg_per, gpt_ipg_per, i2c_ipg_per, - lcdc_ipg_per, nfc_ipg_per, ssi1_ipg_per, ssi2_ipg_per, uart_ipg_per, - csi_ahb, esdhc1_ahb, esdhc2_ahb, fec_ahb, lcdc_ahb, sdma_ahb, - usbotg_ahb, can1_ipg, can2_ipg, csi_ipg, cspi1_ipg, cspi2_ipg, - cspi3_ipg, dryice_ipg, esdhc1_ipg, esdhc2_ipg, fec_ipg, iim_ipg, - kpp_ipg, lcdc_ipg, pwm1_ipg, pwm2_ipg, pwm3_ipg, pwm4_ipg, sdma_ipg, - ssi1_ipg, ssi2_ipg, tsc_ipg, uart1_ipg, uart2_ipg, uart3_ipg, - uart4_ipg, uart5_ipg, wdt_ipg, clk_max + csi_ipg_per, epit_ipg_per, esai_ipg_per, esdhc1_ipg_per, esdhc2_ipg_per, + gpt_ipg_per, i2c_ipg_per, lcdc_ipg_per, nfc_ipg_per, owire_ipg_per, + pwm_ipg_per, sim1_ipg_per, sim2_ipg_per, ssi1_ipg_per, ssi2_ipg_per, + uart_ipg_per, ata_ahb, reserved1, csi_ahb, emi_ahb, esai_ahb, esdhc1_ahb, + esdhc2_ahb, fec_ahb, lcdc_ahb, rtic_ahb, sdma_ahb, slcdc_ahb, usbotg_ahb, + reserved2, reserved3, reserved4, reserved5, can1_ipg, can2_ipg, csi_ipg, + cspi1_ipg, cspi2_ipg, cspi3_ipg, dryice_ipg, ect_ipg, epit1_ipg, epit2_ipg, + reserved6, esdhc1_ipg, esdhc2_ipg, fec_ipg, reserved7, reserved8, reserved9, + gpt1_ipg, gpt2_ipg, gpt3_ipg, gpt4_ipg, reserved10, reserved11, reserved12, + iim_ipg, reserved13, reserved14, kpp_ipg, lcdc_ipg, reserved15, pwm1_ipg, + pwm2_ipg, pwm3_ipg, pwm4_ipg, rngb_ipg, reserved16, scc_ipg, sdma_ipg, + sim1_ipg, sim2_ipg, slcdc_ipg, spba_ipg, ssi1_ipg, ssi2_ipg, tsc_ipg, + uart1_ipg, uart2_ipg, uart3_ipg, uart4_ipg, uart5_ipg, reserved17, + wdt_ipg, clk_max }; static struct clk *clk[clk_max]; -int __init mx25_clocks_init(void) +static int __init __mx25_clocks_init(unsigned long osc_rate) { int i; clk[dummy] = imx_clk_fixed("dummy", 0); - clk[osc] = imx_clk_fixed("osc", 24000000); + clk[osc] = imx_clk_fixed("osc", osc_rate); clk[mpll] = imx_clk_pllv1("mpll", "osc", ccm(CCM_MPCTL)); clk[upll] = imx_clk_pllv1("upll", "osc", ccm(CCM_UPCTL)); clk[mpll_cpu_3_4] = imx_clk_fixed_factor("mpll_cpu_3_4", "mpll", 3, 4); @@ -123,22 +134,36 @@ int __init mx25_clocks_init(void) clk[per14] = imx_clk_divider("per14", "per14_sel", ccm(CCM_PCDR3), 16, 6); clk[per15] = imx_clk_divider("per15", "per15_sel", ccm(CCM_PCDR3), 24, 6); clk[csi_ipg_per] = imx_clk_gate("csi_ipg_per", "per0", ccm(CCM_CGCR0), 0); + clk[epit_ipg_per] = imx_clk_gate("epit_ipg_per", "per1", ccm(CCM_CGCR0), 1); + clk[esai_ipg_per] = imx_clk_gate("esai_ipg_per", "per2", ccm(CCM_CGCR0), 2); clk[esdhc1_ipg_per] = imx_clk_gate("esdhc1_ipg_per", "per3", ccm(CCM_CGCR0), 3); clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4); clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5); clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6); clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", ccm(CCM_CGCR0), 7); clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "per8", ccm(CCM_CGCR0), 8); + clk[owire_ipg_per] = imx_clk_gate("owire_ipg_per", "per9", ccm(CCM_CGCR0), 9); + clk[pwm_ipg_per] = imx_clk_gate("pwm_ipg_per", "per10", ccm(CCM_CGCR0), 10); + clk[sim1_ipg_per] = imx_clk_gate("sim1_ipg_per", "per11", ccm(CCM_CGCR0), 11); + clk[sim2_ipg_per] = imx_clk_gate("sim2_ipg_per", "per12", ccm(CCM_CGCR0), 12); clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13); clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14); clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15); + clk[ata_ahb] = imx_clk_gate("ata_ahb", "ahb", ccm(CCM_CGCR0), 16); + /* CCM_CGCR0(17): reserved */ clk[csi_ahb] = imx_clk_gate("csi_ahb", "ahb", ccm(CCM_CGCR0), 18); + clk[emi_ahb] = imx_clk_gate("emi_ahb", "ahb", ccm(CCM_CGCR0), 19); + clk[esai_ahb] = imx_clk_gate("esai_ahb", "ahb", ccm(CCM_CGCR0), 20); clk[esdhc1_ahb] = imx_clk_gate("esdhc1_ahb", "ahb", ccm(CCM_CGCR0), 21); clk[esdhc2_ahb] = imx_clk_gate("esdhc2_ahb", "ahb", ccm(CCM_CGCR0), 22); clk[fec_ahb] = imx_clk_gate("fec_ahb", "ahb", ccm(CCM_CGCR0), 23); clk[lcdc_ahb] = imx_clk_gate("lcdc_ahb", "ahb", ccm(CCM_CGCR0), 24); + clk[rtic_ahb] = imx_clk_gate("rtic_ahb", "ahb", ccm(CCM_CGCR0), 25); clk[sdma_ahb] = imx_clk_gate("sdma_ahb", "ahb", ccm(CCM_CGCR0), 26); + clk[slcdc_ahb] = imx_clk_gate("slcdc_ahb", "ahb", ccm(CCM_CGCR0), 27); clk[usbotg_ahb] = imx_clk_gate("usbotg_ahb", "ahb", ccm(CCM_CGCR0), 28); + /* CCM_CGCR0(29-31): reserved */ + /* CCM_CGCR1(0): reserved in datasheet, used as audmux in FSL kernel */ clk[can1_ipg] = imx_clk_gate("can1_ipg", "ipg", ccm(CCM_CGCR1), 2); clk[can2_ipg] = imx_clk_gate("can2_ipg", "ipg", ccm(CCM_CGCR1), 3); clk[csi_ipg] = imx_clk_gate("csi_ipg", "ipg", ccm(CCM_CGCR1), 4); @@ -146,17 +171,41 @@ int __init mx25_clocks_init(void) clk[cspi2_ipg] = imx_clk_gate("cspi2_ipg", "ipg", ccm(CCM_CGCR1), 6); clk[cspi3_ipg] = imx_clk_gate("cspi3_ipg", "ipg", ccm(CCM_CGCR1), 7); clk[dryice_ipg] = imx_clk_gate("dryice_ipg", "ipg", ccm(CCM_CGCR1), 8); + clk[ect_ipg] = imx_clk_gate("ect_ipg", "ipg", ccm(CCM_CGCR1), 9); + clk[epit1_ipg] = imx_clk_gate("epit1_ipg", "ipg", ccm(CCM_CGCR1), 10); + clk[epit2_ipg] = imx_clk_gate("epit2_ipg", "ipg", ccm(CCM_CGCR1), 11); + /* CCM_CGCR1(12): reserved in datasheet, used as esai in FSL kernel */ clk[esdhc1_ipg] = imx_clk_gate("esdhc1_ipg", "ipg", ccm(CCM_CGCR1), 13); clk[esdhc2_ipg] = imx_clk_gate("esdhc2_ipg", "ipg", ccm(CCM_CGCR1), 14); clk[fec_ipg] = imx_clk_gate("fec_ipg", "ipg", ccm(CCM_CGCR1), 15); + /* CCM_CGCR1(16): reserved in datasheet, used as gpio1 in FSL kernel */ + /* CCM_CGCR1(17): reserved in datasheet, used as gpio2 in FSL kernel */ + /* CCM_CGCR1(18): reserved in datasheet, used as gpio3 in FSL kernel */ + clk[gpt1_ipg] = imx_clk_gate("gpt1_ipg", "ipg", ccm(CCM_CGCR1), 19); + clk[gpt2_ipg] = imx_clk_gate("gpt2_ipg", "ipg", ccm(CCM_CGCR1), 20); + clk[gpt3_ipg] = imx_clk_gate("gpt3_ipg", "ipg", ccm(CCM_CGCR1), 21); + clk[gpt4_ipg] = imx_clk_gate("gpt4_ipg", "ipg", ccm(CCM_CGCR1), 22); + /* CCM_CGCR1(23): reserved in datasheet, used as i2c1 in FSL kernel */ + /* CCM_CGCR1(24): reserved in datasheet, used as i2c2 in FSL kernel */ + /* CCM_CGCR1(25): reserved in datasheet, used as i2c3 in FSL kernel */ clk[iim_ipg] = imx_clk_gate("iim_ipg", "ipg", ccm(CCM_CGCR1), 26); + /* CCM_CGCR1(27): reserved in datasheet, used as iomuxc in FSL kernel */ + /* CCM_CGCR1(28): reserved in datasheet, used as kpp in FSL kernel */ clk[kpp_ipg] = imx_clk_gate("kpp_ipg", "ipg", ccm(CCM_CGCR1), 28); clk[lcdc_ipg] = imx_clk_gate("lcdc_ipg", "ipg", ccm(CCM_CGCR1), 29); + /* CCM_CGCR1(30): reserved in datasheet, used as owire in FSL kernel */ clk[pwm1_ipg] = imx_clk_gate("pwm1_ipg", "ipg", ccm(CCM_CGCR1), 31); clk[pwm2_ipg] = imx_clk_gate("pwm2_ipg", "ipg", ccm(CCM_CGCR2), 0); clk[pwm3_ipg] = imx_clk_gate("pwm3_ipg", "ipg", ccm(CCM_CGCR2), 1); clk[pwm4_ipg] = imx_clk_gate("pwm4_ipg", "ipg", ccm(CCM_CGCR2), 2); + clk[rngb_ipg] = imx_clk_gate("rngb_ipg", "ipg", ccm(CCM_CGCR2), 3); + /* CCM_CGCR2(4): reserved in datasheet, used as rtic in FSL kernel */ + clk[scc_ipg] = imx_clk_gate("scc_ipg", "ipg", ccm(CCM_CGCR2), 5); clk[sdma_ipg] = imx_clk_gate("sdma_ipg", "ipg", ccm(CCM_CGCR2), 6); + clk[sim1_ipg] = imx_clk_gate("sim1_ipg", "ipg", ccm(CCM_CGCR2), 7); + clk[sim2_ipg] = imx_clk_gate("sim2_ipg", "ipg", ccm(CCM_CGCR2), 8); + clk[slcdc_ipg] = imx_clk_gate("slcdc_ipg", "ipg", ccm(CCM_CGCR2), 9); + clk[spba_ipg] = imx_clk_gate("spba_ipg", "ipg", ccm(CCM_CGCR2), 10); clk[ssi1_ipg] = imx_clk_gate("ssi1_ipg", "ipg", ccm(CCM_CGCR2), 11); clk[ssi2_ipg] = imx_clk_gate("ssi2_ipg", "ipg", ccm(CCM_CGCR2), 12); clk[tsc_ipg] = imx_clk_gate("tsc_ipg", "ipg", ccm(CCM_CGCR2), 13); @@ -165,6 +214,7 @@ int __init mx25_clocks_init(void) clk[uart3_ipg] = imx_clk_gate("uart3_ipg", "ipg", ccm(CCM_CGCR2), 16); clk[uart4_ipg] = imx_clk_gate("uart4_ipg", "ipg", ccm(CCM_CGCR2), 17); clk[uart5_ipg] = imx_clk_gate("uart5_ipg", "ipg", ccm(CCM_CGCR2), 18); + /* CCM_CGCR2(19): reserved in datasheet, but used as wdt in FSL kernel */ clk[wdt_ipg] = imx_clk_gate("wdt_ipg", "ipg", ccm(CCM_CGCR2), 19); for (i = 0; i < ARRAY_SIZE(clk); i++) @@ -172,6 +222,18 @@ int __init mx25_clocks_init(void) pr_err("i.MX25 clk %d: register failed with %ld\n", i, PTR_ERR(clk[i])); + clk_prepare_enable(clk[emi_ahb]); + + clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); + clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); + + return 0; +} + +int __init mx25_clocks_init(void) +{ + __mx25_clocks_init(24000000); + /* i.mx25 has the i.mx21 type uart */ clk_register_clkdev(clk[uart1_ipg], "ipg", "imx21-uart.0"); clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.0"); @@ -183,8 +245,6 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.3"); clk_register_clkdev(clk[uart5_ipg], "ipg", "imx21-uart.4"); clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.4"); - clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); - clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0"); clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.0"); clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0"); @@ -197,7 +257,7 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc"); clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc"); clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc"); - clk_register_clkdev(clk[nfc_ipg_per], NULL, "mxc_nand.0"); + clk_register_clkdev(clk[nfc_ipg_per], NULL, "imx25-nand.0"); /* i.mx25 has the i.mx35 type cspi */ clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0"); clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1"); @@ -212,15 +272,15 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[per10], "per", "mxc_pwm.3"); clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad"); clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc"); - clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0"); - clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.1"); - clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.2"); + clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.0"); + clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.1"); + clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.2"); clk_register_clkdev(clk[fec_ipg], "ipg", "imx25-fec.0"); clk_register_clkdev(clk[fec_ahb], "ahb", "imx25-fec.0"); clk_register_clkdev(clk[dryice_ipg], NULL, "imxdi_rtc.0"); - clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx-fb.0"); - clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0"); - clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0"); + clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx21-fb.0"); + clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx21-fb.0"); + clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx21-fb.0"); clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0"); clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0"); clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1"); @@ -230,9 +290,9 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[esdhc2_ipg_per], "per", "sdhci-esdhc-imx25.1"); clk_register_clkdev(clk[esdhc2_ipg], "ipg", "sdhci-esdhc-imx25.1"); clk_register_clkdev(clk[esdhc2_ahb], "ahb", "sdhci-esdhc-imx25.1"); - clk_register_clkdev(clk[csi_ipg_per], "per", "mx2-camera.0"); - clk_register_clkdev(clk[csi_ipg], "ipg", "mx2-camera.0"); - clk_register_clkdev(clk[csi_ahb], "ahb", "mx2-camera.0"); + clk_register_clkdev(clk[csi_ipg_per], "per", "imx25-camera.0"); + clk_register_clkdev(clk[csi_ipg], "ipg", "imx25-camera.0"); + clk_register_clkdev(clk[csi_ahb], "ahb", "imx25-camera.0"); clk_register_clkdev(clk[dummy], "audmux", NULL); clk_register_clkdev(clk[can1_ipg], NULL, "flexcan.0"); clk_register_clkdev(clk[can2_ipg], NULL, "flexcan.1"); @@ -242,5 +302,40 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[iim_ipg], "iim", NULL); mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1); + + return 0; +} + +int __init mx25_clocks_init_dt(void) +{ + struct device_node *np; + void __iomem *base; + int irq; + unsigned long osc_rate = 24000000; + + /* retrieve the freqency of fixed clocks from device tree */ + for_each_compatible_node(np, NULL, "fixed-clock") { + u32 rate; + if (of_property_read_u32(np, "clock-frequency", &rate)) + continue; + + if (of_device_is_compatible(np, "fsl,imx-osc")) + osc_rate = rate; + } + + np = of_find_compatible_node(NULL, NULL, "fsl,imx25-ccm"); + clk_data.clks = clk; + clk_data.clk_num = ARRAY_SIZE(clk); + of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); + + __mx25_clocks_init(osc_rate); + + np = of_find_compatible_node(NULL, NULL, "fsl,imx25-gpt"); + base = of_iomap(np, 0); + WARN_ON(!base); + irq = irq_of_parse_and_map(np, 0); + + mxc_timer_init(base, irq); + return 0; } diff --git a/trunk/arch/arm/mach-imx/clk-imx27.c b/trunk/arch/arm/mach-imx/clk-imx27.c index 366e5d59d886..585ab256c58f 100644 --- a/trunk/arch/arm/mach-imx/clk-imx27.c +++ b/trunk/arch/arm/mach-imx/clk-imx27.c @@ -6,9 +6,9 @@ #include #include -#include -#include #include "clk.h" +#include "common.h" +#include "hardware.h" #define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off))) @@ -211,19 +211,19 @@ int __init mx27_clocks_init(unsigned long fref) clk_register_clkdev(clk[gpt6_ipg_gate], "ipg", "imx-gpt.5"); clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.5"); clk_register_clkdev(clk[pwm_ipg_gate], NULL, "mxc_pwm.0"); - clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.0"); - clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "mxc-mmc.0"); - clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.1"); - clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.1"); - clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.2"); - clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.2"); + clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.0"); + clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "imx21-mmc.0"); + clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.1"); + clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.1"); + clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.2"); + clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.2"); clk_register_clkdev(clk[cspi1_ipg_gate], NULL, "imx27-cspi.0"); clk_register_clkdev(clk[cspi2_ipg_gate], NULL, "imx27-cspi.1"); clk_register_clkdev(clk[cspi3_ipg_gate], NULL, "imx27-cspi.2"); - clk_register_clkdev(clk[per3_gate], "per", "imx-fb.0"); - clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0"); - clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0"); - clk_register_clkdev(clk[csi_ahb_gate], "ahb", "mx2-camera.0"); + clk_register_clkdev(clk[per3_gate], "per", "imx21-fb.0"); + clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0"); + clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0"); + clk_register_clkdev(clk[csi_ahb_gate], "ahb", "imx27-camera.0"); clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc"); clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc"); clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc"); @@ -238,27 +238,27 @@ int __init mx27_clocks_init(unsigned long fref) clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.2"); clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1"); - clk_register_clkdev(clk[nfc_baud_gate], NULL, "mxc_nand.0"); + clk_register_clkdev(clk[nfc_baud_gate], NULL, "imx27-nand.0"); clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0"); clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0"); - clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx-dma"); - clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx-dma"); + clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx27-dma"); + clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx27-dma"); clk_register_clkdev(clk[fec_ipg_gate], "ipg", "imx27-fec.0"); clk_register_clkdev(clk[fec_ahb_gate], "ahb", "imx27-fec.0"); clk_register_clkdev(clk[wdog_ipg_gate], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx-i2c.0"); - clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx-i2c.1"); + clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx21-i2c.0"); + clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx21-i2c.1"); clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0"); clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad"); - clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "mx2-camera.0"); - clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "mx2-camera.0"); + clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "imx27-camera.0"); + clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "imx27-camera.0"); clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0"); clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0"); clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL); clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL); clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL); clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL); - clk_register_clkdev(clk[rtc_ipg_gate], NULL, "mxc_rtc"); + clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc"); clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL); clk_register_clkdev(clk[cpu_div], "cpu", NULL); clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL); diff --git a/trunk/arch/arm/mach-imx/clk-imx31.c b/trunk/arch/arm/mach-imx/clk-imx31.c index 1253af2d9971..8be64e0a4ace 100644 --- a/trunk/arch/arm/mach-imx/clk-imx31.c +++ b/trunk/arch/arm/mach-imx/clk-imx31.c @@ -22,12 +22,11 @@ #include #include -#include -#include -#include - #include "clk.h" +#include "common.h" #include "crmregs-imx3.h" +#include "hardware.h" +#include "mx31.h" static const char *mcu_main_sel[] = { "spll", "mpll", }; static const char *per_sel[] = { "per_div", "ipg", }; @@ -124,10 +123,10 @@ int __init mx31_clocks_init(unsigned long fref) clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2"); clk_register_clkdev(clk[pwm_gate], "pwm", NULL); clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[rtc_gate], NULL, "mxc_rtc"); + clk_register_clkdev(clk[rtc_gate], NULL, "imx21-rtc"); clk_register_clkdev(clk[epit1_gate], "epit", NULL); clk_register_clkdev(clk[epit2_gate], "epit", NULL); - clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0"); + clk_register_clkdev(clk[nfc], NULL, "imx27-nand.0"); clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad"); @@ -155,12 +154,12 @@ int __init mx31_clocks_init(unsigned long fref) clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3"); clk_register_clkdev(clk[uart5_gate], "per", "imx21-uart.4"); clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4"); - clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0"); - clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1"); - clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2"); + clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0"); + clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1"); + clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2"); clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0"); - clk_register_clkdev(clk[sdhc1_gate], NULL, "mxc-mmc.0"); - clk_register_clkdev(clk[sdhc2_gate], NULL, "mxc-mmc.1"); + clk_register_clkdev(clk[sdhc1_gate], NULL, "imx31-mmc.0"); + clk_register_clkdev(clk[sdhc2_gate], NULL, "imx31-mmc.1"); clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0"); clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1"); clk_register_clkdev(clk[firi_gate], "firi", NULL); diff --git a/trunk/arch/arm/mach-imx/clk-imx35.c b/trunk/arch/arm/mach-imx/clk-imx35.c index 177259b523cd..66f3d65ea275 100644 --- a/trunk/arch/arm/mach-imx/clk-imx35.c +++ b/trunk/arch/arm/mach-imx/clk-imx35.c @@ -14,11 +14,10 @@ #include #include -#include -#include - #include "crmregs-imx3.h" #include "clk.h" +#include "common.h" +#include "hardware.h" struct arm_ahb_div { unsigned char arm, ahb, sel; @@ -226,9 +225,9 @@ int __init mx35_clocks_init() clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0"); clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0"); clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); - clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0"); - clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1"); - clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2"); + clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0"); + clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1"); + clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2"); clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad"); @@ -256,7 +255,7 @@ int __init mx35_clocks_init() clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc"); clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc"); clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[nfc_div], NULL, "mxc_nand.0"); + clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0"); clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0"); clk_prepare_enable(clk[spba_gate]); diff --git a/trunk/arch/arm/mach-imx/clk-imx51-imx53.c b/trunk/arch/arm/mach-imx/clk-imx51-imx53.c index a0bf84803eac..abb71f6b4d60 100644 --- a/trunk/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/trunk/arch/arm/mach-imx/clk-imx51-imx53.c @@ -14,11 +14,10 @@ #include #include -#include -#include - #include "crm-regs-imx5.h" #include "clk.h" +#include "common.h" +#include "hardware.h" /* Low-power Audio Playback Mode clock */ static const char *lp_apm_sel[] = { "osc", }; @@ -258,8 +257,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, clk_register_clkdev(clk[cspi_ipg_gate], NULL, "imx35-cspi.2"); clk_register_clkdev(clk[pwm1_ipg_gate], "pwm", "mxc_pwm.0"); clk_register_clkdev(clk[pwm2_ipg_gate], "pwm", "mxc_pwm.1"); - clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0"); - clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1"); + clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0"); + clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1"); clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.0"); clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.0"); clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.0"); @@ -272,7 +271,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, clk_register_clkdev(clk[usboh3_per_gate], "per", "fsl-usb2-udc"); clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc"); clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc"); - clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand"); + clk_register_clkdev(clk[nfc_gate], NULL, "imx51-nand"); clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1"); clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2"); @@ -345,7 +344,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2); - clk_register_clkdev(clk[hsi2c_gate], NULL, "imx-i2c.2"); + clk_register_clkdev(clk[hsi2c_gate], NULL, "imx21-i2c.2"); clk_register_clkdev(clk[mx51_mipi], "mipi_hsp", NULL); clk_register_clkdev(clk[vpu_gate], NULL, "imx51-vpu.0"); clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0"); @@ -440,7 +439,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2); clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0"); - clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2"); + clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2"); clk_register_clkdev(clk[fec_gate], NULL, "imx25-fec.0"); clk_register_clkdev(clk[ipu_gate], "bus", "imx53-ipu"); clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx53-ipu"); diff --git a/trunk/arch/arm/mach-imx/clk-imx6q.c b/trunk/arch/arm/mach-imx/clk-imx6q.c index 3ec242f3341e..5f9f5919dd74 100644 --- a/trunk/arch/arm/mach-imx/clk-imx6q.c +++ b/trunk/arch/arm/mach-imx/clk-imx6q.c @@ -19,8 +19,9 @@ #include #include #include -#include + #include "clk.h" +#include "common.h" #define CCGR0 0x68 #define CCGR1 0x6c @@ -405,6 +406,7 @@ int __init mx6q_clocks_init(void) clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL); clk_register_clkdev(clk[ahb], "ahb", NULL); clk_register_clkdev(clk[cko1], "cko1", NULL); + clk_register_clkdev(clk[arm], NULL, "cpu0"); /* * The gpmi needs 100MHz frequency in the EDO/Sync mode, diff --git a/trunk/arch/arm/mach-imx/clk-pllv1.c b/trunk/arch/arm/mach-imx/clk-pllv1.c index 02be73178912..abff350ba24c 100644 --- a/trunk/arch/arm/mach-imx/clk-pllv1.c +++ b/trunk/arch/arm/mach-imx/clk-pllv1.c @@ -4,10 +4,10 @@ #include #include #include -#include -#include #include "clk.h" +#include "common.h" +#include "hardware.h" /** * pll v1 diff --git a/trunk/arch/arm/plat-mxc/include/mach/common.h b/trunk/arch/arm/mach-imx/common.h similarity index 98% rename from trunk/arch/arm/plat-mxc/include/mach/common.h rename to trunk/arch/arm/mach-imx/common.h index ead901814c0d..7191ab4434e5 100644 --- a/trunk/arch/arm/plat-mxc/include/mach/common.h +++ b/trunk/arch/arm/mach-imx/common.h @@ -66,6 +66,7 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc, unsigned long ckih1, unsigned long ckih2); extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, unsigned long ckih1, unsigned long ckih2); +extern int mx25_clocks_init_dt(void); extern int mx27_clocks_init_dt(void); extern int mx31_clocks_init_dt(void); extern int mx51_clocks_init_dt(void); @@ -79,6 +80,7 @@ extern void mxc_arch_reset_init(void __iomem *); extern int mx53_revision(void); extern int mx53_display_revision(void); extern void imx_set_aips(void __iomem *); +extern int mxc_device_init(void); enum mxc_cpu_pwr_mode { WAIT_CLOCKED, /* wfi only */ diff --git a/trunk/arch/arm/mach-imx/cpu-imx25.c b/trunk/arch/arm/mach-imx/cpu-imx25.c index 6914bcbf84e4..96ec64b5ff7d 100644 --- a/trunk/arch/arm/mach-imx/cpu-imx25.c +++ b/trunk/arch/arm/mach-imx/cpu-imx25.c @@ -11,8 +11,9 @@ */ #include #include -#include -#include + +#include "iim.h" +#include "hardware.h" static int mx25_cpu_rev = -1; diff --git a/trunk/arch/arm/mach-imx/cpu-imx27.c b/trunk/arch/arm/mach-imx/cpu-imx27.c index ff38e1505f67..fe8d36f7e30e 100644 --- a/trunk/arch/arm/mach-imx/cpu-imx27.c +++ b/trunk/arch/arm/mach-imx/cpu-imx27.c @@ -24,7 +24,7 @@ #include #include -#include +#include "hardware.h" static int mx27_cpu_rev = -1; static int mx27_cpu_partnumber; diff --git a/trunk/arch/arm/mach-imx/cpu-imx31.c b/trunk/arch/arm/mach-imx/cpu-imx31.c index 3f2345f0cdaf..fde1860a2521 100644 --- a/trunk/arch/arm/mach-imx/cpu-imx31.c +++ b/trunk/arch/arm/mach-imx/cpu-imx31.c @@ -11,9 +11,10 @@ #include #include -#include -#include -#include + +#include "common.h" +#include "hardware.h" +#include "iim.h" static int mx31_cpu_rev = -1; diff --git a/trunk/arch/arm/mach-imx/cpu-imx35.c b/trunk/arch/arm/mach-imx/cpu-imx35.c index 846e46eb8cbf..ec3aaa098c17 100644 --- a/trunk/arch/arm/mach-imx/cpu-imx35.c +++ b/trunk/arch/arm/mach-imx/cpu-imx35.c @@ -10,8 +10,9 @@ */ #include #include -#include -#include + +#include "hardware.h" +#include "iim.h" static int mx35_cpu_rev = -1; diff --git a/trunk/arch/arm/mach-imx/cpu-imx5.c b/trunk/arch/arm/mach-imx/cpu-imx5.c index 8eb15a2fcaf9..d88760014ff9 100644 --- a/trunk/arch/arm/mach-imx/cpu-imx5.c +++ b/trunk/arch/arm/mach-imx/cpu-imx5.c @@ -15,9 +15,10 @@ #include #include #include -#include #include +#include "hardware.h" + static int mx5_cpu_rev = -1; #define IIM_SREV 0x24 diff --git a/trunk/arch/arm/plat-mxc/cpu.c b/trunk/arch/arm/mach-imx/cpu.c similarity index 97% rename from trunk/arch/arm/plat-mxc/cpu.c rename to trunk/arch/arm/mach-imx/cpu.c index 220dd6f93126..03fcbd082593 100644 --- a/trunk/arch/arm/plat-mxc/cpu.c +++ b/trunk/arch/arm/mach-imx/cpu.c @@ -1,7 +1,8 @@ #include #include -#include + +#include "hardware.h" unsigned int __mxc_cpu_type; EXPORT_SYMBOL(__mxc_cpu_type); diff --git a/trunk/arch/arm/mach-imx/cpu_op-mx51.c b/trunk/arch/arm/mach-imx/cpu_op-mx51.c index 7b92cd6da6d3..b9ef692b61a2 100644 --- a/trunk/arch/arm/mach-imx/cpu_op-mx51.c +++ b/trunk/arch/arm/mach-imx/cpu_op-mx51.c @@ -13,9 +13,10 @@ #include #include -#include #include +#include "hardware.h" + static struct cpu_op mx51_cpu_op[] = { { .cpu_rate = 160000000,}, diff --git a/trunk/arch/arm/plat-mxc/cpufreq.c b/trunk/arch/arm/mach-imx/cpufreq.c similarity index 99% rename from trunk/arch/arm/plat-mxc/cpufreq.c rename to trunk/arch/arm/mach-imx/cpufreq.c index b5b6f8083130..36e8b3994470 100644 --- a/trunk/arch/arm/plat-mxc/cpufreq.c +++ b/trunk/arch/arm/mach-imx/cpufreq.c @@ -22,7 +22,8 @@ #include #include #include -#include + +#include "hardware.h" #define CLK32_FREQ 32768 #define NANOSECOND (1000 * 1000 * 1000) diff --git a/trunk/arch/arm/plat-mxc/cpuidle.c b/trunk/arch/arm/mach-imx/cpuidle.c similarity index 100% rename from trunk/arch/arm/plat-mxc/cpuidle.c rename to trunk/arch/arm/mach-imx/cpuidle.c diff --git a/trunk/arch/arm/plat-mxc/include/mach/cpuidle.h b/trunk/arch/arm/mach-imx/cpuidle.h similarity index 100% rename from trunk/arch/arm/plat-mxc/include/mach/cpuidle.h rename to trunk/arch/arm/mach-imx/cpuidle.h diff --git a/trunk/arch/arm/mach-imx/devices-imx1.h b/trunk/arch/arm/mach-imx/devices-imx1.h index 3aad1e70de96..f9b5afc6bcd1 100644 --- a/trunk/arch/arm/mach-imx/devices-imx1.h +++ b/trunk/arch/arm/mach-imx/devices-imx1.h @@ -6,8 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "devices/devices-common.h" extern const struct imx_imx_fb_data imx1_imx_fb_data; #define imx1_add_imx_fb(pdata) \ diff --git a/trunk/arch/arm/mach-imx/devices-imx21.h b/trunk/arch/arm/mach-imx/devices-imx21.h index 93ece55f75df..bd9393280159 100644 --- a/trunk/arch/arm/mach-imx/devices-imx21.h +++ b/trunk/arch/arm/mach-imx/devices-imx21.h @@ -6,8 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "devices/devices-common.h" extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data; #define imx21_add_imx21_hcd(pdata) \ diff --git a/trunk/arch/arm/mach-imx/devices-imx25.h b/trunk/arch/arm/mach-imx/devices-imx25.h index f8e03dd1f116..0d2922bc575c 100644 --- a/trunk/arch/arm/mach-imx/devices-imx25.h +++ b/trunk/arch/arm/mach-imx/devices-imx25.h @@ -6,8 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "devices/devices-common.h" extern const struct imx_fec_data imx25_fec_data; #define imx25_add_fec(pdata) \ diff --git a/trunk/arch/arm/mach-imx/devices-imx27.h b/trunk/arch/arm/mach-imx/devices-imx27.h index 04822932cdd1..8a1ad7972d4c 100644 --- a/trunk/arch/arm/mach-imx/devices-imx27.h +++ b/trunk/arch/arm/mach-imx/devices-imx27.h @@ -6,8 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "devices/devices-common.h" extern const struct imx_fec_data imx27_fec_data; #define imx27_add_fec(pdata) \ diff --git a/trunk/arch/arm/mach-imx/devices-imx31.h b/trunk/arch/arm/mach-imx/devices-imx31.h index 8b2ceb45bb83..e8d1611bbc8e 100644 --- a/trunk/arch/arm/mach-imx/devices-imx31.h +++ b/trunk/arch/arm/mach-imx/devices-imx31.h @@ -6,8 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "devices/devices-common.h" extern const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data; #define imx31_add_fsl_usb2_udc(pdata) \ diff --git a/trunk/arch/arm/mach-imx/devices-imx35.h b/trunk/arch/arm/mach-imx/devices-imx35.h index c3e9f206ac2b..e2675f1b141c 100644 --- a/trunk/arch/arm/mach-imx/devices-imx35.h +++ b/trunk/arch/arm/mach-imx/devices-imx35.h @@ -6,8 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "devices/devices-common.h" extern const struct imx_fec_data imx35_fec_data; #define imx35_add_fec(pdata) \ diff --git a/trunk/arch/arm/mach-imx/devices-imx50.h b/trunk/arch/arm/mach-imx/devices-imx50.h index 7216667eaafc..2c290391f298 100644 --- a/trunk/arch/arm/mach-imx/devices-imx50.h +++ b/trunk/arch/arm/mach-imx/devices-imx50.h @@ -18,8 +18,7 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. */ -#include -#include +#include "devices/devices-common.h" extern const struct imx_imx_uart_1irq_data imx50_imx_uart_data[]; #define imx50_add_imx_uart(id, pdata) \ diff --git a/trunk/arch/arm/mach-imx/devices-imx51.h b/trunk/arch/arm/mach-imx/devices-imx51.h index 9f1718725195..deee5baee88c 100644 --- a/trunk/arch/arm/mach-imx/devices-imx51.h +++ b/trunk/arch/arm/mach-imx/devices-imx51.h @@ -6,8 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "devices/devices-common.h" extern const struct imx_fec_data imx51_fec_data; #define imx51_add_fec(pdata) \ diff --git a/trunk/arch/arm/plat-mxc/devices/Kconfig b/trunk/arch/arm/mach-imx/devices/Kconfig similarity index 100% rename from trunk/arch/arm/plat-mxc/devices/Kconfig rename to trunk/arch/arm/mach-imx/devices/Kconfig diff --git a/trunk/arch/arm/plat-mxc/devices/Makefile b/trunk/arch/arm/mach-imx/devices/Makefile similarity index 98% rename from trunk/arch/arm/plat-mxc/devices/Makefile rename to trunk/arch/arm/mach-imx/devices/Makefile index 76f3195475d0..2abe2a5144d0 100644 --- a/trunk/arch/arm/plat-mxc/devices/Makefile +++ b/trunk/arch/arm/mach-imx/devices/Makefile @@ -1,3 +1,5 @@ +obj-y := devices.o + obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o diff --git a/trunk/arch/arm/plat-mxc/include/mach/devices-common.h b/trunk/arch/arm/mach-imx/devices/devices-common.h similarity index 97% rename from trunk/arch/arm/plat-mxc/include/mach/devices-common.h rename to trunk/arch/arm/mach-imx/devices/devices-common.h index eaf79d220c9a..e4b790b9e2aa 100644 --- a/trunk/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/trunk/arch/arm/mach-imx/devices/devices-common.h @@ -108,6 +108,7 @@ struct platform_device *__init imx_add_imxdi_rtc( #include struct imx_imx_fb_data { + const char *devid; resource_size_t iobase; resource_size_t iosize; resource_size_t irq; @@ -118,6 +119,7 @@ struct platform_device *__init imx_add_imx_fb( #include struct imx_imx_i2c_data { + const char *devid; int id; resource_size_t iobase; resource_size_t iosize; @@ -219,6 +221,7 @@ struct platform_device *__init imx_add_mx1_camera( #include struct imx_mx2_camera_data { + const char *devid; resource_size_t iobasecsi; resource_size_t iosizecsi; resource_size_t irqcsi; @@ -244,6 +247,7 @@ struct platform_device *__init imx_add_mxc_ehci( #include struct imx_mxc_mmc_data { + const char *devid; int id; resource_size_t iobase; resource_size_t iosize; @@ -256,6 +260,7 @@ struct platform_device *__init imx_add_mxc_mmc( #include struct imx_mxc_nand_data { + const char *devid; /* * id is traditionally 0, but -1 is more appropriate. We use -1 for new * machines but don't change existing devices as the nand device usually @@ -290,6 +295,7 @@ struct platform_device *__init imx_add_mxc_pwm( /* mxc_rtc */ struct imx_mxc_rtc_data { + const char *devid; resource_size_t iobase; resource_size_t irq; }; @@ -326,7 +332,8 @@ struct platform_device *__init imx_add_spi_imx( const struct imx_spi_imx_data *data, const struct spi_imx_master *pdata); -struct platform_device *imx_add_imx_dma(void); +struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase, + int irq, int irq_err); struct platform_device *imx_add_imx_sdma(char *name, resource_size_t iobase, int irq, struct sdma_platform_data *pdata); diff --git a/trunk/arch/arm/plat-mxc/devices.c b/trunk/arch/arm/mach-imx/devices/devices.c similarity index 92% rename from trunk/arch/arm/plat-mxc/devices.c rename to trunk/arch/arm/mach-imx/devices/devices.c index 4d55a7a26e98..1b37482407f9 100644 --- a/trunk/arch/arm/plat-mxc/devices.c +++ b/trunk/arch/arm/mach-imx/devices/devices.c @@ -21,7 +21,6 @@ #include #include #include -#include struct device mxc_aips_bus = { .init_name = "mxc_aips", @@ -33,7 +32,7 @@ struct device mxc_ahb_bus = { .parent = &platform_bus, }; -static int __init mxc_device_init(void) +int __init mxc_device_init(void) { int ret; @@ -46,4 +45,3 @@ static int __init mxc_device_init(void) done: return ret; } -core_initcall(mxc_device_init); diff --git a/trunk/arch/arm/plat-mxc/devices/platform-ahci-imx.c b/trunk/arch/arm/mach-imx/devices/platform-ahci-imx.c similarity index 98% rename from trunk/arch/arm/plat-mxc/devices/platform-ahci-imx.c rename to trunk/arch/arm/mach-imx/devices/platform-ahci-imx.c index ade4a1c4e2a3..3d87dd9c284a 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-ahci-imx.c +++ b/trunk/arch/arm/mach-imx/devices/platform-ahci-imx.c @@ -24,8 +24,9 @@ #include #include #include -#include -#include + +#include "../hardware.h" +#include "devices-common.h" #define imx_ahci_imx_data_entry_single(soc, _devid) \ { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-fec.c b/trunk/arch/arm/mach-imx/devices/platform-fec.c similarity index 97% rename from trunk/arch/arm/plat-mxc/devices/platform-fec.c rename to trunk/arch/arm/mach-imx/devices/platform-fec.c index 0bae44e890db..2cb188ad9a0a 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-fec.c +++ b/trunk/arch/arm/mach-imx/devices/platform-fec.c @@ -8,8 +8,9 @@ */ #include #include -#include -#include + +#include "../hardware.h" +#include "devices-common.h" #define imx_fec_data_entry_single(soc, _devid) \ { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-flexcan.c b/trunk/arch/arm/mach-imx/devices/platform-flexcan.c similarity index 96% rename from trunk/arch/arm/plat-mxc/devices/platform-flexcan.c rename to trunk/arch/arm/mach-imx/devices/platform-flexcan.c index 4e8497af2eb1..1078bf0a94ef 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-flexcan.c +++ b/trunk/arch/arm/mach-imx/devices/platform-flexcan.c @@ -5,8 +5,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" #define imx_flexcan_data_entry_single(soc, _id, _hwid, _size) \ { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c b/trunk/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c similarity index 96% rename from trunk/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c rename to trunk/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c index 848038f301fd..37e44398197b 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c +++ b/trunk/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c @@ -7,8 +7,9 @@ * Free Software Foundation. */ #include -#include -#include + +#include "../hardware.h" +#include "devices-common.h" #define imx_fsl_usb2_udc_data_entry_single(soc) \ { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-gpio-mxc.c b/trunk/arch/arm/mach-imx/devices/platform-gpio-mxc.c similarity index 96% rename from trunk/arch/arm/plat-mxc/devices/platform-gpio-mxc.c rename to trunk/arch/arm/mach-imx/devices/platform-gpio-mxc.c index a7919a241032..26483fa94b75 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-gpio-mxc.c +++ b/trunk/arch/arm/mach-imx/devices/platform-gpio-mxc.c @@ -6,7 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include +#include "devices-common.h" struct platform_device *__init mxc_register_gpio(char *name, int id, resource_size_t iobase, resource_size_t iosize, int irq, int irq_high) diff --git a/trunk/arch/arm/plat-mxc/devices/platform-gpio_keys.c b/trunk/arch/arm/mach-imx/devices/platform-gpio_keys.c similarity index 94% rename from trunk/arch/arm/plat-mxc/devices/platform-gpio_keys.c rename to trunk/arch/arm/mach-imx/devices/platform-gpio_keys.c index 1c53a532ea0e..486282539c76 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-gpio_keys.c +++ b/trunk/arch/arm/mach-imx/devices/platform-gpio_keys.c @@ -16,8 +16,9 @@ * Boston, MA 02110-1301, USA. */ #include -#include -#include + +#include "../hardware.h" +#include "devices-common.h" struct platform_device *__init imx_add_gpio_keys( const struct gpio_keys_platform_data *pdata) diff --git a/trunk/arch/arm/plat-mxc/devices/platform-imx-dma.c b/trunk/arch/arm/mach-imx/devices/platform-imx-dma.c similarity index 63% rename from trunk/arch/arm/plat-mxc/devices/platform-imx-dma.c rename to trunk/arch/arm/mach-imx/devices/platform-imx-dma.c index 7fa7e9c92468..ccdb5dc4ddbd 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/trunk/arch/arm/mach-imx/devices/platform-imx-dma.c @@ -6,12 +6,29 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include +#include "devices-common.h" -struct platform_device __init __maybe_unused *imx_add_imx_dma(void) +struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name, + resource_size_t iobase, int irq, int irq_err) { + struct resource res[] = { + { + .start = iobase, + .end = iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = irq, + .end = irq, + .flags = IORESOURCE_IRQ, + }, { + .start = irq_err, + .end = irq_err, + .flags = IORESOURCE_IRQ, + }, + }; + return platform_device_register_resndata(&mxc_ahb_bus, - "imx-dma", -1, NULL, 0, NULL, 0); + name, -1, res, ARRAY_SIZE(res), NULL, 0); } struct platform_device __init __maybe_unused *imx_add_imx_sdma(char *name, diff --git a/trunk/arch/arm/plat-mxc/devices/platform-imx-fb.c b/trunk/arch/arm/mach-imx/devices/platform-imx-fb.c similarity index 79% rename from trunk/arch/arm/plat-mxc/devices/platform-imx-fb.c rename to trunk/arch/arm/mach-imx/devices/platform-imx-fb.c index 2b0b5e0aa998..10b0ed39f07f 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-imx-fb.c +++ b/trunk/arch/arm/mach-imx/devices/platform-imx-fb.c @@ -7,11 +7,13 @@ * Free Software Foundation. */ #include -#include -#include -#define imx_imx_fb_data_entry_single(soc, _size) \ +#include "../hardware.h" +#include "devices-common.h" + +#define imx_imx_fb_data_entry_single(soc, _devid, _size) \ { \ + .devid = _devid, \ .iobase = soc ## _LCDC_BASE_ADDR, \ .iosize = _size, \ .irq = soc ## _INT_LCDC, \ @@ -19,22 +21,22 @@ #ifdef CONFIG_SOC_IMX1 const struct imx_imx_fb_data imx1_imx_fb_data __initconst = - imx_imx_fb_data_entry_single(MX1, SZ_4K); + imx_imx_fb_data_entry_single(MX1, "imx1-fb", SZ_4K); #endif /* ifdef CONFIG_SOC_IMX1 */ #ifdef CONFIG_SOC_IMX21 const struct imx_imx_fb_data imx21_imx_fb_data __initconst = - imx_imx_fb_data_entry_single(MX21, SZ_4K); + imx_imx_fb_data_entry_single(MX21, "imx21-fb", SZ_4K); #endif /* ifdef CONFIG_SOC_IMX21 */ #ifdef CONFIG_SOC_IMX25 const struct imx_imx_fb_data imx25_imx_fb_data __initconst = - imx_imx_fb_data_entry_single(MX25, SZ_16K); + imx_imx_fb_data_entry_single(MX25, "imx21-fb", SZ_16K); #endif /* ifdef CONFIG_SOC_IMX25 */ #ifdef CONFIG_SOC_IMX27 const struct imx_imx_fb_data imx27_imx_fb_data __initconst = - imx_imx_fb_data_entry_single(MX27, SZ_4K); + imx_imx_fb_data_entry_single(MX27, "imx21-fb", SZ_4K); #endif /* ifdef CONFIG_SOC_IMX27 */ struct platform_device *__init imx_add_imx_fb( diff --git a/trunk/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/trunk/arch/arm/mach-imx/devices/platform-imx-i2c.c similarity index 76% rename from trunk/arch/arm/plat-mxc/devices/platform-imx-i2c.c rename to trunk/arch/arm/mach-imx/devices/platform-imx-i2c.c index 19ad580c0be3..8e30e5703cd2 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-imx-i2c.c +++ b/trunk/arch/arm/mach-imx/devices/platform-imx-i2c.c @@ -6,34 +6,35 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" -#define imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size) \ +#define imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) \ { \ + .devid = _devid, \ .id = _id, \ .iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \ .iosize = _size, \ .irq = soc ## _INT_I2C ## _hwid, \ } -#define imx_imx_i2c_data_entry(soc, _id, _hwid, _size) \ - [_id] = imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size) +#define imx_imx_i2c_data_entry(soc, _devid, _id, _hwid, _size) \ + [_id] = imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) #ifdef CONFIG_SOC_IMX1 const struct imx_imx_i2c_data imx1_imx_i2c_data __initconst = - imx_imx_i2c_data_entry_single(MX1, 0, , SZ_4K); + imx_imx_i2c_data_entry_single(MX1, "imx1-i2c", 0, , SZ_4K); #endif /* ifdef CONFIG_SOC_IMX1 */ #ifdef CONFIG_SOC_IMX21 const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst = - imx_imx_i2c_data_entry_single(MX21, 0, , SZ_4K); + imx_imx_i2c_data_entry_single(MX21, "imx21-i2c", 0, , SZ_4K); #endif /* ifdef CONFIG_SOC_IMX21 */ #ifdef CONFIG_SOC_IMX25 const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = { #define imx25_imx_i2c_data_entry(_id, _hwid) \ - imx_imx_i2c_data_entry(MX25, _id, _hwid, SZ_16K) + imx_imx_i2c_data_entry(MX25, "imx21-i2c", _id, _hwid, SZ_16K) imx25_imx_i2c_data_entry(0, 1), imx25_imx_i2c_data_entry(1, 2), imx25_imx_i2c_data_entry(2, 3), @@ -43,7 +44,7 @@ const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = { #ifdef CONFIG_SOC_IMX27 const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = { #define imx27_imx_i2c_data_entry(_id, _hwid) \ - imx_imx_i2c_data_entry(MX27, _id, _hwid, SZ_4K) + imx_imx_i2c_data_entry(MX27, "imx21-i2c", _id, _hwid, SZ_4K) imx27_imx_i2c_data_entry(0, 1), imx27_imx_i2c_data_entry(1, 2), }; @@ -52,7 +53,7 @@ const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = { #ifdef CONFIG_SOC_IMX31 const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = { #define imx31_imx_i2c_data_entry(_id, _hwid) \ - imx_imx_i2c_data_entry(MX31, _id, _hwid, SZ_4K) + imx_imx_i2c_data_entry(MX31, "imx21-i2c", _id, _hwid, SZ_4K) imx31_imx_i2c_data_entry(0, 1), imx31_imx_i2c_data_entry(1, 2), imx31_imx_i2c_data_entry(2, 3), @@ -62,7 +63,7 @@ const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = { #ifdef CONFIG_SOC_IMX35 const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = { #define imx35_imx_i2c_data_entry(_id, _hwid) \ - imx_imx_i2c_data_entry(MX35, _id, _hwid, SZ_4K) + imx_imx_i2c_data_entry(MX35, "imx21-i2c", _id, _hwid, SZ_4K) imx35_imx_i2c_data_entry(0, 1), imx35_imx_i2c_data_entry(1, 2), imx35_imx_i2c_data_entry(2, 3), @@ -72,7 +73,7 @@ const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = { #ifdef CONFIG_SOC_IMX50 const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = { #define imx50_imx_i2c_data_entry(_id, _hwid) \ - imx_imx_i2c_data_entry(MX50, _id, _hwid, SZ_4K) + imx_imx_i2c_data_entry(MX50, "imx21-i2c", _id, _hwid, SZ_4K) imx50_imx_i2c_data_entry(0, 1), imx50_imx_i2c_data_entry(1, 2), imx50_imx_i2c_data_entry(2, 3), @@ -82,10 +83,11 @@ const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = { #ifdef CONFIG_SOC_IMX51 const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = { #define imx51_imx_i2c_data_entry(_id, _hwid) \ - imx_imx_i2c_data_entry(MX51, _id, _hwid, SZ_4K) + imx_imx_i2c_data_entry(MX51, "imx21-i2c", _id, _hwid, SZ_4K) imx51_imx_i2c_data_entry(0, 1), imx51_imx_i2c_data_entry(1, 2), { + .devid = "imx21-i2c", .id = 2, .iobase = MX51_HSI2C_DMA_BASE_ADDR, .iosize = SZ_16K, @@ -97,7 +99,7 @@ const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = { #ifdef CONFIG_SOC_IMX53 const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = { #define imx53_imx_i2c_data_entry(_id, _hwid) \ - imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K) + imx_imx_i2c_data_entry(MX53, "imx21-i2c", _id, _hwid, SZ_4K) imx53_imx_i2c_data_entry(0, 1), imx53_imx_i2c_data_entry(1, 2), imx53_imx_i2c_data_entry(2, 3), @@ -120,7 +122,7 @@ struct platform_device *__init imx_add_imx_i2c( }, }; - return imx_add_platform_device("imx-i2c", data->id, + return imx_add_platform_device(data->devid, data->id, res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); } diff --git a/trunk/arch/arm/plat-mxc/devices/platform-imx-keypad.c b/trunk/arch/arm/mach-imx/devices/platform-imx-keypad.c similarity index 97% rename from trunk/arch/arm/plat-mxc/devices/platform-imx-keypad.c rename to trunk/arch/arm/mach-imx/devices/platform-imx-keypad.c index 479c3e9f771f..8f22a4c98a4c 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-imx-keypad.c +++ b/trunk/arch/arm/mach-imx/devices/platform-imx-keypad.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" #define imx_imx_keypad_data_entry_single(soc, _size) \ { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/trunk/arch/arm/mach-imx/devices/platform-imx-ssi.c similarity index 98% rename from trunk/arch/arm/plat-mxc/devices/platform-imx-ssi.c rename to trunk/arch/arm/mach-imx/devices/platform-imx-ssi.c index 21c6f30e1017..bfcb8f3dfa8d 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-imx-ssi.c +++ b/trunk/arch/arm/mach-imx/devices/platform-imx-ssi.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" #define imx_imx_ssi_data_entry(soc, _id, _hwid, _size) \ [_id] = { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-imx-uart.c b/trunk/arch/arm/mach-imx/devices/platform-imx-uart.c similarity index 98% rename from trunk/arch/arm/plat-mxc/devices/platform-imx-uart.c rename to trunk/arch/arm/mach-imx/devices/platform-imx-uart.c index d390f00bd294..67bf866a2cb6 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-imx-uart.c +++ b/trunk/arch/arm/mach-imx/devices/platform-imx-uart.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" #define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \ [_id] = { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-imx2-wdt.c b/trunk/arch/arm/mach-imx/devices/platform-imx2-wdt.c similarity index 97% rename from trunk/arch/arm/plat-mxc/devices/platform-imx2-wdt.c rename to trunk/arch/arm/mach-imx/devices/platform-imx2-wdt.c index 5e07ef2bf1c4..ec75d6413686 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-imx2-wdt.c +++ b/trunk/arch/arm/mach-imx/devices/platform-imx2-wdt.c @@ -7,8 +7,9 @@ * Free Software Foundation. */ #include -#include -#include + +#include "../hardware.h" +#include "devices-common.h" #define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) \ { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-imx21-hcd.c b/trunk/arch/arm/mach-imx/devices/platform-imx21-hcd.c similarity index 94% rename from trunk/arch/arm/plat-mxc/devices/platform-imx21-hcd.c rename to trunk/arch/arm/mach-imx/devices/platform-imx21-hcd.c index 5770a42f33bf..30c81616a9a1 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-imx21-hcd.c +++ b/trunk/arch/arm/mach-imx/devices/platform-imx21-hcd.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" #define imx_imx21_hcd_data_entry_single(soc) \ { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-imx27-coda.c b/trunk/arch/arm/mach-imx/devices/platform-imx27-coda.c similarity index 93% rename from trunk/arch/arm/plat-mxc/devices/platform-imx27-coda.c rename to trunk/arch/arm/mach-imx/devices/platform-imx27-coda.c index 8b12aacdf396..25bebc29e546 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-imx27-coda.c +++ b/trunk/arch/arm/mach-imx/devices/platform-imx27-coda.c @@ -7,8 +7,8 @@ * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" #ifdef CONFIG_SOC_IMX27 const struct imx_imx27_coda_data imx27_coda_data __initconst = { diff --git a/trunk/arch/arm/plat-mxc/devices/platform-imx_udc.c b/trunk/arch/arm/mach-imx/devices/platform-imx_udc.c similarity index 96% rename from trunk/arch/arm/plat-mxc/devices/platform-imx_udc.c rename to trunk/arch/arm/mach-imx/devices/platform-imx_udc.c index 6fd675dfce14..5ced7e4e2c71 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-imx_udc.c +++ b/trunk/arch/arm/mach-imx/devices/platform-imx_udc.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" #define imx_imx_udc_data_entry_single(soc, _size) \ { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c b/trunk/arch/arm/mach-imx/devices/platform-imxdi_rtc.c similarity index 94% rename from trunk/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c rename to trunk/arch/arm/mach-imx/devices/platform-imxdi_rtc.c index 805336fdc252..5bb490d556ea 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c +++ b/trunk/arch/arm/mach-imx/devices/platform-imxdi_rtc.c @@ -7,8 +7,9 @@ * Free Software Foundation. */ #include -#include -#include + +#include "../hardware.h" +#include "devices-common.h" #define imx_imxdi_rtc_data_entry_single(soc) \ { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-ipu-core.c b/trunk/arch/arm/mach-imx/devices/platform-ipu-core.c similarity index 98% rename from trunk/arch/arm/plat-mxc/devices/platform-ipu-core.c rename to trunk/arch/arm/mach-imx/devices/platform-ipu-core.c index d1e33cc6f12e..fc4dd7cedc11 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-ipu-core.c +++ b/trunk/arch/arm/mach-imx/devices/platform-ipu-core.c @@ -7,8 +7,9 @@ * Free Software Foundation. */ #include -#include -#include + +#include "../hardware.h" +#include "devices-common.h" #define imx_ipu_core_entry_single(soc) \ { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-mx1-camera.c b/trunk/arch/arm/mach-imx/devices/platform-mx1-camera.c similarity index 94% rename from trunk/arch/arm/plat-mxc/devices/platform-mx1-camera.c rename to trunk/arch/arm/mach-imx/devices/platform-mx1-camera.c index edcc581a30a9..2c6788131080 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-mx1-camera.c +++ b/trunk/arch/arm/mach-imx/devices/platform-mx1-camera.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" #define imx_mx1_camera_data_entry_single(soc, _size) \ { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-mx2-camera.c b/trunk/arch/arm/mach-imx/devices/platform-mx2-camera.c similarity index 83% rename from trunk/arch/arm/plat-mxc/devices/platform-mx2-camera.c rename to trunk/arch/arm/mach-imx/devices/platform-mx2-camera.c index 11eace953a09..f4910160346b 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-mx2-camera.c +++ b/trunk/arch/arm/mach-imx/devices/platform-mx2-camera.c @@ -6,17 +6,19 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" -#define imx_mx2_camera_data_entry_single(soc) \ +#define imx_mx2_camera_data_entry_single(soc, _devid) \ { \ + .devid = _devid, \ .iobasecsi = soc ## _CSI_BASE_ADDR, \ .iosizecsi = SZ_4K, \ .irqcsi = soc ## _INT_CSI, \ } -#define imx_mx2_camera_data_entry_single_emma(soc) \ +#define imx_mx2_camera_data_entry_single_emma(soc, _devid) \ { \ + .devid = _devid, \ .iobasecsi = soc ## _CSI_BASE_ADDR, \ .iosizecsi = SZ_32, \ .irqcsi = soc ## _INT_CSI, \ @@ -27,12 +29,12 @@ #ifdef CONFIG_SOC_IMX25 const struct imx_mx2_camera_data imx25_mx2_camera_data __initconst = - imx_mx2_camera_data_entry_single(MX25); + imx_mx2_camera_data_entry_single(MX25, "imx25-camera"); #endif /* ifdef CONFIG_SOC_IMX25 */ #ifdef CONFIG_SOC_IMX27 const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst = - imx_mx2_camera_data_entry_single_emma(MX27); + imx_mx2_camera_data_entry_single_emma(MX27, "imx27-camera"); #endif /* ifdef CONFIG_SOC_IMX27 */ struct platform_device *__init imx_add_mx2_camera( @@ -58,7 +60,7 @@ struct platform_device *__init imx_add_mx2_camera( .flags = IORESOURCE_IRQ, }, }; - return imx_add_platform_device_dmamask("mx2-camera", 0, + return imx_add_platform_device_dmamask(data->devid, 0, res, data->iobaseemmaprp ? 4 : 2, pdata, sizeof(*pdata), DMA_BIT_MASK(32)); } diff --git a/trunk/arch/arm/plat-mxc/devices/platform-mxc-ehci.c b/trunk/arch/arm/mach-imx/devices/platform-mxc-ehci.c similarity index 97% rename from trunk/arch/arm/plat-mxc/devices/platform-mxc-ehci.c rename to trunk/arch/arm/mach-imx/devices/platform-mxc-ehci.c index 35851d889aca..5d4bbbfde641 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-mxc-ehci.c +++ b/trunk/arch/arm/mach-imx/devices/platform-mxc-ehci.c @@ -7,8 +7,9 @@ * Free Software Foundation. */ #include -#include -#include + +#include "../hardware.h" +#include "devices-common.h" #define imx_mxc_ehci_data_entry_single(soc, _id, hs) \ { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-mxc-mmc.c b/trunk/arch/arm/mach-imx/devices/platform-mxc-mmc.c similarity index 76% rename from trunk/arch/arm/plat-mxc/devices/platform-mxc-mmc.c rename to trunk/arch/arm/mach-imx/devices/platform-mxc-mmc.c index e7b920b58675..b8203c760c8f 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-mxc-mmc.c +++ b/trunk/arch/arm/mach-imx/devices/platform-mxc-mmc.c @@ -7,24 +7,26 @@ * Free Software Foundation. */ #include -#include -#include -#define imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size) \ +#include "../hardware.h" +#include "devices-common.h" + +#define imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) \ { \ + .devid = _devid, \ .id = _id, \ .iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \ .iosize = _size, \ .irq = soc ## _INT_SDHC ## _hwid, \ .dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \ } -#define imx_mxc_mmc_data_entry(soc, _id, _hwid, _size) \ - [_id] = imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size) +#define imx_mxc_mmc_data_entry(soc, _devid, _id, _hwid, _size) \ + [_id] = imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) #ifdef CONFIG_SOC_IMX21 const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = { #define imx21_mxc_mmc_data_entry(_id, _hwid) \ - imx_mxc_mmc_data_entry(MX21, _id, _hwid, SZ_4K) + imx_mxc_mmc_data_entry(MX21, "imx21-mmc", _id, _hwid, SZ_4K) imx21_mxc_mmc_data_entry(0, 1), imx21_mxc_mmc_data_entry(1, 2), }; @@ -33,7 +35,7 @@ const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = { #ifdef CONFIG_SOC_IMX27 const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = { #define imx27_mxc_mmc_data_entry(_id, _hwid) \ - imx_mxc_mmc_data_entry(MX27, _id, _hwid, SZ_4K) + imx_mxc_mmc_data_entry(MX27, "imx21-mmc", _id, _hwid, SZ_4K) imx27_mxc_mmc_data_entry(0, 1), imx27_mxc_mmc_data_entry(1, 2), }; @@ -42,7 +44,7 @@ const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = { #ifdef CONFIG_SOC_IMX31 const struct imx_mxc_mmc_data imx31_mxc_mmc_data[] __initconst = { #define imx31_mxc_mmc_data_entry(_id, _hwid) \ - imx_mxc_mmc_data_entry(MX31, _id, _hwid, SZ_16K) + imx_mxc_mmc_data_entry(MX31, "imx31-mmc", _id, _hwid, SZ_16K) imx31_mxc_mmc_data_entry(0, 1), imx31_mxc_mmc_data_entry(1, 2), }; @@ -67,7 +69,7 @@ struct platform_device *__init imx_add_mxc_mmc( .flags = IORESOURCE_DMA, }, }; - return imx_add_platform_device_dmamask("mxc-mmc", data->id, + return imx_add_platform_device_dmamask(data->devid, data->id, res, ARRAY_SIZE(res), pdata, sizeof(*pdata), DMA_BIT_MASK(32)); } diff --git a/trunk/arch/arm/plat-mxc/devices/platform-mxc_nand.c b/trunk/arch/arm/mach-imx/devices/platform-mxc_nand.c similarity index 74% rename from trunk/arch/arm/plat-mxc/devices/platform-mxc_nand.c rename to trunk/arch/arm/mach-imx/devices/platform-mxc_nand.c index 95b75cc70515..7af1c53e42b5 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-mxc_nand.c +++ b/trunk/arch/arm/mach-imx/devices/platform-mxc_nand.c @@ -7,18 +7,21 @@ * Free Software Foundation. */ #include -#include -#include -#define imx_mxc_nand_data_entry_single(soc, _size) \ +#include "../hardware.h" +#include "devices-common.h" + +#define imx_mxc_nand_data_entry_single(soc, _devid, _size) \ { \ + .devid = _devid, \ .iobase = soc ## _NFC_BASE_ADDR, \ .iosize = _size, \ .irq = soc ## _INT_NFC \ } -#define imx_mxc_nandv3_data_entry_single(soc, _size) \ +#define imx_mxc_nandv3_data_entry_single(soc, _devid, _size) \ { \ + .devid = _devid, \ .id = -1, \ .iobase = soc ## _NFC_BASE_ADDR, \ .iosize = _size, \ @@ -28,32 +31,32 @@ #ifdef CONFIG_SOC_IMX21 const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst = - imx_mxc_nand_data_entry_single(MX21, SZ_4K); + imx_mxc_nand_data_entry_single(MX21, "imx21-nand", SZ_4K); #endif /* ifdef CONFIG_SOC_IMX21 */ #ifdef CONFIG_SOC_IMX25 const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst = - imx_mxc_nand_data_entry_single(MX25, SZ_8K); + imx_mxc_nand_data_entry_single(MX25, "imx25-nand", SZ_8K); #endif /* ifdef CONFIG_SOC_IMX25 */ #ifdef CONFIG_SOC_IMX27 const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst = - imx_mxc_nand_data_entry_single(MX27, SZ_4K); + imx_mxc_nand_data_entry_single(MX27, "imx27-nand", SZ_4K); #endif /* ifdef CONFIG_SOC_IMX27 */ #ifdef CONFIG_SOC_IMX31 const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst = - imx_mxc_nand_data_entry_single(MX31, SZ_4K); + imx_mxc_nand_data_entry_single(MX31, "imx27-nand", SZ_4K); #endif #ifdef CONFIG_SOC_IMX35 const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst = - imx_mxc_nand_data_entry_single(MX35, SZ_8K); + imx_mxc_nand_data_entry_single(MX35, "imx25-nand", SZ_8K); #endif #ifdef CONFIG_SOC_IMX51 const struct imx_mxc_nand_data imx51_mxc_nand_data __initconst = - imx_mxc_nandv3_data_entry_single(MX51, SZ_16K); + imx_mxc_nandv3_data_entry_single(MX51, "imx51-nand", SZ_16K); #endif struct platform_device *__init imx_add_mxc_nand( @@ -76,7 +79,7 @@ struct platform_device *__init imx_add_mxc_nand( .flags = IORESOURCE_MEM, }, }; - return imx_add_platform_device("mxc_nand", data->id, + return imx_add_platform_device(data->devid, data->id, res, ARRAY_SIZE(res) - !data->axibase, pdata, sizeof(*pdata)); } diff --git a/trunk/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/trunk/arch/arm/mach-imx/devices/platform-mxc_pwm.c similarity index 97% rename from trunk/arch/arm/plat-mxc/devices/platform-mxc_pwm.c rename to trunk/arch/arm/mach-imx/devices/platform-mxc_pwm.c index b0c4ae298111..dcd289777687 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-mxc_pwm.c +++ b/trunk/arch/arm/mach-imx/devices/platform-mxc_pwm.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" #define imx_mxc_pwm_data_entry_single(soc, _id, _hwid, _size) \ { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-mxc_rnga.c b/trunk/arch/arm/mach-imx/devices/platform-mxc_rnga.c similarity index 95% rename from trunk/arch/arm/plat-mxc/devices/platform-mxc_rnga.c rename to trunk/arch/arm/mach-imx/devices/platform-mxc_rnga.c index b4b7612b6e17..c58404badb59 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-mxc_rnga.c +++ b/trunk/arch/arm/mach-imx/devices/platform-mxc_rnga.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" struct imx_mxc_rnga_data { resource_size_t iobase; diff --git a/trunk/arch/arm/plat-mxc/devices/platform-mxc_rtc.c b/trunk/arch/arm/mach-imx/devices/platform-mxc_rtc.c similarity index 77% rename from trunk/arch/arm/plat-mxc/devices/platform-mxc_rtc.c rename to trunk/arch/arm/mach-imx/devices/platform-mxc_rtc.c index a5c9ad5721c2..c7fffaadf847 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-mxc_rtc.c +++ b/trunk/arch/arm/mach-imx/devices/platform-mxc_rtc.c @@ -6,23 +6,24 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" -#define imx_mxc_rtc_data_entry_single(soc) \ +#define imx_mxc_rtc_data_entry_single(soc, _devid) \ { \ + .devid = _devid, \ .iobase = soc ## _RTC_BASE_ADDR, \ .irq = soc ## _INT_RTC, \ } #ifdef CONFIG_SOC_IMX31 const struct imx_mxc_rtc_data imx31_mxc_rtc_data __initconst = - imx_mxc_rtc_data_entry_single(MX31); + imx_mxc_rtc_data_entry_single(MX31, "imx21-rtc"); #endif /* ifdef CONFIG_SOC_IMX31 */ #ifdef CONFIG_SOC_IMX35 const struct imx_mxc_rtc_data imx35_mxc_rtc_data __initconst = - imx_mxc_rtc_data_entry_single(MX35); + imx_mxc_rtc_data_entry_single(MX35, "imx21-rtc"); #endif /* ifdef CONFIG_SOC_IMX35 */ struct platform_device *__init imx_add_mxc_rtc( @@ -40,6 +41,6 @@ struct platform_device *__init imx_add_mxc_rtc( }, }; - return imx_add_platform_device("mxc_rtc", -1, + return imx_add_platform_device(data->devid, -1, res, ARRAY_SIZE(res), NULL, 0); } diff --git a/trunk/arch/arm/plat-mxc/devices/platform-mxc_w1.c b/trunk/arch/arm/mach-imx/devices/platform-mxc_w1.c similarity index 95% rename from trunk/arch/arm/plat-mxc/devices/platform-mxc_w1.c rename to trunk/arch/arm/mach-imx/devices/platform-mxc_w1.c index 96fa5ea91fe8..88c18b720d63 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-mxc_w1.c +++ b/trunk/arch/arm/mach-imx/devices/platform-mxc_w1.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" #define imx_mxc_w1_data_entry_single(soc) \ { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-pata_imx.c b/trunk/arch/arm/mach-imx/devices/platform-pata_imx.c similarity index 96% rename from trunk/arch/arm/plat-mxc/devices/platform-pata_imx.c rename to trunk/arch/arm/mach-imx/devices/platform-pata_imx.c index 70e2f2a44714..e4ec11c8ce55 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-pata_imx.c +++ b/trunk/arch/arm/mach-imx/devices/platform-pata_imx.c @@ -3,8 +3,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" #define imx_pata_imx_data_entry_single(soc, _size) \ { \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c b/trunk/arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c similarity index 98% rename from trunk/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c rename to trunk/arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c index 3793e475cd95..e66a4e316311 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c +++ b/trunk/arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c @@ -6,10 +6,11 @@ * Free Software Foundation. */ -#include -#include #include +#include "../hardware.h" +#include "devices-common.h" + #define imx_sdhci_esdhc_imx_data_entry_single(soc, _devid, _id, hwid) \ { \ .devid = _devid, \ diff --git a/trunk/arch/arm/plat-mxc/devices/platform-spi_imx.c b/trunk/arch/arm/mach-imx/devices/platform-spi_imx.c similarity index 98% rename from trunk/arch/arm/plat-mxc/devices/platform-spi_imx.c rename to trunk/arch/arm/mach-imx/devices/platform-spi_imx.c index 9c50c14c8f92..8880bcb11e05 100644 --- a/trunk/arch/arm/plat-mxc/devices/platform-spi_imx.c +++ b/trunk/arch/arm/mach-imx/devices/platform-spi_imx.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include -#include +#include "../hardware.h" +#include "devices-common.h" #define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \ { \ diff --git a/trunk/arch/arm/mach-imx/ehci-imx25.c b/trunk/arch/arm/mach-imx/ehci-imx25.c index 576af7446952..134c190e3003 100644 --- a/trunk/arch/arm/mach-imx/ehci-imx25.c +++ b/trunk/arch/arm/mach-imx/ehci-imx25.c @@ -15,10 +15,10 @@ #include #include - -#include #include +#include "hardware.h" + #define USBCTRL_OTGBASE_OFFSET 0x600 #define MX25_OTG_SIC_SHIFT 29 diff --git a/trunk/arch/arm/mach-imx/ehci-imx27.c b/trunk/arch/arm/mach-imx/ehci-imx27.c index cd6e1f81508d..448d9115539d 100644 --- a/trunk/arch/arm/mach-imx/ehci-imx27.c +++ b/trunk/arch/arm/mach-imx/ehci-imx27.c @@ -15,10 +15,10 @@ #include #include - -#include #include +#include "hardware.h" + #define USBCTRL_OTGBASE_OFFSET 0x600 #define MX27_OTG_SIC_SHIFT 29 diff --git a/trunk/arch/arm/mach-imx/ehci-imx31.c b/trunk/arch/arm/mach-imx/ehci-imx31.c index 9a880c78af34..05de4e1e39d7 100644 --- a/trunk/arch/arm/mach-imx/ehci-imx31.c +++ b/trunk/arch/arm/mach-imx/ehci-imx31.c @@ -15,10 +15,10 @@ #include #include - -#include #include +#include "hardware.h" + #define USBCTRL_OTGBASE_OFFSET 0x600 #define MX31_OTG_SIC_SHIFT 29 diff --git a/trunk/arch/arm/mach-imx/ehci-imx35.c b/trunk/arch/arm/mach-imx/ehci-imx35.c index 293397852e4e..554e7cccff53 100644 --- a/trunk/arch/arm/mach-imx/ehci-imx35.c +++ b/trunk/arch/arm/mach-imx/ehci-imx35.c @@ -15,10 +15,10 @@ #include #include - -#include #include +#include "hardware.h" + #define USBCTRL_OTGBASE_OFFSET 0x600 #define MX35_OTG_SIC_SHIFT 29 diff --git a/trunk/arch/arm/mach-imx/ehci-imx5.c b/trunk/arch/arm/mach-imx/ehci-imx5.c index cf8d00e5cce1..e49710b10c68 100644 --- a/trunk/arch/arm/mach-imx/ehci-imx5.c +++ b/trunk/arch/arm/mach-imx/ehci-imx5.c @@ -15,10 +15,10 @@ #include #include - -#include #include +#include "hardware.h" + #define MXC_OTG_OFFSET 0 #define MXC_H1_OFFSET 0x200 #define MXC_H2_OFFSET 0x400 diff --git a/trunk/arch/arm/plat-mxc/epit.c b/trunk/arch/arm/mach-imx/epit.c similarity index 99% rename from trunk/arch/arm/plat-mxc/epit.c rename to trunk/arch/arm/mach-imx/epit.c index 88726f4dbbfa..04a5961beeac 100644 --- a/trunk/arch/arm/plat-mxc/epit.c +++ b/trunk/arch/arm/mach-imx/epit.c @@ -51,10 +51,10 @@ #include #include #include - -#include #include -#include + +#include "common.h" +#include "hardware.h" static struct clock_event_device clockevent_epit; static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; diff --git a/trunk/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h b/trunk/arch/arm/mach-imx/eukrea-baseboards.h similarity index 100% rename from trunk/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h rename to trunk/arch/arm/mach-imx/eukrea-baseboards.h diff --git a/trunk/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/trunk/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index 98aef571b9f8..b4c70028d359 100644 --- a/trunk/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/trunk/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c @@ -29,11 +29,10 @@ #include -#include -#include -#include - +#include "common.h" #include "devices-imx27.h" +#include "hardware.h" +#include "iomux-mx27.h" static const int eukrea_mbimx27_pins[] __initconst = { /* UART2 */ diff --git a/trunk/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/trunk/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c index 0b84666792f0..e2b70f4c1a2c 100644 --- a/trunk/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c +++ b/trunk/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c @@ -26,14 +26,14 @@ #include #include