From 7097f1a64f3dfd93854767ffc239e6963c21095c Mon Sep 17 00:00:00 2001 From: Ian Abbott Date: Mon, 16 May 2011 12:05:54 +0100 Subject: [PATCH] --- yaml --- r: 249725 b: refs/heads/master c: cfe3cffd8e44c0b69c9c50a1659acbd32ac19b70 h: refs/heads/master i: 249723: a049edcb4f732d4550579d7d60d24c51eee4d3fe v: v3 --- [refs] | 2 +- trunk/drivers/staging/comedi/drivers/adv_pci_dio.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index e6869df77055..76be49ac16ea 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: c5cbebf87f49dfb4f4ccdf86f6c24b4912a3061f +refs/heads/master: cfe3cffd8e44c0b69c9c50a1659acbd32ac19b70 diff --git a/trunk/drivers/staging/comedi/drivers/adv_pci_dio.c b/trunk/drivers/staging/comedi/drivers/adv_pci_dio.c index 9102667ab40e..d23799be7ce2 100644 --- a/trunk/drivers/staging/comedi/drivers/adv_pci_dio.c +++ b/trunk/drivers/staging/comedi/drivers/adv_pci_dio.c @@ -117,6 +117,7 @@ enum hw_io_access { /* Advantech PCI-1751/3/3E */ #define PCI1751_DIO 0 /* R/W: begin of 8255 registers block */ +#define PCI1751_CNT 24 /* R/W: begin of 8254 registers block */ #define PCI1751_ICR 32 /* W: Interrupt control register */ #define PCI1751_ISR 32 /* R: Interrupt status register */ #define PCI1753_DIO 0 /* R/W: begin of 8255 registers block */ @@ -329,7 +330,7 @@ static const struct dio_boardtype boardtypes[] = { { {0, 0, 0, 0}, {0, 0, 0, 0} }, { {48, PCI1751_DIO, 2, 0}, {0, 0, 0, 0} }, {0, 0, 0, 0}, - { {0, 0, 0, 0} }, + { {3, PCI1751_CNT, 1, 0} }, IO_8b}, {"pci1752", PCI_VENDOR_ID_ADVANTECH, 0x1752, PCIDIO_MAINREG, TYPE_PCI1752,