From 7150d6ca97972c21897bc2fd7780e02bd7bd707b Mon Sep 17 00:00:00 2001 From: Sathya Perla Date: Wed, 1 Jul 2009 01:06:07 +0000 Subject: [PATCH] --- yaml --- r: 155010 b: refs/heads/master c: c001c213b109c8baeeb6d012b422bf059b18368f h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/net/benet/be_hw.h | 4 ++++ trunk/drivers/net/benet/be_main.c | 16 +++++++++------- 3 files changed, 14 insertions(+), 8 deletions(-) diff --git a/[refs] b/[refs] index 3f4835ddc49f..481db0c9ed1b 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 7d3cabbcc86f7f69c47cb20c23ee84350ae6cfbb +refs/heads/master: c001c213b109c8baeeb6d012b422bf059b18368f diff --git a/trunk/drivers/net/benet/be_hw.h b/trunk/drivers/net/benet/be_hw.h index b02e805c1db3..29c33c709c6d 100644 --- a/trunk/drivers/net/benet/be_hw.h +++ b/trunk/drivers/net/benet/be_hw.h @@ -55,6 +55,10 @@ #define MEMBAR_CTRL_INT_CTRL_PFUNC_MASK 0x7 /* bits 26 - 28 */ #define MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT 26 +/********* ISR0 Register offset **********/ +#define CEV_ISR0_OFFSET 0xC18 +#define CEV_ISR_SIZE 4 + /********* Event Q door bell *************/ #define DB_EQ_OFFSET DB_CQ_OFFSET #define DB_EQ_RING_ID_MASK 0x1FF /* bits 0 - 8 */ diff --git a/trunk/drivers/net/benet/be_main.c b/trunk/drivers/net/benet/be_main.c index 308eb09ca56b..c43f6a119295 100644 --- a/trunk/drivers/net/benet/be_main.c +++ b/trunk/drivers/net/benet/be_main.c @@ -1274,15 +1274,17 @@ static irqreturn_t be_intx(int irq, void *dev) { struct be_adapter *adapter = dev; struct be_ctrl_info *ctrl = &adapter->ctrl; - int rx, tx; + int isr; - tx = event_handle(ctrl, &adapter->tx_eq); - rx = event_handle(ctrl, &adapter->rx_eq); + isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET + + ctrl->pci_func * CEV_ISR_SIZE); + if (!isr) + return IRQ_NONE; - if (rx || tx) - return IRQ_HANDLED; - else - return IRQ_NONE; + event_handle(ctrl, &adapter->tx_eq); + event_handle(ctrl, &adapter->rx_eq); + + return IRQ_HANDLED; } static irqreturn_t be_msix_rx(int irq, void *dev)