From 7261323f424e3a16f470e4258b28c58d4bb4ff55 Mon Sep 17 00:00:00 2001
From: Rob Herring <rob.herring@calxeda.com>
Date: Sun, 30 Dec 2012 10:15:06 -0600
Subject: [PATCH] --- yaml --- r: 348453 b: refs/heads/master c:
 9852910a0b0aa5548f990b51ad335921e0a710bf h: refs/heads/master i:   348451:
 d544a4a79674e71974aa72d16bcd76238469c4d2 v: v3

---
 [refs]                                 |  2 +-
 trunk/arch/arm/mach-highbank/sysregs.h | 15 +++++++++++++++
 2 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 3fc7f0ea5076..fe00bf831f1c 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 0b3455a71e38b9c8cf4c2e791c909618c0a72078
+refs/heads/master: 9852910a0b0aa5548f990b51ad335921e0a710bf
diff --git a/trunk/arch/arm/mach-highbank/sysregs.h b/trunk/arch/arm/mach-highbank/sysregs.h
index 707cfd3d80ec..70af9d13fcef 100644
--- a/trunk/arch/arm/mach-highbank/sysregs.h
+++ b/trunk/arch/arm/mach-highbank/sysregs.h
@@ -44,6 +44,15 @@ static inline void highbank_set_core_pwr(void)
 		writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu));
 }
 
+static inline void highbank_clear_core_pwr(void)
+{
+	int cpu = cpu_logical_map(smp_processor_id());
+	if (scu_base_addr)
+		scu_power_mode(scu_base_addr, SCU_PM_NORMAL);
+	else
+		writel_relaxed(0, sregs_base + SREG_CPU_PWR_CTRL(cpu));
+}
+
 static inline void highbank_set_pwr_suspend(void)
 {
 	writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
@@ -68,4 +77,10 @@ static inline void highbank_set_pwr_hard_reset(void)
 	highbank_set_core_pwr();
 }
 
+static inline void highbank_clear_pwr_request(void)
+{
+	writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ);
+	highbank_clear_core_pwr();
+}
+
 #endif