From 733dad0f71d8fe7ebdef16a628e64a01d75cfefd Mon Sep 17 00:00:00 2001 From: Robin Holt Date: Tue, 3 Feb 2009 18:40:59 -0600 Subject: [PATCH] --- yaml --- r: 131566 b: refs/heads/master c: 39d481cba27809598e755e184bc0d8ae1d22423e h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/ia64/include/asm/sn/bte.h | 2 +- trunk/arch/ia64/sn/kernel/bte.c | 7 ++++--- 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/[refs] b/[refs] index b23d2cc77e68..3de43661354c 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 334f85b647bc46ff4d27ace55aa65f44d6a2f4db +refs/heads/master: 39d481cba27809598e755e184bc0d8ae1d22423e diff --git a/trunk/arch/ia64/include/asm/sn/bte.h b/trunk/arch/ia64/include/asm/sn/bte.h index 5efecf06c9a4..96798d2da7c2 100644 --- a/trunk/arch/ia64/include/asm/sn/bte.h +++ b/trunk/arch/ia64/include/asm/sn/bte.h @@ -39,7 +39,7 @@ /* BTE status register only supports 16 bits for length field */ #define BTE_LEN_BITS (16) #define BTE_LEN_MASK ((1 << BTE_LEN_BITS) - 1) -#define BTE_MAX_XFER ((1 << BTE_LEN_BITS) * L1_CACHE_BYTES) +#define BTE_MAX_XFER (BTE_LEN_MASK << L1_CACHE_SHIFT) /* Define hardware */ diff --git a/trunk/arch/ia64/sn/kernel/bte.c b/trunk/arch/ia64/sn/kernel/bte.c index 9456d4034024..c6d6b62db66c 100644 --- a/trunk/arch/ia64/sn/kernel/bte.c +++ b/trunk/arch/ia64/sn/kernel/bte.c @@ -97,9 +97,10 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification) return BTE_SUCCESS; } - BUG_ON((len & L1_CACHE_MASK) || - (src & L1_CACHE_MASK) || (dest & L1_CACHE_MASK)); - BUG_ON(!(len < ((BTE_LEN_MASK + 1) << L1_CACHE_SHIFT))); + BUG_ON(len & L1_CACHE_MASK); + BUG_ON(src & L1_CACHE_MASK); + BUG_ON(dest & L1_CACHE_MASK); + BUG_ON(len > BTE_MAX_XFER); /* * Start with interface corresponding to cpu number