diff --git a/[refs] b/[refs] index f0e571c76297..6bd6b923a8bd 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: fcf126d847c41461d4f034b11541296f3e15d0b2 +refs/heads/master: 4fe4a2bf9a687fc87ea796c234da8c59df763aab diff --git a/trunk/arch/arm/mach-pxa/irq.c b/trunk/arch/arm/mach-pxa/irq.c index 9f7499b6d435..4619d5fe606c 100644 --- a/trunk/arch/arm/mach-pxa/irq.c +++ b/trunk/arch/arm/mach-pxa/irq.c @@ -38,11 +38,33 @@ static void pxa_unmask_low_irq(unsigned int irq) ICMR |= (1 << (irq + PXA_IRQ_SKIP)); } +static int pxa_set_wake(unsigned int irq, unsigned int on) +{ + u32 mask; + + switch (irq) { + case IRQ_RTCAlrm: + mask = PWER_RTC; + break; +#ifdef CONFIG_PXA27x + /* REVISIT can handle USBH1, USBH2, USB, MSL, USIM, ... */ +#endif + default: + return -EINVAL; + } + if (on) + PWER |= mask; + else + PWER &= ~mask; + return 0; +} + static struct irq_chip pxa_internal_chip_low = { .name = "SC", .ack = pxa_mask_low_irq, .mask = pxa_mask_low_irq, .unmask = pxa_unmask_low_irq, + .set_wake = pxa_set_wake, }; #if PXA_INTERNAL_IRQS > 32 @@ -70,6 +92,26 @@ static struct irq_chip pxa_internal_chip_high = { #endif +/* Note that if an input/irq line ever gets changed to an output during + * suspend, the relevant PWER, PRER, and PFER bits should be cleared. + */ +#ifdef CONFIG_PXA27x + +/* PXA27x: Various gpios can issue wakeup events. This logic only + * handles the simple cases, not the WEMUX2 and WEMUX3 options + */ +#define PXA27x_GPIO_NOWAKE_MASK \ + ((1 << 8) | (1 << 7) | (1 << 6) | (1 << 5) | (1 << 2)) +#define WAKEMASK(gpio) \ + (((gpio) <= 15) \ + ? ((1 << (gpio)) & ~PXA27x_GPIO_NOWAKE_MASK) \ + : ((gpio == 35) ? (1 << 24) : 0)) +#else + +/* pxa 210, 250, 255, 26x: gpios 0..15 can issue wakeups */ +#define WAKEMASK(gpio) (((gpio) <= 15) ? (1 << (gpio)) : 0) +#endif + /* * PXA GPIO edge detection for IRQs: * IRQs are generated on Falling-Edge, Rising-Edge, or both. @@ -83,9 +125,11 @@ static long GPIO_IRQ_mask[4]; static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) { int gpio, idx; + u32 mask; gpio = IRQ_TO_GPIO(irq); idx = gpio >> 5; + mask = WAKEMASK(gpio); if (type == IRQT_PROBE) { /* Don't mess with enabled GPIOs using preconfigured edges or @@ -105,14 +149,20 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) if (type & __IRQT_RISEDGE) { /* printk("rising "); */ __set_bit (gpio, GPIO_IRQ_rising_edge); - } else + PRER |= mask; + } else { __clear_bit (gpio, GPIO_IRQ_rising_edge); + PRER &= ~mask; + } if (type & __IRQT_FALEDGE) { /* printk("falling "); */ __set_bit (gpio, GPIO_IRQ_falling_edge); - } else + PFER |= mask; + } else { __clear_bit (gpio, GPIO_IRQ_falling_edge); + PFER &= ~mask; + } /* printk("edges\n"); */ @@ -130,12 +180,29 @@ static void pxa_ack_low_gpio(unsigned int irq) GEDR0 = (1 << (irq - IRQ_GPIO0)); } +static int pxa_set_gpio_wake(unsigned int irq, unsigned int on) +{ + int gpio = IRQ_TO_GPIO(irq); + u32 mask = WAKEMASK(gpio); + + if (!mask) + return -EINVAL; + + if (on) + PWER |= mask; + else + PWER &= ~mask; + return 0; +} + + static struct irq_chip pxa_low_gpio_chip = { .name = "GPIO-l", .ack = pxa_ack_low_gpio, .mask = pxa_mask_low_irq, .unmask = pxa_unmask_low_irq, .set_type = pxa_gpio_irq_type, + .set_wake = pxa_set_gpio_wake, }; /* @@ -244,6 +311,7 @@ static struct irq_chip pxa_muxed_gpio_chip = { .mask = pxa_mask_muxed_gpio, .unmask = pxa_unmask_muxed_gpio, .set_type = pxa_gpio_irq_type, + .set_wake = pxa_set_gpio_wake, }; diff --git a/trunk/arch/arm/plat-omap/devices.c b/trunk/arch/arm/plat-omap/devices.c index eeb33fed6f7c..dbc3f44e07a6 100644 --- a/trunk/arch/arm/plat-omap/devices.c +++ b/trunk/arch/arm/plat-omap/devices.c @@ -429,10 +429,6 @@ static inline void omap_init_rng(void) {} */ static int __init omap_init_devices(void) { -/* - * Need to enable relevant once for 2430 SDP - */ -#ifndef CONFIG_MACH_OMAP_2430SDP /* please keep these calls, and their implementations above, * in alphabetical order so they're easier to sort through. */ @@ -442,7 +438,7 @@ static int __init omap_init_devices(void) omap_init_uwire(); omap_init_wdt(); omap_init_rng(); -#endif + return 0; } arch_initcall(omap_init_devices); diff --git a/trunk/arch/arm/plat-omap/dmtimer.c b/trunk/arch/arm/plat-omap/dmtimer.c index 659619f235ca..45f0439bffba 100644 --- a/trunk/arch/arm/plat-omap/dmtimer.c +++ b/trunk/arch/arm/plat-omap/dmtimer.c @@ -506,8 +506,6 @@ int omap_dm_timer_init(void) BUG_ON(dm_source_clocks[i] == NULL); } #endif - if (cpu_is_omap243x()) - dm_timers[0].phys_base = 0x49018000; for (i = 0; i < dm_timer_count; i++) { #ifdef CONFIG_ARCH_OMAP2 diff --git a/trunk/arch/arm/plat-omap/gpio.c b/trunk/arch/arm/plat-omap/gpio.c index 9dc6d3617bdb..8bedc8f9b6e5 100644 --- a/trunk/arch/arm/plat-omap/gpio.c +++ b/trunk/arch/arm/plat-omap/gpio.c @@ -85,17 +85,10 @@ /* * omap24xx specific GPIO registers */ -#define OMAP242X_GPIO1_BASE (void __iomem *)0x48018000 -#define OMAP242X_GPIO2_BASE (void __iomem *)0x4801a000 -#define OMAP242X_GPIO3_BASE (void __iomem *)0x4801c000 -#define OMAP242X_GPIO4_BASE (void __iomem *)0x4801e000 - -#define OMAP243X_GPIO1_BASE (void __iomem *)0x4900C000 -#define OMAP243X_GPIO2_BASE (void __iomem *)0x4900E000 -#define OMAP243X_GPIO3_BASE (void __iomem *)0x49010000 -#define OMAP243X_GPIO4_BASE (void __iomem *)0x49012000 -#define OMAP243X_GPIO5_BASE (void __iomem *)0x480B6000 - +#define OMAP24XX_GPIO1_BASE (void __iomem *)0x48018000 +#define OMAP24XX_GPIO2_BASE (void __iomem *)0x4801a000 +#define OMAP24XX_GPIO3_BASE (void __iomem *)0x4801c000 +#define OMAP24XX_GPIO4_BASE (void __iomem *)0x4801e000 #define OMAP24XX_GPIO_REVISION 0x0000 #define OMAP24XX_GPIO_SYSCONFIG 0x0010 #define OMAP24XX_GPIO_SYSSTATUS 0x0014 @@ -124,18 +117,8 @@ struct gpio_bank { u16 virtual_irq_start; int method; u32 reserved_map; -#if defined (CONFIG_ARCH_OMAP16XX) || defined (CONFIG_ARCH_OMAP24XX) u32 suspend_wakeup; u32 saved_wakeup; -#endif -#ifdef CONFIG_ARCH_OMAP24XX - u32 non_wakeup_gpios; - u32 enabled_non_wakeup_gpios; - - u32 saved_datain; - u32 saved_fallingdetect; - u32 saved_risingdetect; -#endif spinlock_t lock; }; @@ -175,22 +158,12 @@ static struct gpio_bank gpio_bank_730[7] = { #endif #ifdef CONFIG_ARCH_OMAP24XX - -static struct gpio_bank gpio_bank_242x[4] = { - { OMAP242X_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX }, - { OMAP242X_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX }, - { OMAP242X_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX }, - { OMAP242X_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX }, -}; - -static struct gpio_bank gpio_bank_243x[5] = { - { OMAP243X_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX }, - { OMAP243X_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX }, - { OMAP243X_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX }, - { OMAP243X_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX }, - { OMAP243X_GPIO5_BASE, INT_24XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_24XX }, +static struct gpio_bank gpio_bank_24xx[4] = { + { OMAP24XX_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX }, + { OMAP24XX_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX }, + { OMAP24XX_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX }, + { OMAP24XX_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX }, }; - #endif static struct gpio_bank *gpio_bank; @@ -284,34 +257,21 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) u32 l; switch (bank->method) { -#ifdef CONFIG_ARCH_OMAP1 case METHOD_MPUIO: reg += OMAP_MPUIO_IO_CNTL; break; -#endif -#ifdef CONFIG_ARCH_OMAP15XX case METHOD_GPIO_1510: reg += OMAP1510_GPIO_DIR_CONTROL; break; -#endif -#ifdef CONFIG_ARCH_OMAP16XX case METHOD_GPIO_1610: reg += OMAP1610_GPIO_DIRECTION; break; -#endif -#ifdef CONFIG_ARCH_OMAP730 case METHOD_GPIO_730: reg += OMAP730_GPIO_DIR_CONTROL; break; -#endif -#ifdef CONFIG_ARCH_OMAP24XX case METHOD_GPIO_24XX: reg += OMAP24XX_GPIO_OE; break; -#endif - default: - WARN_ON(1); - return; } l = __raw_readl(reg); if (is_input) @@ -339,7 +299,6 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) u32 l = 0; switch (bank->method) { -#ifdef CONFIG_ARCH_OMAP1 case METHOD_MPUIO: reg += OMAP_MPUIO_OUTPUT; l = __raw_readl(reg); @@ -348,8 +307,6 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) else l &= ~(1 << gpio); break; -#endif -#ifdef CONFIG_ARCH_OMAP15XX case METHOD_GPIO_1510: reg += OMAP1510_GPIO_DATA_OUTPUT; l = __raw_readl(reg); @@ -358,8 +315,6 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) else l &= ~(1 << gpio); break; -#endif -#ifdef CONFIG_ARCH_OMAP16XX case METHOD_GPIO_1610: if (enable) reg += OMAP1610_GPIO_SET_DATAOUT; @@ -367,8 +322,6 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) reg += OMAP1610_GPIO_CLEAR_DATAOUT; l = 1 << gpio; break; -#endif -#ifdef CONFIG_ARCH_OMAP730 case METHOD_GPIO_730: reg += OMAP730_GPIO_DATA_OUTPUT; l = __raw_readl(reg); @@ -377,8 +330,6 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) else l &= ~(1 << gpio); break; -#endif -#ifdef CONFIG_ARCH_OMAP24XX case METHOD_GPIO_24XX: if (enable) reg += OMAP24XX_GPIO_SETDATAOUT; @@ -386,9 +337,8 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) reg += OMAP24XX_GPIO_CLEARDATAOUT; l = 1 << gpio; break; -#endif default: - WARN_ON(1); + BUG(); return; } __raw_writel(l, reg); @@ -412,37 +362,28 @@ int omap_get_gpio_datain(int gpio) void __iomem *reg; if (check_gpio(gpio) < 0) - return -EINVAL; + return -1; bank = get_gpio_bank(gpio); reg = bank->base; switch (bank->method) { -#ifdef CONFIG_ARCH_OMAP1 case METHOD_MPUIO: reg += OMAP_MPUIO_INPUT_LATCH; break; -#endif -#ifdef CONFIG_ARCH_OMAP15XX case METHOD_GPIO_1510: reg += OMAP1510_GPIO_DATA_INPUT; break; -#endif -#ifdef CONFIG_ARCH_OMAP16XX case METHOD_GPIO_1610: reg += OMAP1610_GPIO_DATAIN; break; -#endif -#ifdef CONFIG_ARCH_OMAP730 case METHOD_GPIO_730: reg += OMAP730_GPIO_DATA_INPUT; break; -#endif -#ifdef CONFIG_ARCH_OMAP24XX case METHOD_GPIO_24XX: reg += OMAP24XX_GPIO_DATAIN; break; -#endif default: - return -EINVAL; + BUG(); + return -1; } return (__raw_readl(reg) & (1 << get_gpio_index(gpio))) != 0; @@ -456,10 +397,8 @@ do { \ __raw_writel(l, base + reg); \ } while(0) -#ifdef CONFIG_ARCH_OMAP24XX -static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) +static inline void set_24xx_gpio_triggering(void __iomem *base, int gpio, int trigger) { - void __iomem *base = bank->base; u32 gpio_bit = 1 << gpio; MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit, @@ -470,21 +409,9 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, in trigger & __IRQT_RISEDGE); MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit, trigger & __IRQT_FALEDGE); - if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { - if (trigger != 0) - __raw_writel(1 << gpio, bank->base + OMAP24XX_GPIO_SETWKUENA); - else - __raw_writel(1 << gpio, bank->base + OMAP24XX_GPIO_CLEARWKUENA); - } else { - if (trigger != 0) - bank->enabled_non_wakeup_gpios |= gpio_bit; - else - bank->enabled_non_wakeup_gpios &= ~gpio_bit; - } /* FIXME: Possibly do 'set_irq_handler(j, handle_level_irq)' if only level * triggering requested. */ } -#endif static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) { @@ -492,7 +419,6 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) u32 l = 0; switch (bank->method) { -#ifdef CONFIG_ARCH_OMAP1 case METHOD_MPUIO: reg += OMAP_MPUIO_GPIO_INT_EDGE; l = __raw_readl(reg); @@ -503,8 +429,6 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) else goto bad; break; -#endif -#ifdef CONFIG_ARCH_OMAP15XX case METHOD_GPIO_1510: reg += OMAP1510_GPIO_INT_CONTROL; l = __raw_readl(reg); @@ -515,28 +439,22 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) else goto bad; break; -#endif -#ifdef CONFIG_ARCH_OMAP16XX case METHOD_GPIO_1610: if (gpio & 0x08) reg += OMAP1610_GPIO_EDGE_CTRL2; else reg += OMAP1610_GPIO_EDGE_CTRL1; gpio &= 0x07; + /* We allow only edge triggering, i.e. two lowest bits */ + if (trigger & (__IRQT_LOWLVL | __IRQT_HIGHLVL)) + BUG(); l = __raw_readl(reg); l &= ~(3 << (gpio << 1)); if (trigger & __IRQT_RISEDGE) l |= 2 << (gpio << 1); if (trigger & __IRQT_FALEDGE) l |= 1 << (gpio << 1); - if (trigger) - /* Enable wake-up during idle for dynamic tick */ - __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_SET_WAKEUPENA); - else - __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA); break; -#endif -#ifdef CONFIG_ARCH_OMAP730 case METHOD_GPIO_730: reg += OMAP730_GPIO_INT_CONTROL; l = __raw_readl(reg); @@ -547,13 +465,11 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) else goto bad; break; -#endif -#ifdef CONFIG_ARCH_OMAP24XX case METHOD_GPIO_24XX: - set_24xx_gpio_triggering(bank, gpio, trigger); + set_24xx_gpio_triggering(reg, gpio, trigger); break; -#endif default: + BUG(); goto bad; } __raw_writel(l, reg); @@ -568,7 +484,7 @@ static int gpio_irq_type(unsigned irq, unsigned type) unsigned gpio; int retval; - if (!cpu_is_omap24xx() && irq > IH_MPUIO_BASE) + if (irq > IH_MPUIO_BASE) gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); else gpio = irq - IH_GPIO_BASE; @@ -576,21 +492,14 @@ static int gpio_irq_type(unsigned irq, unsigned type) if (check_gpio(gpio) < 0) return -EINVAL; - if (type & ~IRQ_TYPE_SENSE_MASK) + if (type & IRQT_PROBE) return -EINVAL; - - /* OMAP1 allows only only edge triggering */ - if (!cpu_is_omap24xx() - && (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) + if (!cpu_is_omap24xx() && (type & (__IRQT_LOWLVL|__IRQT_HIGHLVL))) return -EINVAL; - bank = get_irq_chip_data(irq); + bank = get_gpio_bank(gpio); spin_lock(&bank->lock); retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type); - if (retval == 0) { - irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK; - irq_desc[irq].status |= type; - } spin_unlock(&bank->lock); return retval; } @@ -600,34 +509,24 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) void __iomem *reg = bank->base; switch (bank->method) { -#ifdef CONFIG_ARCH_OMAP1 case METHOD_MPUIO: /* MPUIO irqstatus is reset by reading the status register, * so do nothing here */ return; -#endif -#ifdef CONFIG_ARCH_OMAP15XX case METHOD_GPIO_1510: reg += OMAP1510_GPIO_INT_STATUS; break; -#endif -#ifdef CONFIG_ARCH_OMAP16XX case METHOD_GPIO_1610: reg += OMAP1610_GPIO_IRQSTATUS1; break; -#endif -#ifdef CONFIG_ARCH_OMAP730 case METHOD_GPIO_730: reg += OMAP730_GPIO_INT_STATUS; break; -#endif -#ifdef CONFIG_ARCH_OMAP24XX case METHOD_GPIO_24XX: reg += OMAP24XX_GPIO_IRQSTATUS1; break; -#endif default: - WARN_ON(1); + BUG(); return; } __raw_writel(gpio_mask, reg); @@ -650,41 +549,31 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) u32 mask; switch (bank->method) { -#ifdef CONFIG_ARCH_OMAP1 case METHOD_MPUIO: reg += OMAP_MPUIO_GPIO_MASKIT; mask = 0xffff; inv = 1; break; -#endif -#ifdef CONFIG_ARCH_OMAP15XX case METHOD_GPIO_1510: reg += OMAP1510_GPIO_INT_MASK; mask = 0xffff; inv = 1; break; -#endif -#ifdef CONFIG_ARCH_OMAP16XX case METHOD_GPIO_1610: reg += OMAP1610_GPIO_IRQENABLE1; mask = 0xffff; break; -#endif -#ifdef CONFIG_ARCH_OMAP730 case METHOD_GPIO_730: reg += OMAP730_GPIO_INT_MASK; mask = 0xffffffff; inv = 1; break; -#endif -#ifdef CONFIG_ARCH_OMAP24XX case METHOD_GPIO_24XX: reg += OMAP24XX_GPIO_IRQENABLE1; mask = 0xffffffff; break; -#endif default: - WARN_ON(1); + BUG(); return 0; } @@ -701,7 +590,6 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab u32 l; switch (bank->method) { -#ifdef CONFIG_ARCH_OMAP1 case METHOD_MPUIO: reg += OMAP_MPUIO_GPIO_MASKIT; l = __raw_readl(reg); @@ -710,8 +598,6 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab else l |= gpio_mask; break; -#endif -#ifdef CONFIG_ARCH_OMAP15XX case METHOD_GPIO_1510: reg += OMAP1510_GPIO_INT_MASK; l = __raw_readl(reg); @@ -720,8 +606,6 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab else l |= gpio_mask; break; -#endif -#ifdef CONFIG_ARCH_OMAP16XX case METHOD_GPIO_1610: if (enable) reg += OMAP1610_GPIO_SET_IRQENABLE1; @@ -729,8 +613,6 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab reg += OMAP1610_GPIO_CLEAR_IRQENABLE1; l = gpio_mask; break; -#endif -#ifdef CONFIG_ARCH_OMAP730 case METHOD_GPIO_730: reg += OMAP730_GPIO_INT_MASK; l = __raw_readl(reg); @@ -739,8 +621,6 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab else l |= gpio_mask; break; -#endif -#ifdef CONFIG_ARCH_OMAP24XX case METHOD_GPIO_24XX: if (enable) reg += OMAP24XX_GPIO_SETIRQENABLE1; @@ -748,9 +628,8 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab reg += OMAP24XX_GPIO_CLEARIRQENABLE1; l = gpio_mask; break; -#endif default: - WARN_ON(1); + BUG(); return; } __raw_writel(l, reg); @@ -772,39 +651,15 @@ static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int ena static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) { switch (bank->method) { -#ifdef CONFIG_ARCH_OMAP16XX - case METHOD_MPUIO: case METHOD_GPIO_1610: - spin_lock(&bank->lock); - if (enable) { - bank->suspend_wakeup |= (1 << gpio); - enable_irq_wake(bank->irq); - } else { - disable_irq_wake(bank->irq); - bank->suspend_wakeup &= ~(1 << gpio); - } - spin_unlock(&bank->lock); - return 0; -#endif -#ifdef CONFIG_ARCH_OMAP24XX case METHOD_GPIO_24XX: - if (bank->non_wakeup_gpios & (1 << gpio)) { - printk(KERN_ERR "Unable to modify wakeup on " - "non-wakeup GPIO%d\n", - (bank - gpio_bank) * 32 + gpio); - return -EINVAL; - } spin_lock(&bank->lock); - if (enable) { + if (enable) bank->suspend_wakeup |= (1 << gpio); - enable_irq_wake(bank->irq); - } else { - disable_irq_wake(bank->irq); + else bank->suspend_wakeup &= ~(1 << gpio); - } spin_unlock(&bank->lock); return 0; -#endif default: printk(KERN_ERR "Can't enable GPIO wakeup for method %i\n", bank->method); @@ -829,7 +684,7 @@ static int gpio_wake_enable(unsigned int irq, unsigned int enable) if (check_gpio(gpio) < 0) return -ENODEV; - bank = get_irq_chip_data(irq); + bank = get_gpio_bank(gpio); retval = _set_gpio_wakeup(bank, get_gpio_index(gpio), enable); return retval; @@ -865,6 +720,20 @@ int omap_request_gpio(int gpio) reg = bank->base + OMAP1510_GPIO_PIN_CONTROL; __raw_writel(__raw_readl(reg) | (1 << get_gpio_index(gpio)), reg); } +#endif +#ifdef CONFIG_ARCH_OMAP16XX + if (bank->method == METHOD_GPIO_1610) { + /* Enable wake-up during idle for dynamic tick */ + void __iomem *reg = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; + __raw_writel(1 << get_gpio_index(gpio), reg); + } +#endif +#ifdef CONFIG_ARCH_OMAP24XX + if (bank->method == METHOD_GPIO_24XX) { + /* Enable wake-up during idle for dynamic tick */ + void __iomem *reg = bank->base + OMAP24XX_GPIO_SETWKUENA; + __raw_writel(1 << get_gpio_index(gpio), reg); + } #endif spin_unlock(&bank->lock); @@ -925,10 +794,8 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) desc->chip->ack(irq); bank = get_irq_data(irq); -#ifdef CONFIG_ARCH_OMAP1 if (bank->method == METHOD_MPUIO) isr_reg = bank->base + OMAP_MPUIO_GPIO_INT; -#endif #ifdef CONFIG_ARCH_OMAP15XX if (bank->method == METHOD_GPIO_1510) isr_reg = bank->base + OMAP1510_GPIO_INT_STATUS; @@ -1044,7 +911,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) static void gpio_irq_shutdown(unsigned int irq) { unsigned int gpio = irq - IH_GPIO_BASE; - struct gpio_bank *bank = get_irq_chip_data(irq); + struct gpio_bank *bank = get_gpio_bank(gpio); _reset_gpio(bank, gpio); } @@ -1052,7 +919,7 @@ static void gpio_irq_shutdown(unsigned int irq) static void gpio_ack_irq(unsigned int irq) { unsigned int gpio = irq - IH_GPIO_BASE; - struct gpio_bank *bank = get_irq_chip_data(irq); + struct gpio_bank *bank = get_gpio_bank(gpio); _clear_gpio_irqstatus(bank, gpio); } @@ -1060,7 +927,7 @@ static void gpio_ack_irq(unsigned int irq) static void gpio_mask_irq(unsigned int irq) { unsigned int gpio = irq - IH_GPIO_BASE; - struct gpio_bank *bank = get_irq_chip_data(irq); + struct gpio_bank *bank = get_gpio_bank(gpio); _set_gpio_irqenable(bank, gpio, 0); } @@ -1069,27 +936,11 @@ static void gpio_unmask_irq(unsigned int irq) { unsigned int gpio = irq - IH_GPIO_BASE; unsigned int gpio_idx = get_gpio_index(gpio); - struct gpio_bank *bank = get_irq_chip_data(irq); + struct gpio_bank *bank = get_gpio_bank(gpio); _set_gpio_irqenable(bank, gpio_idx, 1); } -static struct irq_chip gpio_irq_chip = { - .name = "GPIO", - .shutdown = gpio_irq_shutdown, - .ack = gpio_ack_irq, - .mask = gpio_mask_irq, - .unmask = gpio_unmask_irq, - .set_type = gpio_irq_type, - .set_wake = gpio_wake_enable, -}; - -/*---------------------------------------------------------------------*/ - -#ifdef CONFIG_ARCH_OMAP1 - -/* MPUIO uses the always-on 32k clock */ - static void mpuio_ack_irq(unsigned int irq) { /* The ISR is reset automatically, so do nothing here. */ @@ -1098,7 +949,7 @@ static void mpuio_ack_irq(unsigned int irq) static void mpuio_mask_irq(unsigned int irq) { unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); - struct gpio_bank *bank = get_irq_chip_data(irq); + struct gpio_bank *bank = get_gpio_bank(gpio); _set_gpio_irqenable(bank, gpio, 0); } @@ -1106,108 +957,33 @@ static void mpuio_mask_irq(unsigned int irq) static void mpuio_unmask_irq(unsigned int irq) { unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); - struct gpio_bank *bank = get_irq_chip_data(irq); + struct gpio_bank *bank = get_gpio_bank(gpio); _set_gpio_irqenable(bank, gpio, 1); } -static struct irq_chip mpuio_irq_chip = { - .name = "MPUIO", - .ack = mpuio_ack_irq, - .mask = mpuio_mask_irq, - .unmask = mpuio_unmask_irq, +static struct irq_chip gpio_irq_chip = { + .name = "GPIO", + .shutdown = gpio_irq_shutdown, + .ack = gpio_ack_irq, + .mask = gpio_mask_irq, + .unmask = gpio_unmask_irq, .set_type = gpio_irq_type, -#ifdef CONFIG_ARCH_OMAP16XX - /* REVISIT: assuming only 16xx supports MPUIO wake events */ .set_wake = gpio_wake_enable, -#endif -}; - - -#define bank_is_mpuio(bank) ((bank)->method == METHOD_MPUIO) - - -#ifdef CONFIG_ARCH_OMAP16XX - -#include - -static int omap_mpuio_suspend_late(struct platform_device *pdev, pm_message_t mesg) -{ - struct gpio_bank *bank = platform_get_drvdata(pdev); - void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT; - - spin_lock(&bank->lock); - bank->saved_wakeup = __raw_readl(mask_reg); - __raw_writel(0xffff & ~bank->suspend_wakeup, mask_reg); - spin_unlock(&bank->lock); - - return 0; -} - -static int omap_mpuio_resume_early(struct platform_device *pdev) -{ - struct gpio_bank *bank = platform_get_drvdata(pdev); - void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT; - - spin_lock(&bank->lock); - __raw_writel(bank->saved_wakeup, mask_reg); - spin_unlock(&bank->lock); - - return 0; -} - -/* use platform_driver for this, now that there's no longer any - * point to sys_device (other than not disturbing old code). - */ -static struct platform_driver omap_mpuio_driver = { - .suspend_late = omap_mpuio_suspend_late, - .resume_early = omap_mpuio_resume_early, - .driver = { - .name = "mpuio", - }, }; -static struct platform_device omap_mpuio_device = { - .name = "mpuio", - .id = -1, - .dev = { - .driver = &omap_mpuio_driver.driver, - } - /* could list the /proc/iomem resources */ +static struct irq_chip mpuio_irq_chip = { + .name = "MPUIO", + .ack = mpuio_ack_irq, + .mask = mpuio_mask_irq, + .unmask = mpuio_unmask_irq, + .set_type = gpio_irq_type, }; -static inline void mpuio_init(void) -{ - platform_set_drvdata(&omap_mpuio_device, &gpio_bank_1610[0]); - - if (platform_driver_register(&omap_mpuio_driver) == 0) - (void) platform_device_register(&omap_mpuio_device); -} - -#else -static inline void mpuio_init(void) {} -#endif /* 16xx */ - -#else - -extern struct irq_chip mpuio_irq_chip; - -#define bank_is_mpuio(bank) 0 -static inline void mpuio_init(void) {} - -#endif - -/*---------------------------------------------------------------------*/ - static int initialized; static struct clk * gpio_ick; static struct clk * gpio_fck; -#ifdef CONFIG_ARCH_OMAP2430 -static struct clk * gpio5_ick; -static struct clk * gpio5_fck; -#endif - static int __init _omap_gpio_init(void) { int i; @@ -1233,25 +1009,7 @@ static int __init _omap_gpio_init(void) printk("Could not get gpios_fck\n"); else clk_enable(gpio_fck); - - /* - * On 2430 GPIO 5 uses CORE L4 ICLK - */ -#ifdef CONFIG_ARCH_OMAP2430 - if (cpu_is_omap2430()) { - gpio5_ick = clk_get(NULL, "gpio5_ick"); - if (IS_ERR(gpio5_ick)) - printk("Could not get gpio5_ick\n"); - else - clk_enable(gpio5_ick); - gpio5_fck = clk_get(NULL, "gpio5_fck"); - if (IS_ERR(gpio5_fck)) - printk("Could not get gpio5_fck\n"); - else - clk_enable(gpio5_fck); - } -#endif -} + } #ifdef CONFIG_ARCH_OMAP15XX if (cpu_is_omap15xx()) { @@ -1278,24 +1036,14 @@ static int __init _omap_gpio_init(void) gpio_bank = gpio_bank_730; } #endif - #ifdef CONFIG_ARCH_OMAP24XX - if (cpu_is_omap242x()) { + if (cpu_is_omap24xx()) { int rev; gpio_bank_count = 4; - gpio_bank = gpio_bank_242x; - rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); - printk(KERN_INFO "OMAP242x GPIO hardware version %d.%d\n", - (rev >> 4) & 0x0f, rev & 0x0f); - } - if (cpu_is_omap243x()) { - int rev; - - gpio_bank_count = 5; - gpio_bank = gpio_bank_243x; + gpio_bank = gpio_bank_24xx; rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); - printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n", + printk(KERN_INFO "OMAP24xx GPIO hardware version %d.%d\n", (rev >> 4) & 0x0f, rev & 0x0f); } #endif @@ -1306,8 +1054,9 @@ static int __init _omap_gpio_init(void) bank->reserved_map = 0; bank->base = IO_ADDRESS(bank->base); spin_lock_init(&bank->lock); - if (bank_is_mpuio(bank)) + if (bank->method == METHOD_MPUIO) { omap_writew(0xFFFF, OMAP_MPUIO_BASE + OMAP_MPUIO_GPIO_MASKIT); + } #ifdef CONFIG_ARCH_OMAP15XX if (bank->method == METHOD_GPIO_1510) { __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK); @@ -1331,25 +1080,15 @@ static int __init _omap_gpio_init(void) #endif #ifdef CONFIG_ARCH_OMAP24XX if (bank->method == METHOD_GPIO_24XX) { - static const u32 non_wakeup_gpios[] = { - 0xe203ffc0, 0x08700040 - }; - __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1); __raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1); - __raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG); - /* Initialize interface clock ungated, module enabled */ - __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL); - if (i < ARRAY_SIZE(non_wakeup_gpios)) - bank->non_wakeup_gpios = non_wakeup_gpios[i]; gpio_count = 32; } #endif for (j = bank->virtual_irq_start; j < bank->virtual_irq_start + gpio_count; j++) { - set_irq_chip_data(j, bank); - if (bank_is_mpuio(bank)) + if (bank->method == METHOD_MPUIO) set_irq_chip(j, &mpuio_irq_chip); else set_irq_chip(j, &gpio_irq_chip); @@ -1365,12 +1104,6 @@ static int __init _omap_gpio_init(void) if (cpu_is_omap16xx()) omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04, ULPD_CAM_CLK_CTRL); -#ifdef CONFIG_ARCH_OMAP24XX - /* Enable autoidle for the OCP interface */ - if (cpu_is_omap24xx()) - omap_writel(1 << 0, 0x48019010); -#endif - return 0; } @@ -1389,20 +1122,16 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) void __iomem *wake_set; switch (bank->method) { -#ifdef CONFIG_ARCH_OMAP16XX case METHOD_GPIO_1610: wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE; wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA; wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; break; -#endif -#ifdef CONFIG_ARCH_OMAP24XX case METHOD_GPIO_24XX: wake_status = bank->base + OMAP24XX_GPIO_SETWKUENA; wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; break; -#endif default: continue; } @@ -1430,18 +1159,14 @@ static int omap_gpio_resume(struct sys_device *dev) void __iomem *wake_set; switch (bank->method) { -#ifdef CONFIG_ARCH_OMAP16XX case METHOD_GPIO_1610: wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA; wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; break; -#endif -#ifdef CONFIG_ARCH_OMAP24XX case METHOD_GPIO_24XX: wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; break; -#endif default: continue; } @@ -1465,80 +1190,6 @@ static struct sys_device omap_gpio_device = { .id = 0, .cls = &omap_gpio_sysclass, }; - -#endif - -#ifdef CONFIG_ARCH_OMAP24XX - -static int workaround_enabled; - -void omap2_gpio_prepare_for_retention(void) -{ - int i, c = 0; - - /* Remove triggering for all non-wakeup GPIOs. Otherwise spurious - * IRQs will be generated. See OMAP2420 Errata item 1.101. */ - for (i = 0; i < gpio_bank_count; i++) { - struct gpio_bank *bank = &gpio_bank[i]; - u32 l1, l2; - - if (!(bank->enabled_non_wakeup_gpios)) - continue; - bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); - l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); - l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); - bank->saved_fallingdetect = l1; - bank->saved_risingdetect = l2; - l1 &= ~bank->enabled_non_wakeup_gpios; - l2 &= ~bank->enabled_non_wakeup_gpios; - __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT); - __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT); - c++; - } - if (!c) { - workaround_enabled = 0; - return; - } - workaround_enabled = 1; -} - -void omap2_gpio_resume_after_retention(void) -{ - int i; - - if (!workaround_enabled) - return; - for (i = 0; i < gpio_bank_count; i++) { - struct gpio_bank *bank = &gpio_bank[i]; - u32 l; - - if (!(bank->enabled_non_wakeup_gpios)) - continue; - __raw_writel(bank->saved_fallingdetect, - bank->base + OMAP24XX_GPIO_FALLINGDETECT); - __raw_writel(bank->saved_risingdetect, - bank->base + OMAP24XX_GPIO_RISINGDETECT); - /* Check if any of the non-wakeup interrupt GPIOs have changed - * state. If so, generate an IRQ by software. This is - * horribly racy, but it's the best we can do to work around - * this silicon bug. */ - l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); - l ^= bank->saved_datain; - l &= bank->non_wakeup_gpios; - if (l) { - u32 old0, old1; - - old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); - old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); - __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0); - __raw_writel(old1 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT1); - __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0); - __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1); - } - } - -} - #endif /* @@ -1560,8 +1211,6 @@ static int __init omap_gpio_sysinit(void) if (!initialized) ret = _omap_gpio_init(); - mpuio_init(); - #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) if (cpu_is_omap16xx() || cpu_is_omap24xx()) { if (ret == 0) { @@ -1582,128 +1231,3 @@ EXPORT_SYMBOL(omap_set_gpio_dataout); EXPORT_SYMBOL(omap_get_gpio_datain); arch_initcall(omap_gpio_sysinit); - - -#ifdef CONFIG_DEBUG_FS - -#include -#include - -static int gpio_is_input(struct gpio_bank *bank, int mask) -{ - void __iomem *reg = bank->base; - - switch (bank->method) { - case METHOD_MPUIO: - reg += OMAP_MPUIO_IO_CNTL; - break; - case METHOD_GPIO_1510: - reg += OMAP1510_GPIO_DIR_CONTROL; - break; - case METHOD_GPIO_1610: - reg += OMAP1610_GPIO_DIRECTION; - break; - case METHOD_GPIO_730: - reg += OMAP730_GPIO_DIR_CONTROL; - break; - case METHOD_GPIO_24XX: - reg += OMAP24XX_GPIO_OE; - break; - } - return __raw_readl(reg) & mask; -} - - -static int dbg_gpio_show(struct seq_file *s, void *unused) -{ - unsigned i, j, gpio; - - for (i = 0, gpio = 0; i < gpio_bank_count; i++) { - struct gpio_bank *bank = gpio_bank + i; - unsigned bankwidth = 16; - u32 mask = 1; - - if (bank_is_mpuio(bank)) - gpio = OMAP_MPUIO(0); - else if (cpu_is_omap24xx() || cpu_is_omap730()) - bankwidth = 32; - - for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) { - unsigned irq, value, is_in, irqstat; - - if (!(bank->reserved_map & mask)) - continue; - - irq = bank->virtual_irq_start + j; - value = omap_get_gpio_datain(gpio); - is_in = gpio_is_input(bank, mask); - - if (bank_is_mpuio(bank)) - seq_printf(s, "MPUIO %2d: ", j); - else - seq_printf(s, "GPIO %3d: ", gpio); - seq_printf(s, "%s %s", - is_in ? "in " : "out", - value ? "hi" : "lo"); - - irqstat = irq_desc[irq].status; - if (is_in && ((bank->suspend_wakeup & mask) - || irqstat & IRQ_TYPE_SENSE_MASK)) { - char *trigger = NULL; - - switch (irqstat & IRQ_TYPE_SENSE_MASK) { - case IRQ_TYPE_EDGE_FALLING: - trigger = "falling"; - break; - case IRQ_TYPE_EDGE_RISING: - trigger = "rising"; - break; - case IRQ_TYPE_EDGE_BOTH: - trigger = "bothedge"; - break; - case IRQ_TYPE_LEVEL_LOW: - trigger = "low"; - break; - case IRQ_TYPE_LEVEL_HIGH: - trigger = "high"; - break; - case IRQ_TYPE_NONE: - trigger = "(unspecified)"; - break; - } - seq_printf(s, ", irq-%d %s%s", - irq, trigger, - (bank->suspend_wakeup & mask) - ? " wakeup" : ""); - } - seq_printf(s, "\n"); - } - - if (bank_is_mpuio(bank)) { - seq_printf(s, "\n"); - gpio = 0; - } - } - return 0; -} - -static int dbg_gpio_open(struct inode *inode, struct file *file) -{ - return single_open(file, dbg_gpio_show, &inode->i_private); -} - -static const struct file_operations debug_fops = { - .open = dbg_gpio_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static int __init omap_gpio_debuginit(void) -{ - (void) debugfs_create_file("omap_gpio", S_IRUGO, - NULL, NULL, &debug_fops); - return 0; -} -late_initcall(omap_gpio_debuginit); -#endif diff --git a/trunk/arch/arm/plat-omap/mcbsp.c b/trunk/arch/arm/plat-omap/mcbsp.c index f7b9ccdaacbc..b8d6f17ff58f 100644 --- a/trunk/arch/arm/plat-omap/mcbsp.c +++ b/trunk/arch/arm/plat-omap/mcbsp.c @@ -225,16 +225,11 @@ static void omap_mcbsp_dsp_free(void) #ifdef CONFIG_ARCH_OMAP2 static void omap2_mcbsp2_mux_setup(void) { - if (cpu_is_omap2420()) { - omap_cfg_reg(Y15_24XX_MCBSP2_CLKX); - omap_cfg_reg(R14_24XX_MCBSP2_FSX); - omap_cfg_reg(W15_24XX_MCBSP2_DR); - omap_cfg_reg(V15_24XX_MCBSP2_DX); - omap_cfg_reg(V14_24XX_GPIO117); - } - /* - * Need to add MUX settings for OMAP 2430 SDP - */ + omap_cfg_reg(Y15_24XX_MCBSP2_CLKX); + omap_cfg_reg(R14_24XX_MCBSP2_FSX); + omap_cfg_reg(W15_24XX_MCBSP2_DR); + omap_cfg_reg(V15_24XX_MCBSP2_DX); + omap_cfg_reg(V14_24XX_GPIO117); } #endif