From 741ab2b83101bae3633c1e3dad73ff5fdeebb1e2 Mon Sep 17 00:00:00 2001 From: Sandeep Gopalpet Date: Wed, 16 Dec 2009 01:14:58 +0000 Subject: [PATCH] --- yaml --- r: 178139 b: refs/heads/master c: 1ccb8389f26f2d513b06abe45d8e0b8f32458302 h: refs/heads/master i: 178137: 5d570e7d02eb91ffdac2975ed538db73c9985faf 178135: 2c10c0d93f191bc4c6ebe8e89edca1b249d02ff4 v: v3 --- [refs] | 2 +- trunk/drivers/net/gianfar.c | 8 +++++++- trunk/drivers/net/gianfar.h | 4 ++++ 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index d49e6c94fff5..f87df7f68752 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: e6bf95ffa8d6f8f4b7ee33ea01490d95b0bbeb6e +refs/heads/master: 1ccb8389f26f2d513b06abe45d8e0b8f32458302 diff --git a/trunk/drivers/net/gianfar.c b/trunk/drivers/net/gianfar.c index 6850dc0a7b91..1616531a71f7 100644 --- a/trunk/drivers/net/gianfar.c +++ b/trunk/drivers/net/gianfar.c @@ -357,8 +357,11 @@ static void gfar_init_mac(struct net_device *ndev) /* Configure the coalescing support */ gfar_configure_coalescing(priv, 0xFF, 0xFF); - if (priv->rx_filer_enable) + if (priv->rx_filer_enable) { rctrl |= RCTRL_FILREN; + /* Program the RIR0 reg with the required distribution */ + gfar_write(®s->rir0, DEFAULT_RIR0); + } if (priv->rx_csum_enable) rctrl |= RCTRL_CHECKSUMMING; @@ -1022,6 +1025,9 @@ static int gfar_probe(struct of_device *ofdev, priv->rx_queue[i]->rxic = DEFAULT_RXIC; } + /* enable filer if using multiple RX queues*/ + if(priv->num_rx_queues > 1) + priv->rx_filer_enable = 1; /* Enable most messages by default */ priv->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1; diff --git a/trunk/drivers/net/gianfar.h b/trunk/drivers/net/gianfar.h index cbb451011cb5..68d16dc6e7c8 100644 --- a/trunk/drivers/net/gianfar.h +++ b/trunk/drivers/net/gianfar.h @@ -401,6 +401,10 @@ extern const char gfar_driver_version[]; #define FPR_FILER_MASK 0xFFFFFFFF #define MAX_FILER_IDX 0xFF +/* This default RIR value directly corresponds + * to the 3-bit hash value generated */ +#define DEFAULT_RIR0 0x05397700 + /* RQFCR register bits */ #define RQFCR_GPI 0x80000000 #define RQFCR_HASHTBL_Q 0x00000000