From 747d51f2e987437a2bc3a69eb413d3d0801a1dc3 Mon Sep 17 00:00:00 2001 From: Shanyu Zhao Date: Tue, 16 Mar 2010 10:22:26 -0700 Subject: [PATCH] --- yaml --- r: 189514 b: refs/heads/master c: 48a6be6a0dd3982bb2d48e82b3e6f5458d9f3c63 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/net/wireless/iwlwifi/iwl-agn.c | 10 +++++++++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 10fcaa1493a8..387c021bc56b 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: be6b38bcb175613f239e0b302607db346472c6b6 +refs/heads/master: 48a6be6a0dd3982bb2d48e82b3e6f5458d9f3c63 diff --git a/trunk/drivers/net/wireless/iwlwifi/iwl-agn.c b/trunk/drivers/net/wireless/iwlwifi/iwl-agn.c index c8e2e3a42b4b..e4c2e1e448ad 100644 --- a/trunk/drivers/net/wireless/iwlwifi/iwl-agn.c +++ b/trunk/drivers/net/wireless/iwlwifi/iwl-agn.c @@ -1258,7 +1258,15 @@ static void iwl_irq_tasklet(struct iwl_priv *priv) /* Ack/clear/reset pending uCode interrupts. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, */ - iwl_write32(priv, CSR_INT, priv->inta); + /* There is a hardware bug in the interrupt mask function that some + * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if + * they are disabled in the CSR_INT_MASK register. Furthermore the + * ICT interrupt handling mechanism has another bug that might cause + * these unmasked interrupts fail to be detected. We workaround the + * hardware bugs here by ACKing all the possible interrupts so that + * interrupt coalescing can still be achieved. + */ + iwl_write32(priv, CSR_INT, priv->inta | ~priv->inta_mask); inta = priv->inta;