From 75d69f930aaa325d5746025f09951edfc97dcc54 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Tue, 26 Jul 2011 18:45:54 +0100 Subject: [PATCH] --- yaml --- r: 264623 b: refs/heads/master c: 3f8e288033ec7f52b570efad7c2eb42741f6d710 h: refs/heads/master i: 264621: 254d7c7f6e5de9b6e67090bf6aca4c8827e612ca 264619: befb3bb7f31d2e1bd7f8a30b6a5a8e41f52925b6 264615: 04ecde80f75430c92bf6692c7b39861045f5870e 264607: a2881c20732b9937411621ea249d5de1b9ba4c69 v: v3 --- [refs] | 2 +- .../ABI/testing/sysfs-class-scsi_host | 13 - .../DocBook/media/v4l/controls.xml | 38 +- trunk/Documentation/cgroups/memory.txt | 85 ++++- .../devicetree/bindings/arm/l2cc.txt | 44 --- trunk/Documentation/hwmon/coretemp | 14 +- trunk/Documentation/ioctl/ioctl-number.txt | 2 - trunk/Documentation/kernel-parameters.txt | 16 +- trunk/Documentation/networking/dmfe.txt | 3 +- trunk/Documentation/networking/ip-sysctl.txt | 4 +- trunk/Documentation/networking/scaling.txt | 12 +- trunk/Documentation/vm/transhuge.txt | 7 +- trunk/MAINTAINERS | 32 +- trunk/Makefile | 2 +- trunk/arch/alpha/Kconfig | 2 +- trunk/arch/arm/Kconfig | 69 +--- trunk/arch/arm/Kconfig.debug | 91 ++--- trunk/arch/arm/Makefile | 3 - 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trunk/drivers/net/tg3.c | 4 +- trunk/drivers/net/usb/ipheth.c | 5 - .../net/wireless/ath/ath9k/ar9002_calib.c | 3 +- .../wireless/ath/ath9k/ar9003_2p2_initvals.h | 2 +- .../net/wireless/ath/ath9k/ar9003_phy.c | 2 +- trunk/drivers/net/wireless/ath/ath9k/main.c | 6 - trunk/drivers/net/wireless/ath/ath9k/recv.c | 10 +- trunk/drivers/net/wireless/b43/main.c | 3 +- trunk/drivers/net/wireless/ipw2x00/ipw2100.c | 21 +- trunk/drivers/net/wireless/ipw2x00/ipw2200.c | 39 +- .../net/wireless/iwlegacy/iwl-3945-rs.c | 13 +- .../drivers/net/wireless/iwlegacy/iwl-core.c | 4 +- .../drivers/net/wireless/iwlegacy/iwl-hcmd.c | 2 +- trunk/drivers/net/wireless/iwlegacy/iwl-tx.c | 4 +- .../net/wireless/iwlegacy/iwl3945-base.c | 8 +- .../net/wireless/iwlegacy/iwl4965-base.c | 10 +- .../net/wireless/iwlwifi/iwl-agn-ucode.c | 2 +- trunk/drivers/net/wireless/iwlwifi/iwl-agn.c | 5 - trunk/drivers/net/wireless/iwlwifi/iwl-scan.c | 30 +- .../net/wireless/iwlwifi/iwl-trans-tx-pcie.c | 2 - trunk/drivers/net/wireless/rt2x00/rt2800lib.c | 47 ++- trunk/drivers/net/wireless/rtlwifi/core.c | 8 - .../net/wireless/rtlwifi/rtl8192cu/trx.c | 11 +- trunk/drivers/net/wireless/rtlwifi/usb.c | 1 - trunk/drivers/net/xen-netback/interface.c | 4 +- trunk/drivers/pci/pci.c | 6 +- trunk/drivers/pci/probe.c | 17 +- trunk/drivers/rtc/rtc-imxdi.c | 1 - trunk/drivers/rtc/rtc-s3c.c | 26 -- trunk/drivers/s390/cio/cio.c | 8 +- trunk/drivers/scsi/3w-9xxx.c | 2 - trunk/drivers/scsi/Kconfig | 1 - trunk/drivers/scsi/Makefile | 2 +- trunk/drivers/scsi/aacraid/commsup.c | 2 - trunk/drivers/scsi/bnx2i/bnx2i_hwi.c | 2 +- trunk/drivers/scsi/cxgbi/cxgb3i/cxgb3i.c | 2 +- trunk/drivers/scsi/fcoe/fcoe.c | 13 +- trunk/drivers/scsi/hpsa.c | 57 +-- trunk/drivers/scsi/isci/host.c | 13 +- trunk/drivers/scsi/isci/host.h | 3 - trunk/drivers/scsi/isci/init.c | 47 +-- trunk/drivers/scsi/isci/phy.c | 13 - trunk/drivers/scsi/isci/registers.h | 12 - trunk/drivers/scsi/isci/request.c | 30 +- .../scsi/isci/unsolicited_frame_control.c | 2 +- .../scsi/isci/unsolicited_frame_control.h | 2 +- trunk/drivers/scsi/libfc/fc_exch.c | 59 +-- trunk/drivers/scsi/libfc/fc_fcp.c | 11 +- trunk/drivers/scsi/libfc/fc_lport.c | 11 +- trunk/drivers/scsi/libsas/sas_expander.c | 12 +- trunk/drivers/scsi/qla2xxx/qla_attr.c | 7 +- trunk/drivers/scsi/qla2xxx/qla_dbg.c | 36 +- trunk/drivers/scsi/qla2xxx/qla_def.h | 2 - trunk/drivers/scsi/qla2xxx/qla_fw.h | 5 - trunk/drivers/scsi/qla2xxx/qla_init.c | 3 + trunk/drivers/scsi/qla2xxx/qla_inline.h | 29 -- trunk/drivers/scsi/qla2xxx/qla_iocb.c | 282 +++----------- trunk/drivers/scsi/qla2xxx/qla_isr.c | 109 ++---- trunk/drivers/scsi/qla2xxx/qla_mid.c | 2 +- trunk/drivers/scsi/qla2xxx/qla_nx.c | 25 +- trunk/drivers/scsi/qla2xxx/qla_os.c | 39 +- trunk/drivers/scsi/qla2xxx/qla_version.h | 2 +- trunk/drivers/scsi/qla4xxx/Kconfig | 2 +- trunk/drivers/spi/spi-fsl-spi.c | 3 - trunk/drivers/spi/spi-imx.c | 4 +- trunk/drivers/spi/spi-topcliff-pch.c | 93 ++--- .../drivers/staging/comedi/drivers/ni_labpc.c | 4 +- trunk/drivers/staging/octeon/ethernet-rx.c | 3 +- trunk/drivers/staging/zcache/zcache-main.c | 2 +- .../target/iscsi/iscsi_target_parameters.c | 2 +- .../drivers/target/iscsi/iscsi_target_util.c | 270 ++++++++++++-- trunk/drivers/target/target_core_cdb.c | 35 +- trunk/drivers/target/target_core_transport.c | 9 +- trunk/drivers/target/tcm_fc/tcm_fc.h | 12 +- trunk/drivers/target/tcm_fc/tfc_cmd.c | 90 ++++- trunk/drivers/target/tcm_fc/tfc_conf.c | 7 +- trunk/drivers/target/tcm_fc/tfc_io.c | 62 ++-- trunk/drivers/tty/serial/crisv10.c | 4 +- trunk/drivers/tty/serial/lantiq.c | 4 +- trunk/drivers/usb/host/xhci-hub.c | 2 +- trunk/drivers/usb/host/xhci-ring.c | 19 - trunk/drivers/watchdog/hpwdt.c | 9 +- trunk/drivers/watchdog/lantiq_wdt.c | 8 +- trunk/drivers/watchdog/sbc_epx_c3.c | 2 +- trunk/drivers/watchdog/watchdog_dev.c | 14 +- trunk/drivers/xen/events.c | 40 +- trunk/drivers/zorro/zorro.c | 7 +- trunk/fs/btrfs/btrfs_inode.h | 6 +- trunk/fs/btrfs/file-item.c | 4 +- trunk/fs/btrfs/file.c | 49 +-- trunk/fs/btrfs/free-space-cache.c | 4 - trunk/fs/btrfs/inode.c | 40 +- trunk/fs/btrfs/ioctl.c | 51 +-- trunk/fs/btrfs/transaction.c | 4 - trunk/fs/btrfs/xattr.c | 9 - trunk/fs/cifs/cifsencrypt.c | 54 ++- trunk/fs/cifs/cifsfs.c | 10 +- trunk/fs/cifs/cifssmb.c | 3 +- trunk/fs/cifs/connect.c | 6 +- trunk/fs/ext3/inode.c | 4 +- trunk/fs/ext3/namei.c | 3 +- trunk/fs/ext4/inode.c | 4 +- trunk/fs/ext4/namei.c | 3 +- trunk/fs/fuse/dev.c | 12 +- trunk/fs/fuse/inode.c | 3 - trunk/fs/gfs2/log.c | 4 +- trunk/fs/gfs2/meta_io.c | 6 +- trunk/fs/gfs2/ops_fstype.c | 2 +- trunk/fs/gfs2/quota.c | 2 +- trunk/fs/hfsplus/super.c | 15 +- trunk/fs/hfsplus/wrapper.c | 4 +- trunk/fs/namei.c | 12 +- trunk/fs/namespace.c | 2 +- trunk/fs/nfs/nfs4_fs.h | 8 +- trunk/fs/nfs/nfs4proc.c | 20 +- trunk/fs/nfs/nfs4renewd.c | 12 +- trunk/fs/nfs/nfs4state.c | 6 - trunk/fs/nfs/super.c | 25 +- trunk/fs/nfs/write.c | 2 +- trunk/fs/proc/task_mmu.c | 80 ++-- trunk/fs/quota/quota.c | 2 +- trunk/fs/stat.c | 2 + trunk/fs/xfs/xfs_aops.c | 3 +- trunk/fs/xfs/xfs_buf_item.c | 3 +- trunk/fs/xfs/xfs_dquot_item.c | 10 +- trunk/fs/xfs/xfs_inode_item.c | 10 +- trunk/fs/xfs/xfs_linux.h | 2 - trunk/fs/xfs/xfs_super.c | 13 +- trunk/fs/xfs/xfs_trans.h | 2 +- trunk/fs/xfs/xfs_trans_ail.c | 83 ++--- trunk/fs/xfs/xfs_trans_priv.h | 8 +- trunk/include/linux/basic_mmio_gpio.h | 15 +- trunk/include/linux/blk_types.h | 6 +- trunk/include/linux/blkdev.h | 1 + trunk/include/linux/device-mapper.h | 5 - trunk/include/linux/fs.h | 2 + trunk/include/linux/irqdomain.h | 1 - trunk/include/linux/kvm.h | 1 - trunk/include/linux/memcontrol.h | 19 + trunk/include/linux/mfd/wm8994/pdata.h | 2 +- trunk/include/linux/namei.h | 3 +- trunk/include/linux/pci.h | 3 +- trunk/include/linux/ptp_classify.h | 13 +- trunk/include/linux/sched.h | 1 + trunk/include/linux/skbuff.h | 1 - trunk/include/linux/snmp.h | 2 - trunk/include/linux/swap.h | 6 - trunk/include/net/flow.h | 25 +- trunk/include/net/ip_vs.h | 1 - trunk/include/net/request_sock.h | 3 +- trunk/include/net/sctp/command.h | 1 - trunk/include/net/tcp.h | 22 +- trunk/include/net/transp_v6.h | 1 - trunk/include/net/udplite.h | 63 ++-- trunk/include/trace/events/writeback.h | 10 +- trunk/init/main.c | 19 +- trunk/kernel/irq/chip.c | 2 +- trunk/kernel/irq/irqdomain.c | 6 +- trunk/kernel/posix-cpu-timers.c | 12 +- trunk/kernel/ptrace.c | 23 +- trunk/kernel/resource.c | 7 +- trunk/kernel/sched.c | 26 +- trunk/kernel/sched_rt.c | 4 +- trunk/kernel/sys.c | 2 +- trunk/kernel/taskstats.c | 1 - trunk/kernel/tsacct.c | 15 +- trunk/kernel/workqueue.c | 7 +- trunk/lib/Kconfig.debug | 4 +- trunk/lib/sha1.c | 1 - trunk/lib/xz/xz_dec_bcj.c | 27 +- trunk/mm/backing-dev.c | 30 +- trunk/mm/filemap.c | 6 +- trunk/mm/memcontrol.c | 172 ++++++++- trunk/mm/mempolicy.c | 9 +- trunk/mm/migrate.c | 8 +- trunk/mm/slub.c | 2 +- trunk/mm/vmalloc.c | 8 - trunk/mm/vmscan.c | 66 +++- trunk/mm/vmstat.c | 4 +- trunk/net/batman-adv/soft-interface.c | 10 +- trunk/net/bluetooth/hci_event.c | 17 +- trunk/net/bluetooth/l2cap_sock.c | 4 - trunk/net/bluetooth/rfcomm/sock.c | 3 - trunk/net/bluetooth/sco.c | 5 +- trunk/net/bridge/br_device.c | 3 + trunk/net/bridge/br_if.c | 9 +- trunk/net/bridge/br_netlink.c | 1 - trunk/net/bridge/br_private.h | 1 - trunk/net/bridge/netfilter/Kconfig | 2 +- trunk/net/caif/caif_dev.c | 6 +- trunk/net/can/af_can.c | 2 +- trunk/net/can/bcm.c | 53 +-- trunk/net/ceph/ceph_common.c | 1 - trunk/net/ceph/messenger.c | 1 - trunk/net/ceph/osd_client.c | 4 +- trunk/net/ceph/osdmap.c | 84 ++--- trunk/net/core/dev.c | 8 - trunk/net/core/fib_rules.c | 9 +- trunk/net/core/flow.c | 36 +- trunk/net/core/skbuff.c | 22 +- trunk/net/ethernet/eth.c | 2 +- trunk/net/ipv4/af_inet.c | 7 +- trunk/net/ipv4/fib_semantics.c | 10 +- trunk/net/ipv4/netfilter/ip_queue.c | 12 +- trunk/net/ipv4/proc.c | 2 - trunk/net/ipv4/tcp_input.c | 6 +- trunk/net/ipv4/tcp_ipv4.c | 60 ++- trunk/net/ipv4/tcp_minisocks.c | 1 - trunk/net/ipv6/addrconf.c | 4 +- trunk/net/ipv6/af_inet6.c | 1 - trunk/net/ipv6/datagram.c | 5 +- trunk/net/ipv6/ip6_flowlabel.c | 8 +- trunk/net/ipv6/ip6mr.c | 8 +- trunk/net/ipv6/ipv6_sockglue.c | 2 +- trunk/net/ipv6/netfilter/ip6_queue.c | 12 +- trunk/net/ipv6/raw.c | 4 +- trunk/net/ipv6/route.c | 37 +- trunk/net/ipv6/tcp_ipv6.c | 42 ++- trunk/net/ipv6/udp.c | 4 +- trunk/net/irda/irsysctl.c | 6 +- trunk/net/irda/qos.c | 6 +- trunk/net/l2tp/l2tp_core.c | 4 +- trunk/net/mac80211/sta_info.c | 2 +- trunk/net/netfilter/ipvs/ip_vs_ctl.c | 133 +++---- trunk/net/netfilter/ipvs/ip_vs_sync.c | 6 - trunk/net/netfilter/nf_conntrack_pptp.c | 1 - trunk/net/netfilter/nf_conntrack_proto_gre.c | 4 +- trunk/net/netfilter/nf_conntrack_proto_tcp.c | 6 +- trunk/net/netfilter/nfnetlink_queue.c | 4 +- trunk/net/netfilter/xt_rateest.c | 9 +- trunk/net/packet/af_packet.c | 5 +- trunk/net/rds/iw_rdma.c | 13 +- trunk/net/sched/cls_rsvp.h | 27 +- trunk/net/sctp/sm_sideeffect.c | 5 - trunk/net/sctp/sm_statefuns.c | 6 - trunk/net/wireless/nl80211.c | 5 +- trunk/net/wireless/reg.c | 1 - trunk/net/wireless/sme.c | 2 - trunk/net/x25/af_x25.c | 40 +- trunk/net/x25/x25_dev.c | 6 - trunk/net/x25/x25_facilities.c | 10 +- trunk/net/x25/x25_in.c | 43 +-- trunk/net/x25/x25_link.c | 3 - trunk/net/x25/x25_subr.c | 14 +- trunk/net/xfrm/xfrm_input.c | 5 - trunk/net/xfrm/xfrm_policy.c | 10 +- trunk/security/security.c | 1 - trunk/sound/core/pcm_lib.c | 33 +- trunk/sound/pci/fm801.c | 15 +- trunk/sound/pci/hda/hda_codec.c | 6 +- trunk/sound/pci/hda/hda_intel.c | 10 +- trunk/sound/pci/hda/patch_cirrus.c | 2 +- trunk/sound/pci/hda/patch_conexant.c | 1 - trunk/sound/pci/hda/patch_realtek.c | 17 +- trunk/sound/pci/hda/patch_sigmatel.c | 2 - trunk/sound/soc/blackfin/bf5xx-ad193x.c | 4 +- trunk/sound/soc/blackfin/bf5xx-ad73311.c | 2 +- trunk/sound/soc/codecs/ssm2602.c | 3 +- trunk/sound/soc/codecs/wm8753.c | 4 +- trunk/sound/soc/codecs/wm8962.c | 26 ++ trunk/sound/soc/fsl/mpc5200_dma.c | 6 +- trunk/sound/soc/imx/imx-pcm-fiq.c | 1 + trunk/sound/soc/kirkwood/kirkwood-i2s.c | 2 +- trunk/sound/soc/omap/mcpdm.c | 2 +- trunk/sound/soc/omap/mcpdm.h | 2 +- trunk/sound/soc/omap/omap-mcbsp.c | 6 - trunk/sound/soc/pxa/zylonite.c | 8 +- trunk/sound/soc/soc-cache.c | 12 +- trunk/sound/soc/soc-core.c | 22 +- trunk/sound/soc/soc-dapm.c | 2 +- trunk/sound/soc/soc-jack.c | 2 +- trunk/sound/usb/card.c | 7 +- trunk/tools/perf/Makefile | 9 +- trunk/tools/perf/builtin-record.c | 3 - trunk/tools/perf/builtin-test.c | 2 +- trunk/tools/perf/builtin-top.c | 9 +- trunk/tools/perf/util/event.c | 5 - trunk/tools/perf/util/event.h | 2 +- trunk/tools/perf/util/evlist.c | 13 - trunk/tools/perf/util/evlist.h | 1 - trunk/tools/perf/util/evsel.c | 57 +-- trunk/tools/perf/util/probe-finder.c | 2 +- trunk/tools/perf/util/python.c | 2 +- trunk/tools/perf/util/session.h | 3 +- trunk/tools/perf/util/sort.c | 10 +- trunk/tools/perf/util/symbol.c | 153 ++------ 692 files changed, 4516 insertions(+), 6431 deletions(-) delete mode 100644 trunk/Documentation/ABI/testing/sysfs-class-scsi_host delete mode 100644 trunk/Documentation/devicetree/bindings/arm/l2cc.txt delete mode 100644 trunk/arch/arm/include/asm/auxvec.h delete mode 100644 trunk/arch/arm/include/asm/bitsperlong.h delete mode 100644 trunk/arch/arm/include/asm/cputime.h delete mode 100644 trunk/arch/arm/include/asm/emergency-restart.h delete mode 100644 trunk/arch/arm/include/asm/errno.h delete mode 100644 trunk/arch/arm/include/asm/exception.h delete mode 100644 trunk/arch/arm/include/asm/ioctl.h delete mode 100644 trunk/arch/arm/include/asm/irq_regs.h delete mode 100644 trunk/arch/arm/include/asm/kdebug.h delete mode 100644 trunk/arch/arm/include/asm/local.h delete mode 100644 trunk/arch/arm/include/asm/local64.h delete mode 100644 trunk/arch/arm/include/asm/percpu.h delete mode 100644 trunk/arch/arm/include/asm/pgtable-2level-hwdef.h delete mode 100644 trunk/arch/arm/include/asm/pgtable-2level-types.h delete mode 100644 trunk/arch/arm/include/asm/pgtable-2level.h delete mode 100644 trunk/arch/arm/include/asm/poll.h delete mode 100644 trunk/arch/arm/include/asm/resource.h delete mode 100644 trunk/arch/arm/include/asm/sections.h delete mode 100644 trunk/arch/arm/include/asm/siginfo.h delete mode 100644 trunk/arch/arm/include/asm/sizes.h delete mode 100644 trunk/arch/arm/kernel/topology.c diff --git a/[refs] b/[refs] index e5626772b53c..925d2d580da6 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 06afb1a087d49ae0f676b2e5b9ffe5f4b3aba355 +refs/heads/master: 3f8e288033ec7f52b570efad7c2eb42741f6d710 diff --git a/trunk/Documentation/ABI/testing/sysfs-class-scsi_host b/trunk/Documentation/ABI/testing/sysfs-class-scsi_host deleted file mode 100644 index 29a4f892e433..000000000000 --- a/trunk/Documentation/ABI/testing/sysfs-class-scsi_host +++ /dev/null @@ -1,13 +0,0 @@ -What: /sys/class/scsi_host/hostX/isci_id -Date: June 2011 -Contact: Dave Jiang -Description: - This file contains the enumerated host ID for the Intel - SCU controller. The Intel(R) C600 Series Chipset SATA/SAS - Storage Control Unit embeds up to two 4-port controllers in - a single PCI device. The controllers are enumerated in order - which usually means the lowest number scsi_host corresponds - with the first controller, but this association is not - guaranteed. The 'isci_id' attribute unambiguously identifies - the controller index: '0' for the first controller, - '1' for the second. diff --git a/trunk/Documentation/DocBook/media/v4l/controls.xml b/trunk/Documentation/DocBook/media/v4l/controls.xml index 23fdf79f8cf3..85164016ed26 100644 --- a/trunk/Documentation/DocBook/media/v4l/controls.xml +++ b/trunk/Documentation/DocBook/media/v4l/controls.xml @@ -1455,7 +1455,7 @@ Applicable to the H264 encoder. - + V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC  enum v4l2_mpeg_video_h264_vui_sar_idc @@ -1561,7 +1561,7 @@ Applicable to the H264 encoder. - + V4L2_CID_MPEG_VIDEO_H264_LEVEL  enum v4l2_mpeg_video_h264_level @@ -1641,7 +1641,7 @@ Possible values are: - + V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL  enum v4l2_mpeg_video_mpeg4_level @@ -1689,9 +1689,9 @@ Possible values are: - + V4L2_CID_MPEG_VIDEO_H264_PROFILE  - enum v4l2_mpeg_video_h264_profile + enum v4l2_mpeg_h264_profile The profile information for H264. Applicable to the H264 encoder. @@ -1774,9 +1774,9 @@ Possible values are: - + V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE  - enum v4l2_mpeg_video_mpeg4_profile + enum v4l2_mpeg_mpeg4_profile The profile information for MPEG4. Applicable to the MPEG4 encoder. @@ -1820,9 +1820,9 @@ Applicable to the encoder. - + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE  - enum v4l2_mpeg_video_multi_slice_mode + enum v4l2_mpeg_multi_slice_mode Determines how the encoder should handle division of frame into slices. Applicable to the encoder. @@ -1868,9 +1868,9 @@ Applicable to the encoder. - + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE  - enum v4l2_mpeg_video_h264_loop_filter_mode + enum v4l2_mpeg_h264_loop_filter_mode Loop filter mode for H264 encoder. Possible values are: @@ -1913,9 +1913,9 @@ Applicable to the H264 encoder. - + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE  - enum v4l2_mpeg_video_h264_entropy_mode + enum v4l2_mpeg_h264_symbol_mode Entropy coding mode for H264 - CABAC/CAVALC. Applicable to the H264 encoder. @@ -2140,9 +2140,9 @@ previous frames. Applicable to the H264 encoder. - + V4L2_CID_MPEG_VIDEO_HEADER_MODE  - enum v4l2_mpeg_video_header_mode + enum v4l2_mpeg_header_mode Determines whether the header is returned as the first buffer or is it returned together with the first frame. Applicable to encoders. @@ -2320,9 +2320,9 @@ Valid only when H.264 and macroblock level RC is enabled (V4L2_CID_MPE Applicable to the H264 encoder. - + V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE  - enum v4l2_mpeg_mfc51_video_frame_skip_mode + enum v4l2_mpeg_mfc51_frame_skip_mode Indicates in what conditions the encoder should skip frames. If encoding a frame would cause the encoded stream to be larger then @@ -2361,9 +2361,9 @@ the stream will meet tight bandwidth contraints. Applicable to encoders. - + V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE  - enum v4l2_mpeg_mfc51_video_force_frame_type + enum v4l2_mpeg_mfc51_force_frame_type Force a frame type for the next queued buffer. Applicable to encoders. Possible values are: diff --git a/trunk/Documentation/cgroups/memory.txt b/trunk/Documentation/cgroups/memory.txt index 06eb6d957c83..6f3c598971fc 100644 --- a/trunk/Documentation/cgroups/memory.txt +++ b/trunk/Documentation/cgroups/memory.txt @@ -380,7 +380,7 @@ will be charged as a new owner of it. 5.2 stat file -memory.stat file includes following statistics +5.2.1 memory.stat file includes following statistics # per-memory cgroup local status cache - # of bytes of page cache memory. @@ -438,6 +438,89 @@ Note: file_mapped is accounted only when the memory cgroup is owner of page cache.) +5.2.2 memory.vmscan_stat + +memory.vmscan_stat includes statistics information for memory scanning and +freeing, reclaiming. The statistics shows memory scanning information since +memory cgroup creation and can be reset to 0 by writing 0 as + + #echo 0 > ../memory.vmscan_stat + +This file contains following statistics. + +[param]_[file_or_anon]_pages_by_[reason]_[under_heararchy] +[param]_elapsed_ns_by_[reason]_[under_hierarchy] + +For example, + + scanned_file_pages_by_limit indicates the number of scanned + file pages at vmscan. + +Now, 3 parameters are supported + + scanned - the number of pages scanned by vmscan + rotated - the number of pages activated at vmscan + freed - the number of pages freed by vmscan + +If "rotated" is high against scanned/freed, the memcg seems busy. + +Now, 2 reason are supported + + limit - the memory cgroup's limit + system - global memory pressure + softlimit + (global memory pressure not under softlimit is not handled now) + +When under_hierarchy is added in the tail, the number indicates the +total memcg scan of its children and itself. + +elapsed_ns is a elapsed time in nanosecond. This may include sleep time +and not indicates CPU usage. So, please take this as just showing +latency. + +Here is an example. + +# cat /cgroup/memory/A/memory.vmscan_stat +scanned_pages_by_limit 9471864 +scanned_anon_pages_by_limit 6640629 +scanned_file_pages_by_limit 2831235 +rotated_pages_by_limit 4243974 +rotated_anon_pages_by_limit 3971968 +rotated_file_pages_by_limit 272006 +freed_pages_by_limit 2318492 +freed_anon_pages_by_limit 962052 +freed_file_pages_by_limit 1356440 +elapsed_ns_by_limit 351386416101 +scanned_pages_by_system 0 +scanned_anon_pages_by_system 0 +scanned_file_pages_by_system 0 +rotated_pages_by_system 0 +rotated_anon_pages_by_system 0 +rotated_file_pages_by_system 0 +freed_pages_by_system 0 +freed_anon_pages_by_system 0 +freed_file_pages_by_system 0 +elapsed_ns_by_system 0 +scanned_pages_by_limit_under_hierarchy 9471864 +scanned_anon_pages_by_limit_under_hierarchy 6640629 +scanned_file_pages_by_limit_under_hierarchy 2831235 +rotated_pages_by_limit_under_hierarchy 4243974 +rotated_anon_pages_by_limit_under_hierarchy 3971968 +rotated_file_pages_by_limit_under_hierarchy 272006 +freed_pages_by_limit_under_hierarchy 2318492 +freed_anon_pages_by_limit_under_hierarchy 962052 +freed_file_pages_by_limit_under_hierarchy 1356440 +elapsed_ns_by_limit_under_hierarchy 351386416101 +scanned_pages_by_system_under_hierarchy 0 +scanned_anon_pages_by_system_under_hierarchy 0 +scanned_file_pages_by_system_under_hierarchy 0 +rotated_pages_by_system_under_hierarchy 0 +rotated_anon_pages_by_system_under_hierarchy 0 +rotated_file_pages_by_system_under_hierarchy 0 +freed_pages_by_system_under_hierarchy 0 +freed_anon_pages_by_system_under_hierarchy 0 +freed_file_pages_by_system_under_hierarchy 0 +elapsed_ns_by_system_under_hierarchy 0 + 5.3 swappiness Similar to /proc/sys/vm/swappiness, but affecting a hierarchy of groups only. diff --git a/trunk/Documentation/devicetree/bindings/arm/l2cc.txt b/trunk/Documentation/devicetree/bindings/arm/l2cc.txt deleted file mode 100644 index 7ca52161e7ab..000000000000 --- a/trunk/Documentation/devicetree/bindings/arm/l2cc.txt +++ /dev/null @@ -1,44 +0,0 @@ -* ARM L2 Cache Controller - -ARM cores often have a separate level 2 cache controller. There are various -implementations of the L2 cache controller with compatible programming models. -The ARM L2 cache representation in the device tree should be done as follows: - -Required properties: - -- compatible : should be one of: - "arm,pl310-cache" - "arm,l220-cache" - "arm,l210-cache" -- cache-unified : Specifies the cache is a unified cache. -- cache-level : Should be set to 2 for a level 2 cache. -- reg : Physical base address and size of cache controller's memory mapped - registers. - -Optional properties: - -- arm,data-latency : Cycles of latency for Data RAM accesses. Specifies 3 cells of - read, write and setup latencies. Minimum valid values are 1. Controllers - without setup latency control should use a value of 0. -- arm,tag-latency : Cycles of latency for Tag RAM accesses. Specifies 3 cells of - read, write and setup latencies. Controllers without setup latency control - should use 0. Controllers without separate read and write Tag RAM latency - values should only use the first cell. -- arm,dirty-latency : Cycles of latency for Dirty RAMs. This is a single cell. -- arm,filter-ranges : Starting address and length of window to - filter. Addresses in the filter window are directed to the M1 port. Other - addresses will go to the M0 port. -- interrupts : 1 combined interrupt. - -Example: - -L2: cache-controller { - compatible = "arm,pl310-cache"; - reg = <0xfff12000 0x1000>; - arm,data-latency = <1 1 1>; - arm,tag-latency = <2 2 2>; - arm,filter-latency = <0x80000000 0x8000000>; - cache-unified; - cache-level = <2>; - interrupts = <45>; -}; diff --git a/trunk/Documentation/hwmon/coretemp b/trunk/Documentation/hwmon/coretemp index 84d46c0c71a3..fa8776ab9b18 100644 --- a/trunk/Documentation/hwmon/coretemp +++ b/trunk/Documentation/hwmon/coretemp @@ -35,6 +35,13 @@ the Out-Of-Spec bit. Following table summarizes the exported sysfs files: All Sysfs entries are named with their core_id (represented here by 'X'). tempX_input - Core temperature (in millidegrees Celsius). tempX_max - All cooling devices should be turned on (on Core2). + Initialized with IA32_THERM_INTERRUPT. When the CPU + temperature reaches this temperature, an interrupt is + generated and tempX_max_alarm is set. +tempX_max_hyst - If the CPU temperature falls below than temperature, + an interrupt is generated and tempX_max_alarm is reset. +tempX_max_alarm - Set if the temperature reaches or exceeds tempX_max. + Reset if the temperature drops to or below tempX_max_hyst. tempX_crit - Maximum junction temperature (in millidegrees Celsius). tempX_crit_alarm - Set when Out-of-spec bit is set, never clears. Correct CPU operation is no longer guaranteed. @@ -42,10 +49,9 @@ tempX_label - Contains string "Core X", where X is processor number. For Package temp, this will be "Physical id Y", where Y is the package number. -On CPU models which support it, TjMax is read from a model-specific register. -On other models, it is set to an arbitrary value based on weak heuristics. -If these heuristics don't work for you, you can pass the correct TjMax value -as a module parameter (tjmax). +The TjMax temperature is set to 85 degrees C if undocumented model specific +register (UMSR) 0xee has bit 30 set. If not the TjMax is 100 degrees C as +(sometimes) documented in processor datasheet. Appendix A. Known TjMax lists (TBD): Some information comes from ark.intel.com diff --git a/trunk/Documentation/ioctl/ioctl-number.txt b/trunk/Documentation/ioctl/ioctl-number.txt index 54078ed96b37..845a191004b1 100644 --- a/trunk/Documentation/ioctl/ioctl-number.txt +++ b/trunk/Documentation/ioctl/ioctl-number.txt @@ -319,6 +319,4 @@ Code Seq#(hex) Include File Comments 0xF4 00-1F video/mbxfb.h mbxfb -0xF6 all LTTng Linux Trace Toolkit Next Generation - 0xFD all linux/dm-ioctl.h diff --git a/trunk/Documentation/kernel-parameters.txt b/trunk/Documentation/kernel-parameters.txt index d6e6724446c8..614d0382e2cb 100644 --- a/trunk/Documentation/kernel-parameters.txt +++ b/trunk/Documentation/kernel-parameters.txt @@ -2086,12 +2086,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted. Override pmtimer IOPort with a hex value. e.g. pmtmr=0x508 - pnp.debug=1 [PNP] - Enable PNP debug messages (depends on the - CONFIG_PNP_DEBUG_MESSAGES option). Change at run-time - via /sys/module/pnp/parameters/debug. We always show - current resource usage; turning this on also shows - possible settings and some assignment information. + pnp.debug [PNP] + Enable PNP debug messages. This depends on the + CONFIG_PNP_DEBUG_MESSAGES option. pnpacpi= [ACPI] { off } @@ -2706,11 +2703,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. functions are at fixed addresses, they make nice targets for exploits that can control RIP. - emulate Vsyscalls turn into traps and are emulated - reasonably safely. + emulate [default] Vsyscalls turn into traps and are + emulated reasonably safely. - native [default] Vsyscalls are native syscall - instructions. + native Vsyscalls are native syscall instructions. This is a little bit faster than trapping and makes a few dynamic recompilers work better than they would in emulation mode. diff --git a/trunk/Documentation/networking/dmfe.txt b/trunk/Documentation/networking/dmfe.txt index 25320bf19c86..8006c227fda2 100644 --- a/trunk/Documentation/networking/dmfe.txt +++ b/trunk/Documentation/networking/dmfe.txt @@ -1,5 +1,3 @@ -Note: This driver doesn't have a maintainer. - Davicom DM9102(A)/DM9132/DM9801 fast ethernet driver for Linux. This program is free software; you can redistribute it and/or @@ -57,6 +55,7 @@ Test and make sure PCI latency is now correct for all cases. Authors: Sten Wang : Original Author +Tobias Ringstrom : Current Maintainer Contributors: diff --git a/trunk/Documentation/networking/ip-sysctl.txt b/trunk/Documentation/networking/ip-sysctl.txt index ca5cdcd0f0e3..81546990f41c 100644 --- a/trunk/Documentation/networking/ip-sysctl.txt +++ b/trunk/Documentation/networking/ip-sysctl.txt @@ -1042,7 +1042,7 @@ conf/interface/*: The functional behaviour for certain settings is different depending on whether local forwarding is enabled or not. -accept_ra - INTEGER +accept_ra - BOOLEAN Accept Router Advertisements; autoconfigure using them. Possible values are: @@ -1106,7 +1106,7 @@ dad_transmits - INTEGER The amount of Duplicate Address Detection probes to send. Default: 1 -forwarding - INTEGER +forwarding - BOOLEAN Configure interface-specific Host/Router behaviour. Note: It is recommended to have the same setting on all diff --git a/trunk/Documentation/networking/scaling.txt b/trunk/Documentation/networking/scaling.txt index fe67b5c79f0f..58fd7414e6c0 100644 --- a/trunk/Documentation/networking/scaling.txt +++ b/trunk/Documentation/networking/scaling.txt @@ -27,7 +27,7 @@ applying a filter to each packet that assigns it to one of a small number of logical flows. Packets for each flow are steered to a separate receive queue, which in turn can be processed by separate CPUs. This mechanism is generally known as “Receive-side Scaling” (RSS). The goal of RSS and -the other scaling techniques is to increase performance uniformly. +the other scaling techniques to increase performance uniformly. Multi-queue distribution can also be used for traffic prioritization, but that is not the focus of these techniques. @@ -186,10 +186,10 @@ are steered using plain RPS. Multiple table entries may point to the same CPU. Indeed, with many flows and few CPUs, it is very likely that a single application thread handles flows with many different flow hashes. -rps_sock_flow_table is a global flow table that contains the *desired* CPU -for flows: the CPU that is currently processing the flow in userspace. -Each table value is a CPU index that is updated during calls to recvmsg -and sendmsg (specifically, inet_recvmsg(), inet_sendmsg(), inet_sendpage() +rps_sock_table is a global flow table that contains the *desired* CPU for +flows: the CPU that is currently processing the flow in userspace. Each +table value is a CPU index that is updated during calls to recvmsg and +sendmsg (specifically, inet_recvmsg(), inet_sendmsg(), inet_sendpage() and tcp_splice_read()). When the scheduler moves a thread to a new CPU while it has outstanding @@ -243,7 +243,7 @@ configured. The number of entries in the global flow table is set through: The number of entries in the per-queue flow table are set through: - /sys/class/net//queues/rx-/rps_flow_cnt + /sys/class/net//queues/tx-/rps_flow_cnt == Suggested Configuration diff --git a/trunk/Documentation/vm/transhuge.txt b/trunk/Documentation/vm/transhuge.txt index 29bdf62aac09..0924aaca3302 100644 --- a/trunk/Documentation/vm/transhuge.txt +++ b/trunk/Documentation/vm/transhuge.txt @@ -123,11 +123,10 @@ be automatically shutdown if it's set to "never". khugepaged runs usually at low frequency so while one may not want to invoke defrag algorithms synchronously during the page faults, it should be worth invoking defrag at least in khugepaged. However it's -also possible to disable defrag in khugepaged by writing 0 or enable -defrag in khugepaged by writing 1: +also possible to disable defrag in khugepaged: -echo 0 >/sys/kernel/mm/transparent_hugepage/khugepaged/defrag -echo 1 >/sys/kernel/mm/transparent_hugepage/khugepaged/defrag +echo yes >/sys/kernel/mm/transparent_hugepage/khugepaged/defrag +echo no >/sys/kernel/mm/transparent_hugepage/khugepaged/defrag You can also control how many pages khugepaged should scan at each pass: diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index 6185d0513584..28f65c249b97 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -1278,6 +1278,7 @@ F: drivers/input/misc/ati_remote2.c ATLX ETHERNET DRIVERS M: Jay Cliburn M: Chris Snook +M: Jie Yang L: netdev@vger.kernel.org W: http://sourceforge.net/projects/atl1 W: http://atl1.sourceforge.net @@ -1573,6 +1574,7 @@ F: drivers/scsi/bfa/ BROCADE BNA 10 GIGABIT ETHERNET DRIVER M: Rasesh Mody +M: Debashis Dutt L: netdev@vger.kernel.org S: Supported F: drivers/net/bna/ @@ -1756,6 +1758,7 @@ F: Documentation/zh_CN/ CISCO VIC ETHERNET NIC DRIVER M: Christian Benvenuti +M: Vasanthy Kolluri M: Roopa Prabhu M: David Wang S: Supported @@ -2460,7 +2463,7 @@ S: Supported F: drivers/infiniband/hw/ehca/ EHEA (IBM pSeries eHEA 10Gb ethernet adapter) DRIVER -M: Thadeu Lima de Souza Cascardo +M: Breno Leitao L: netdev@vger.kernel.org S: Maintained F: drivers/net/ehea/ @@ -3259,17 +3262,6 @@ F: Documentation/input/multi-touch-protocol.txt F: drivers/input/input-mt.c K: \b(ABS|SYN)_MT_ -INTEL C600 SERIES SAS CONTROLLER DRIVER -M: Intel SCU Linux support -M: Dan Williams -M: Dave Jiang -M: Ed Nadolski -L: linux-scsi@vger.kernel.org -T: git git://git.kernel.org/pub/scm/linux/kernel/git/djbw/isci.git -S: Maintained -F: drivers/scsi/isci/ -F: firmware/isci/ - INTEL IDLE DRIVER M: Len Brown L: linux-pm@lists.linux-foundation.org @@ -3313,7 +3305,7 @@ M: David Woodhouse L: iommu@lists.linux-foundation.org T: git git://git.infradead.org/iommu-2.6.git S: Supported -F: drivers/iommu/intel-iommu.c +F: drivers/pci/intel-iommu.c F: include/linux/intel-iommu.h INTEL IOP-ADMA DMA DRIVER @@ -4412,8 +4404,7 @@ L: netfilter@vger.kernel.org L: coreteam@netfilter.org W: http://www.netfilter.org/ W: http://www.iptables.org/ -T: git git://git.kernel.org/pub/scm/linux/kernel/git/netfilter/nf-2.6.git -T: git git://git.kernel.org/pub/scm/linux/kernel/git/netfilter/nf-next-2.6.git +T: git git://git.kernel.org/pub/scm/linux/kernel/git/kaber/nf-2.6.git S: Supported F: include/linux/netfilter* F: include/linux/netfilter/ @@ -4783,7 +4774,7 @@ F: drivers/net/wireless/orinoco/ OSD LIBRARY and FILESYSTEM M: Boaz Harrosh -M: Benny Halevy +M: Benny Halevy L: osd-dev@open-osd.org W: http://open-osd.org T: git git://git.open-osd.org/open-osd.git @@ -6366,14 +6357,15 @@ F: net/ipv4/tcp_lp.c TEGRA SUPPORT M: Colin Cross +M: Erik Gilling M: Olof Johansson -M: Stephen Warren L: linux-tegra@vger.kernel.org -T: git git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra.git +T: git git://android.git.kernel.org/kernel/tegra.git S: Supported F: arch/arm/mach-tegra TEHUTI ETHERNET DRIVER +M: Alexander Indenbaum M: Andy Gospodarek L: netdev@vger.kernel.org S: Supported @@ -7208,9 +7200,6 @@ W: http://opensource.wolfsonmicro.com/content/linux-drivers-wolfson-devices S: Supported F: Documentation/hwmon/wm83?? F: drivers/leds/leds-wm83*.c -F: drivers/input/misc/wm831x-on.c -F: drivers/input/touchscreen/wm831x-ts.c -F: drivers/input/touchscreen/wm97*.c F: drivers/mfd/wm8*.c F: drivers/power/wm83*.c F: drivers/rtc/rtc-wm83*.c @@ -7220,7 +7209,6 @@ F: drivers/watchdog/wm83*_wdt.c F: include/linux/mfd/wm831x/ F: include/linux/mfd/wm8350/ F: include/linux/mfd/wm8400* -F: include/linux/wm97xx.h F: include/sound/wm????.h F: sound/soc/codecs/wm* diff --git a/trunk/Makefile b/trunk/Makefile index 07bc92544e9c..03d97aa8c73e 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,7 +1,7 @@ VERSION = 3 PATCHLEVEL = 1 SUBLEVEL = 0 -EXTRAVERSION = +EXTRAVERSION = -rc5 NAME = "Divemaster Edition" # *DOCUMENTATION* diff --git a/trunk/arch/alpha/Kconfig b/trunk/arch/alpha/Kconfig index 8bb936226dee..60cde53d266c 100644 --- a/trunk/arch/alpha/Kconfig +++ b/trunk/arch/alpha/Kconfig @@ -51,7 +51,7 @@ config GENERIC_CMOS_UPDATE def_bool y config GENERIC_GPIO - bool + def_bool y config ZONE_DMA bool diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index 380e4f016654..3269576dbfa8 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -3,7 +3,7 @@ config ARM default y select HAVE_AOUT select HAVE_DMA_API_DEBUG - select HAVE_IDE if PCI || ISA || PCMCIA + select HAVE_IDE select HAVE_MEMBLOCK select RTC_LIB select SYS_SUPPORTS_APM_EMULATION @@ -195,8 +195,7 @@ config VECTORS_BASE The base address of exception vectors. config ARM_PATCH_PHYS_VIRT - bool "Patch physical to virtual translations at runtime" if EMBEDDED - default y + bool "Patch physical to virtual translations at runtime" depends on !XIP_KERNEL && MMU depends on !ARCH_REALVIEW || !SPARSEMEM help @@ -205,12 +204,16 @@ config ARM_PATCH_PHYS_VIRT kernel in system memory. This can only be used with non-XIP MMU kernels where the base - of physical memory is at a 16MB boundary. - - Only disable this option if you know that you do not require - this feature (eg, building a kernel for a single machine) and - you need to shrink the kernel to the minimal size. + of physical memory is at a 16MB boundary, or theoretically 64K + for the MSM machine class. +config ARM_PATCH_PHYS_VIRT_16BIT + def_bool y + depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM + help + This option extends the physical to virtual translation patching + to allow physical memory down to a theoretical minimum of 64K + boundaries. source "init/Kconfig" @@ -298,6 +301,7 @@ config ARCH_AT91 select ARCH_REQUIRE_GPIOLIB select HAVE_CLK select CLKDEV_LOOKUP + select ARM_PATCH_PHYS_VIRT if MMU help This enables support for systems based on the Atmel AT91RM9200, AT91SAM9 and AT91CAP9 processors. @@ -381,7 +385,6 @@ config ARCH_FOOTBRIDGE select CPU_SA110 select FOOTBRIDGE select GENERIC_CLOCKEVENTS - select HAVE_IDE help Support for systems based on the DC21285 companion chip ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. @@ -628,8 +631,6 @@ config ARCH_PXA select SPARSE_IRQ select AUTO_ZRELADDR select MULTI_IRQ_HANDLER - select ARM_CPU_SUSPEND if PM - select HAVE_IDE help Support for Intel/Marvell's PXA2xx/PXA3xx processor line. @@ -670,7 +671,6 @@ config ARCH_RPC select NO_IOPORT select ARCH_SPARSEMEM_ENABLE select ARCH_USES_GETTIMEOFFSET - select HAVE_IDE help On the Acorn Risc-PC, Linux can support the internal IDE disk and CD-ROM interface, serial and parallel port, and the floppy drive. @@ -689,7 +689,6 @@ config ARCH_SA1100 select HAVE_SCHED_CLOCK select TICK_ONESHOT select ARCH_REQUIRE_GPIOLIB - select HAVE_IDE help Support for StrongARM 11x0 based boards. @@ -1284,20 +1283,6 @@ config ARM_ERRATA_364296 processor into full low interrupt latency mode. ARM11MPCore is not affected. -config ARM_ERRATA_764369 - bool "ARM errata: Data cache line maintenance operation by MVA may not succeed" - depends on CPU_V7 && SMP - help - This option enables the workaround for erratum 764369 - affecting Cortex-A9 MPCore with two or more processors (all - current revisions). Under certain timing circumstances, a data - cache line maintenance operation by MVA targeting an Inner - Shareable memory region may fail to proceed up to either the - Point of Coherency or to the Point of Unification of the - system. This workaround adds a DSB instruction before the - relevant cache maintenance functions and sets a specific bit - in the diagnostic control register of the SCU. - endmenu source "arch/arm/common/Kconfig" @@ -1376,7 +1361,6 @@ config SMP MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE - depends on MMU select USE_GENERIC_SMP_HELPERS select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP help @@ -1409,31 +1393,6 @@ config SMP_ON_UP If you don't know what to do here, say Y. -config ARM_CPU_TOPOLOGY - bool "Support cpu topology definition" - depends on SMP && CPU_V7 - default y - help - Support ARM cpu topology definition. The MPIDR register defines - affinity between processors which is then used to describe the cpu - topology of an ARM System. - -config SCHED_MC - bool "Multi-core scheduler support" - depends on ARM_CPU_TOPOLOGY - help - Multi-core scheduler support improves the CPU scheduler's decision - making when dealing with multi-core CPU chips at a cost of slightly - increased overhead in some places. If unsure say N here. - -config SCHED_SMT - bool "SMT scheduler support" - depends on ARM_CPU_TOPOLOGY - help - Improves the CPU scheduler's decision making when dealing with - MultiThreading at a cost of slightly increased overhead in some - places. If unsure say N here. - config HAVE_ARM_SCU bool help @@ -1509,7 +1468,6 @@ config THUMB2_KERNEL depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL select AEABI select ARM_ASM_UNIFIED - select ARM_UNWIND help By enabling this option, the kernel will be compiled in Thumb-2 mode. A compiler/assembler that understand the unified @@ -2129,9 +2087,6 @@ config ARCH_SUSPEND_POSSIBLE CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE def_bool y -config ARM_CPU_SUSPEND - def_bool PM_SLEEP - endmenu source "net/Kconfig" diff --git a/trunk/arch/arm/Kconfig.debug b/trunk/arch/arm/Kconfig.debug index df3eb3ccd769..81cbe40c159c 100644 --- a/trunk/arch/arm/Kconfig.debug +++ b/trunk/arch/arm/Kconfig.debug @@ -65,71 +65,13 @@ config DEBUG_USER # These options are only for real kernel hackers who want to get their hands dirty. config DEBUG_LL - bool "Kernel low-level debugging functions (read help!)" + bool "Kernel low-level debugging functions" depends on DEBUG_KERNEL help Say Y here to include definitions of printascii, printch, printhex in the kernel. This is helpful if you are debugging code that executes before the console is initialized. - Note that selecting this option will limit the kernel to a single - UART definition, as specified below. Attempting to boot the kernel - image on a different platform *will not work*, so this option should - not be enabled for kernels that are intended to be portable. - -choice - prompt "Kernel low-level debugging port" - depends on DEBUG_LL - - config DEBUG_LL_UART_NONE - bool "No low-level debugging UART" - help - Say Y here if your platform doesn't provide a UART option - below. This relies on your platform choosing the right UART - definition internally in order for low-level debugging to - work. - - config DEBUG_ICEDCC - bool "Kernel low-level debugging via EmbeddedICE DCC channel" - help - Say Y here if you want the debug print routines to direct - their output to the EmbeddedICE macrocell's DCC channel using - co-processor 14. This is known to work on the ARM9 style ICE - channel and on the XScale with the PEEDI. - - Note that the system will appear to hang during boot if there - is nothing connected to read from the DCC. - - config DEBUG_FOOTBRIDGE_COM1 - bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" - depends on FOOTBRIDGE - help - Say Y here if you want the debug print routines to direct - their output to the 8250 at PCI COM1. - - config DEBUG_DC21285_PORT - bool "Kernel low-level debugging messages via footbridge serial port" - depends on FOOTBRIDGE - help - Say Y here if you want the debug print routines to direct - their output to the serial port in the DC21285 (Footbridge). - - config DEBUG_CLPS711X_UART1 - bool "Kernel low-level debugging messages via UART1" - depends on ARCH_CLPS711X - help - Say Y here if you want the debug print routines to direct - their output to the first serial port on these devices. - - config DEBUG_CLPS711X_UART2 - bool "Kernel low-level debugging messages via UART2" - depends on ARCH_CLPS711X - help - Say Y here if you want the debug print routines to direct - their output to the second serial port on these devices. - -endchoice - config EARLY_PRINTK bool "Early printk" depends on DEBUG_LL @@ -138,14 +80,43 @@ config EARLY_PRINTK kernel low-level debugging functions. Add earlyprintk to your kernel parameters to enable this console. +config DEBUG_ICEDCC + bool "Kernel low-level debugging via EmbeddedICE DCC channel" + depends on DEBUG_LL + help + Say Y here if you want the debug print routines to direct their + output to the EmbeddedICE macrocell's DCC channel using + co-processor 14. This is known to work on the ARM9 style ICE + channel and on the XScale with the PEEDI. + + It does include a timeout to ensure that the system does not + totally freeze when there is nothing connected to read. + config OC_ETM bool "On-chip ETM and ETB" - depends on ARM_AMBA + select ARM_AMBA help Enables the on-chip embedded trace macrocell and embedded trace buffer driver that will allow you to collect traces of the kernel code. +config DEBUG_DC21285_PORT + bool "Kernel low-level debugging messages via footbridge serial port" + depends on DEBUG_LL && FOOTBRIDGE + help + Say Y here if you want the debug print routines to direct their + output to the serial port in the DC21285 (Footbridge). Saying N + will cause the debug messages to appear on the first 16550 + serial port. + +config DEBUG_CLPS711X_UART2 + bool "Kernel low-level debugging messages via UART2" + depends on DEBUG_LL && ARCH_CLPS711X + help + Say Y here if you want the debug print routines to direct their + output to the second serial port on these devices. Saying N will + cause the debug messages to appear on the first serial port. + config DEBUG_S3C_UART depends on PLAT_SAMSUNG int "S3C UART to use for low-level debug" diff --git a/trunk/arch/arm/Makefile b/trunk/arch/arm/Makefile index 5665c2a3b652..70c424eaf7b0 100644 --- a/trunk/arch/arm/Makefile +++ b/trunk/arch/arm/Makefile @@ -128,9 +128,6 @@ textofs-$(CONFIG_PM_H1940) := 0x00108000 ifeq ($(CONFIG_ARCH_SA1100),y) textofs-$(CONFIG_SA1111) := 0x00208000 endif -textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000 -textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000 -textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. diff --git a/trunk/arch/arm/boot/dts/tegra-harmony.dts b/trunk/arch/arm/boot/dts/tegra-harmony.dts index e5818668d091..4c053340ce33 100644 --- a/trunk/arch/arm/boot/dts/tegra-harmony.dts +++ b/trunk/arch/arm/boot/dts/tegra-harmony.dts @@ -57,14 +57,14 @@ }; sdhci@c8000200 { - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ - wp-gpios = <&gpio 57 0>; /* gpio PH1 */ - power-gpios = <&gpio 155 0>; /* gpio PT3 */ + gpios = <&gpio 69 0>, /* cd, gpio PI5 */ + <&gpio 57 0>, /* wp, gpio PH1 */ + <&gpio 155 0>; /* power, gpio PT3 */ }; sdhci@c8000600 { - cd-gpios = <&gpio 58 0>; /* gpio PH2 */ - wp-gpios = <&gpio 59 0>; /* gpio PH3 */ - power-gpios = <&gpio 70 0>; /* gpio PI6 */ + gpios = <&gpio 58 0>, /* cd, gpio PH2 */ + <&gpio 59 0>, /* wp, gpio PH3 */ + <&gpio 70 0>; /* power, gpio PI6 */ }; }; diff --git a/trunk/arch/arm/boot/dts/tegra-seaboard.dts b/trunk/arch/arm/boot/dts/tegra-seaboard.dts index 64cedca6fc79..1940cae00748 100644 --- a/trunk/arch/arm/boot/dts/tegra-seaboard.dts +++ b/trunk/arch/arm/boot/dts/tegra-seaboard.dts @@ -21,8 +21,8 @@ }; sdhci@c8000400 { - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ - wp-gpios = <&gpio 57 0>; /* gpio PH1 */ - power-gpios = <&gpio 70 0>; /* gpio PI6 */ + gpios = <&gpio 69 0>, /* cd, gpio PI5 */ + <&gpio 57 0>, /* wp, gpio PH1 */ + <&gpio 70 0>; /* power, gpio PI6 */ }; }; diff --git a/trunk/arch/arm/common/gic.c b/trunk/arch/arm/common/gic.c index 666b278e56d7..3227ca952a12 100644 --- a/trunk/arch/arm/common/gic.c +++ b/trunk/arch/arm/common/gic.c @@ -180,7 +180,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, return -EINVAL; mask = 0xff << shift; - bit = 1 << (cpu_logical_map(cpu) + shift); + bit = 1 << (cpu + shift); spin_lock(&irq_controller_lock); val = readl_relaxed(reg) & ~mask; @@ -259,15 +259,9 @@ static void __init gic_dist_init(struct gic_chip_data *gic, unsigned int irq_start) { unsigned int gic_irqs, irq_limit, i; - u32 cpumask; void __iomem *base = gic->dist_base; - u32 cpu = 0; + u32 cpumask = 1 << smp_processor_id(); -#ifdef CONFIG_SMP - cpu = cpu_logical_map(smp_processor_id()); -#endif - - cpumask = 1 << cpu; cpumask |= cpumask << 8; cpumask |= cpumask << 16; @@ -388,12 +382,7 @@ void __cpuinit gic_enable_ppi(unsigned int irq) #ifdef CONFIG_SMP void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) { - int cpu; - unsigned long map = 0; - - /* Convert our logical CPU mask into a physical one. */ - for_each_cpu(cpu, mask) - map |= 1 << cpu_logical_map(cpu); + unsigned long map = *cpus_addr(*mask); /* * Ensure that stores to Normal memory are visible to the diff --git a/trunk/arch/arm/common/vic.c b/trunk/arch/arm/common/vic.c index 01f18a421b17..7aa4262ada7a 100644 --- a/trunk/arch/arm/common/vic.c +++ b/trunk/arch/arm/common/vic.c @@ -259,6 +259,7 @@ static void __init vic_disable(void __iomem *base) writel(0, base + VIC_INT_SELECT); writel(0, base + VIC_INT_ENABLE); writel(~0, base + VIC_INT_ENABLE_CLEAR); + writel(0, base + VIC_IRQ_STATUS); writel(0, base + VIC_ITCR); writel(~0, base + VIC_INT_SOFT_CLEAR); } @@ -346,8 +347,7 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, /* Identify which VIC cell this one is, by reading the ID */ for (i = 0; i < 4; i++) { - void __iomem *addr; - addr = (void __iomem *)((u32)base & PAGE_MASK) + 0xfe0 + (i * 4); + u32 addr = ((u32)base & PAGE_MASK) + 0xfe0 + (i * 4); cellid |= (readl(addr) & 0xff) << (8 * i); } vendor = (cellid >> 12) & 0xff; diff --git a/trunk/arch/arm/include/asm/Kbuild b/trunk/arch/arm/include/asm/Kbuild index 6550db3aa5c7..960abceb8e14 100644 --- a/trunk/arch/arm/include/asm/Kbuild +++ b/trunk/arch/arm/include/asm/Kbuild @@ -1,3 +1,20 @@ include include/asm-generic/Kbuild.asm header-y += hwcap.h + +generic-y += auxvec.h +generic-y += bitsperlong.h +generic-y += cputime.h +generic-y += emergency-restart.h +generic-y += errno.h +generic-y += ioctl.h +generic-y += irq_regs.h +generic-y += kdebug.h +generic-y += local.h +generic-y += local64.h +generic-y += percpu.h +generic-y += poll.h +generic-y += resource.h +generic-y += sections.h +generic-y += siginfo.h +generic-y += sizes.h diff --git a/trunk/arch/arm/include/asm/auxvec.h b/trunk/arch/arm/include/asm/auxvec.h deleted file mode 100644 index c0536f6b29a7..000000000000 --- a/trunk/arch/arm/include/asm/auxvec.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __ASMARM_AUXVEC_H -#define __ASMARM_AUXVEC_H - -#endif diff --git a/trunk/arch/arm/include/asm/bitsperlong.h b/trunk/arch/arm/include/asm/bitsperlong.h deleted file mode 100644 index 6dc0bb0c13b2..000000000000 --- a/trunk/arch/arm/include/asm/bitsperlong.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/trunk/arch/arm/include/asm/cputime.h b/trunk/arch/arm/include/asm/cputime.h deleted file mode 100644 index 3a8002a5fec7..000000000000 --- a/trunk/arch/arm/include/asm/cputime.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ARM_CPUTIME_H -#define __ARM_CPUTIME_H - -#include - -#endif /* __ARM_CPUTIME_H */ diff --git a/trunk/arch/arm/include/asm/cputype.h b/trunk/arch/arm/include/asm/cputype.h index cb47d28cbe1f..cd4458f64171 100644 --- a/trunk/arch/arm/include/asm/cputype.h +++ b/trunk/arch/arm/include/asm/cputype.h @@ -8,7 +8,6 @@ #define CPUID_CACHETYPE 1 #define CPUID_TCM 2 #define CPUID_TLBTYPE 3 -#define CPUID_MPIDR 5 #define CPUID_EXT_PFR0 "c1, 0" #define CPUID_EXT_PFR1 "c1, 1" @@ -71,11 +70,6 @@ static inline unsigned int __attribute_const__ read_cpuid_tcmstatus(void) return read_cpuid(CPUID_TCM); } -static inline unsigned int __attribute_const__ read_cpuid_mpidr(void) -{ - return read_cpuid(CPUID_MPIDR); -} - /* * Intel's XScale3 core supports some v6 features (supersections, L2) * but advertises itself as v5 as it does not support the v6 ISA. For diff --git a/trunk/arch/arm/include/asm/dma-mapping.h b/trunk/arch/arm/include/asm/dma-mapping.h index 28b7ee8d7398..7a21d0bf7134 100644 --- a/trunk/arch/arm/include/asm/dma-mapping.h +++ b/trunk/arch/arm/include/asm/dma-mapping.h @@ -32,7 +32,7 @@ static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr) static inline void *dma_to_virt(struct device *dev, dma_addr_t addr) { - return (void *)__bus_to_virt((unsigned long)addr); + return (void *)__bus_to_virt(addr); } static inline dma_addr_t virt_to_dma(struct device *dev, void *addr) diff --git a/trunk/arch/arm/include/asm/ecard.h b/trunk/arch/arm/include/asm/ecard.h index eaea14676d57..29f2610efc70 100644 --- a/trunk/arch/arm/include/asm/ecard.h +++ b/trunk/arch/arm/include/asm/ecard.h @@ -161,6 +161,7 @@ struct expansion_card { /* Private internal data */ const char *card_desc; /* Card description */ + CONST unsigned int podaddr; /* Base Linux address for card */ CONST loader_t loader; /* loader program */ u64 dma_mask; }; diff --git a/trunk/arch/arm/include/asm/emergency-restart.h b/trunk/arch/arm/include/asm/emergency-restart.h deleted file mode 100644 index 108d8c48e42e..000000000000 --- a/trunk/arch/arm/include/asm/emergency-restart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_EMERGENCY_RESTART_H -#define _ASM_EMERGENCY_RESTART_H - -#include - -#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/trunk/arch/arm/include/asm/errno.h b/trunk/arch/arm/include/asm/errno.h deleted file mode 100644 index 6e60f0612bb6..000000000000 --- a/trunk/arch/arm/include/asm/errno.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ARM_ERRNO_H -#define _ARM_ERRNO_H - -#include - -#endif diff --git a/trunk/arch/arm/include/asm/exception.h b/trunk/arch/arm/include/asm/exception.h deleted file mode 100644 index 5abaf5bbd985..000000000000 --- a/trunk/arch/arm/include/asm/exception.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Annotations for marking C functions as exception handlers. - * - * These should only be used for C functions that are called from the low - * level exception entry code and not any intervening C code. - */ -#ifndef __ASM_ARM_EXCEPTION_H -#define __ASM_ARM_EXCEPTION_H - -#include - -#define __exception __attribute__((section(".exception.text"))) -#ifdef CONFIG_FUNCTION_GRAPH_TRACER -#define __exception_irq_entry __irq_entry -#else -#define __exception_irq_entry __exception -#endif - -#endif /* __ASM_ARM_EXCEPTION_H */ diff --git a/trunk/arch/arm/include/asm/futex.h b/trunk/arch/arm/include/asm/futex.h index 253cc86318bf..8c73900da9ed 100644 --- a/trunk/arch/arm/include/asm/futex.h +++ b/trunk/arch/arm/include/asm/futex.h @@ -25,17 +25,17 @@ #ifdef CONFIG_SMP -#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \ +#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ smp_mb(); \ __asm__ __volatile__( \ - "1: ldrex %1, [%3]\n" \ + "1: ldrex %1, [%2]\n" \ " " insn "\n" \ - "2: strex %2, %0, [%3]\n" \ - " teq %2, #0\n" \ + "2: strex %1, %0, [%2]\n" \ + " teq %1, #0\n" \ " bne 1b\n" \ " mov %0, #0\n" \ - __futex_atomic_ex_table("%5") \ - : "=&r" (ret), "=&r" (oldval), "=&r" (tmp) \ + __futex_atomic_ex_table("%4") \ + : "=&r" (ret), "=&r" (oldval) \ : "r" (uaddr), "r" (oparg), "Ir" (-EFAULT) \ : "cc", "memory") @@ -73,14 +73,14 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, #include #include -#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \ +#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ __asm__ __volatile__( \ - "1: " T(ldr) " %1, [%3]\n" \ + "1: " T(ldr) " %1, [%2]\n" \ " " insn "\n" \ - "2: " T(str) " %0, [%3]\n" \ + "2: " T(str) " %0, [%2]\n" \ " mov %0, #0\n" \ - __futex_atomic_ex_table("%5") \ - : "=&r" (ret), "=&r" (oldval), "=&r" (tmp) \ + __futex_atomic_ex_table("%4") \ + : "=&r" (ret), "=&r" (oldval) \ : "r" (uaddr), "r" (oparg), "Ir" (-EFAULT) \ : "cc", "memory") @@ -117,7 +117,7 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr) int cmp = (encoded_op >> 24) & 15; int oparg = (encoded_op << 8) >> 20; int cmparg = (encoded_op << 20) >> 20; - int oldval = 0, ret, tmp; + int oldval = 0, ret; if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) oparg = 1 << oparg; @@ -129,19 +129,19 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr) switch (op) { case FUTEX_OP_SET: - __futex_atomic_op("mov %0, %4", ret, oldval, tmp, uaddr, oparg); + __futex_atomic_op("mov %0, %3", ret, oldval, uaddr, oparg); break; case FUTEX_OP_ADD: - __futex_atomic_op("add %0, %1, %4", ret, oldval, tmp, uaddr, oparg); + __futex_atomic_op("add %0, %1, %3", ret, oldval, uaddr, oparg); break; case FUTEX_OP_OR: - __futex_atomic_op("orr %0, %1, %4", ret, oldval, tmp, uaddr, oparg); + __futex_atomic_op("orr %0, %1, %3", ret, oldval, uaddr, oparg); break; case FUTEX_OP_ANDN: - __futex_atomic_op("and %0, %1, %4", ret, oldval, tmp, uaddr, ~oparg); + __futex_atomic_op("and %0, %1, %3", ret, oldval, uaddr, ~oparg); break; case FUTEX_OP_XOR: - __futex_atomic_op("eor %0, %1, %4", ret, oldval, tmp, uaddr, oparg); + __futex_atomic_op("eor %0, %1, %3", ret, oldval, uaddr, oparg); break; default: ret = -ENOSYS; diff --git a/trunk/arch/arm/include/asm/hardware/cache-l2x0.h b/trunk/arch/arm/include/asm/hardware/cache-l2x0.h index 434edccdf7f3..99a6ed7e1bfd 100644 --- a/trunk/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/trunk/arch/arm/include/asm/hardware/cache-l2x0.h @@ -52,8 +52,6 @@ #define L2X0_LOCKDOWN_WAY_D_BASE 0x900 #define L2X0_LOCKDOWN_WAY_I_BASE 0x904 #define L2X0_LOCKDOWN_STRIDE 0x08 -#define L2X0_ADDR_FILTER_START 0xC00 -#define L2X0_ADDR_FILTER_END 0xC04 #define L2X0_TEST_OPERATION 0xF00 #define L2X0_LINE_DATA 0xF10 #define L2X0_LINE_TAG 0xF30 @@ -67,23 +65,8 @@ #define L2X0_CACHE_ID_PART_MASK (0xf << 6) #define L2X0_CACHE_ID_PART_L210 (1 << 6) #define L2X0_CACHE_ID_PART_L310 (3 << 6) -#define L2X0_CACHE_ID_RTL_MASK 0x3f -#define L2X0_CACHE_ID_RTL_R0P0 0x0 -#define L2X0_CACHE_ID_RTL_R1P0 0x2 -#define L2X0_CACHE_ID_RTL_R2P0 0x4 -#define L2X0_CACHE_ID_RTL_R3P0 0x5 -#define L2X0_CACHE_ID_RTL_R3P1 0x6 -#define L2X0_CACHE_ID_RTL_R3P2 0x8 #define L2X0_AUX_CTRL_MASK 0xc0000fff -#define L2X0_AUX_CTRL_DATA_RD_LATENCY_SHIFT 0 -#define L2X0_AUX_CTRL_DATA_RD_LATENCY_MASK 0x7 -#define L2X0_AUX_CTRL_DATA_WR_LATENCY_SHIFT 3 -#define L2X0_AUX_CTRL_DATA_WR_LATENCY_MASK (0x7 << 3) -#define L2X0_AUX_CTRL_TAG_LATENCY_SHIFT 6 -#define L2X0_AUX_CTRL_TAG_LATENCY_MASK (0x7 << 6) -#define L2X0_AUX_CTRL_DIRTY_LATENCY_SHIFT 9 -#define L2X0_AUX_CTRL_DIRTY_LATENCY_MASK (0x7 << 9) #define L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT 16 #define L2X0_AUX_CTRL_WAY_SIZE_SHIFT 17 #define L2X0_AUX_CTRL_WAY_SIZE_MASK (0x7 << 17) @@ -94,33 +77,8 @@ #define L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT 29 #define L2X0_AUX_CTRL_EARLY_BRESP_SHIFT 30 -#define L2X0_LATENCY_CTRL_SETUP_SHIFT 0 -#define L2X0_LATENCY_CTRL_RD_SHIFT 4 -#define L2X0_LATENCY_CTRL_WR_SHIFT 8 - -#define L2X0_ADDR_FILTER_EN 1 - #ifndef __ASSEMBLY__ extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); -extern int l2x0_of_init(__u32 aux_val, __u32 aux_mask); - -struct l2x0_regs { - unsigned long phy_base; - unsigned long aux_ctrl; - /* - * Whether the following registers need to be saved/restored - * depends on platform - */ - unsigned long tag_latency; - unsigned long data_latency; - unsigned long filter_start; - unsigned long filter_end; - unsigned long prefetch_ctrl; - unsigned long pwr_ctrl; -}; - -extern struct l2x0_regs l2x0_saved_regs; - #endif #endif diff --git a/trunk/arch/arm/include/asm/io.h b/trunk/arch/arm/include/asm/io.h index dc2d5102e680..d66605dea55a 100644 --- a/trunk/arch/arm/include/asm/io.h +++ b/trunk/arch/arm/include/asm/io.h @@ -109,27 +109,6 @@ static inline void __iomem *__typesafe_io(unsigned long addr) */ #include -/* - * This is the limit of PC card/PCI/ISA IO space, which is by default - * 64K if we have PC card, PCI or ISA support. Otherwise, default to - * zero to prevent ISA/PCI drivers claiming IO space (and potentially - * oopsing.) - * - * Only set this larger if you really need inb() et.al. to operate over - * a larger address space. Note that SOC_COMMON ioremaps each sockets - * IO space area, and so inb() et.al. must be defined to operate as per - * readb() et.al. on such platforms. - */ -#ifndef IO_SPACE_LIMIT -#if defined(CONFIG_PCMCIA_SOC_COMMON) || defined(CONFIG_PCMCIA_SOC_COMMON_MODULE) -#define IO_SPACE_LIMIT ((resource_size_t)0xffffffff) -#elif defined(CONFIG_PCI) || defined(CONFIG_ISA) || defined(CONFIG_PCCARD) -#define IO_SPACE_LIMIT ((resource_size_t)0xffff) -#else -#define IO_SPACE_LIMIT ((resource_size_t)0) -#endif -#endif - /* * IO port access primitives * ------------------------- @@ -281,16 +260,10 @@ extern void _memset_io(volatile void __iomem *, int, size_t); #define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __iormb(); __v; }) #define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __iormb(); __v; }) -#define ioread16be(p) ({ unsigned int __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; }) -#define ioread32be(p) ({ unsigned int __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; }) - #define iowrite8(v,p) ({ __iowmb(); (void)__raw_writeb(v, p); }) #define iowrite16(v,p) ({ __iowmb(); (void)__raw_writew((__force __u16)cpu_to_le16(v), p); }) #define iowrite32(v,p) ({ __iowmb(); (void)__raw_writel((__force __u32)cpu_to_le32(v), p); }) -#define iowrite16be(v,p) ({ __iowmb(); (void)__raw_writew((__force __u16)cpu_to_be16(v), p); }) -#define iowrite32be(v,p) ({ __iowmb(); (void)__raw_writel((__force __u32)cpu_to_be32(v), p); }) - #define ioread8_rep(p,d,c) __raw_readsb(p,d,c) #define ioread16_rep(p,d,c) __raw_readsw(p,d,c) #define ioread32_rep(p,d,c) __raw_readsl(p,d,c) diff --git a/trunk/arch/arm/include/asm/ioctl.h b/trunk/arch/arm/include/asm/ioctl.h deleted file mode 100644 index b279fe06dfe5..000000000000 --- a/trunk/arch/arm/include/asm/ioctl.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/trunk/arch/arm/include/asm/irq_regs.h b/trunk/arch/arm/include/asm/irq_regs.h deleted file mode 100644 index 3dd9c0b70270..000000000000 --- a/trunk/arch/arm/include/asm/irq_regs.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/trunk/arch/arm/include/asm/kdebug.h b/trunk/arch/arm/include/asm/kdebug.h deleted file mode 100644 index 6ece1b037665..000000000000 --- a/trunk/arch/arm/include/asm/kdebug.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/trunk/arch/arm/include/asm/local.h b/trunk/arch/arm/include/asm/local.h deleted file mode 100644 index c11c530f74d0..000000000000 --- a/trunk/arch/arm/include/asm/local.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/trunk/arch/arm/include/asm/local64.h b/trunk/arch/arm/include/asm/local64.h deleted file mode 100644 index 36c93b5cc239..000000000000 --- a/trunk/arch/arm/include/asm/local64.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/trunk/arch/arm/include/asm/localtimer.h b/trunk/arch/arm/include/asm/localtimer.h index 6fd955d34c65..080d74f8128d 100644 --- a/trunk/arch/arm/include/asm/localtimer.h +++ b/trunk/arch/arm/include/asm/localtimer.h @@ -10,8 +10,6 @@ #ifndef __ASM_ARM_LOCALTIMER_H #define __ASM_ARM_LOCALTIMER_H -#include - struct clock_event_device; /* @@ -24,10 +22,6 @@ void percpu_timer_setup(void); */ asmlinkage void do_local_timer(struct pt_regs *); -/* - * Called from C code - */ -void handle_local_timer(struct pt_regs *); #ifdef CONFIG_LOCAL_TIMERS diff --git a/trunk/arch/arm/include/asm/memory.h b/trunk/arch/arm/include/asm/memory.h index 441fc4fe8263..b8de516e600e 100644 --- a/trunk/arch/arm/include/asm/memory.h +++ b/trunk/arch/arm/include/asm/memory.h @@ -160,6 +160,7 @@ * so that all we need to do is modify the 8-bit constant field. */ #define __PV_BITS_31_24 0x81000000 +#define __PV_BITS_23_16 0x00810000 extern unsigned long __pv_phys_offset; #define PHYS_OFFSET __pv_phys_offset @@ -177,6 +178,9 @@ static inline unsigned long __virt_to_phys(unsigned long x) { unsigned long t; __pv_stub(x, t, "add", __PV_BITS_31_24); +#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT + __pv_stub(t, t, "add", __PV_BITS_23_16); +#endif return t; } @@ -184,6 +188,9 @@ static inline unsigned long __phys_to_virt(unsigned long x) { unsigned long t; __pv_stub(x, t, "sub", __PV_BITS_31_24); +#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT + __pv_stub(t, t, "sub", __PV_BITS_23_16); +#endif return t; } #else diff --git a/trunk/arch/arm/include/asm/module.h b/trunk/arch/arm/include/asm/module.h index 6c6809f982f1..543b44916d2c 100644 --- a/trunk/arch/arm/include/asm/module.h +++ b/trunk/arch/arm/include/asm/module.h @@ -31,7 +31,11 @@ struct mod_arch_specific { /* Add __virt_to_phys patching state as well */ #ifdef CONFIG_ARM_PATCH_PHYS_VIRT +#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT +#define MODULE_ARCH_VERMAGIC_P2V "p2v16 " +#else #define MODULE_ARCH_VERMAGIC_P2V "p2v8 " +#endif #else #define MODULE_ARCH_VERMAGIC_P2V "" #endif diff --git a/trunk/arch/arm/include/asm/outercache.h b/trunk/arch/arm/include/asm/outercache.h index 53426c66352a..d8387437ec5a 100644 --- a/trunk/arch/arm/include/asm/outercache.h +++ b/trunk/arch/arm/include/asm/outercache.h @@ -34,7 +34,6 @@ struct outer_cache_fns { void (*sync)(void); #endif void (*set_debug)(unsigned long); - void (*resume)(void); }; #ifdef CONFIG_OUTER_CACHE @@ -75,12 +74,6 @@ static inline void outer_disable(void) outer_cache.disable(); } -static inline void outer_resume(void) -{ - if (outer_cache.resume) - outer_cache.resume(); -} - #else static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) diff --git a/trunk/arch/arm/include/asm/page.h b/trunk/arch/arm/include/asm/page.h index ca94653f1ecb..ac75d0848889 100644 --- a/trunk/arch/arm/include/asm/page.h +++ b/trunk/arch/arm/include/asm/page.h @@ -151,7 +151,47 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from, #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) extern void copy_page(void *to, const void *from); -#include +typedef unsigned long pteval_t; + +#undef STRICT_MM_TYPECHECKS + +#ifdef STRICT_MM_TYPECHECKS +/* + * These are used to make use of C type-checking.. + */ +typedef struct { pteval_t pte; } pte_t; +typedef struct { unsigned long pmd; } pmd_t; +typedef struct { unsigned long pgd[2]; } pgd_t; +typedef struct { unsigned long pgprot; } pgprot_t; + +#define pte_val(x) ((x).pte) +#define pmd_val(x) ((x).pmd) +#define pgd_val(x) ((x).pgd[0]) +#define pgprot_val(x) ((x).pgprot) + +#define __pte(x) ((pte_t) { (x) } ) +#define __pmd(x) ((pmd_t) { (x) } ) +#define __pgprot(x) ((pgprot_t) { (x) } ) + +#else +/* + * .. while these make it easier on the compiler + */ +typedef pteval_t pte_t; +typedef unsigned long pmd_t; +typedef unsigned long pgd_t[2]; +typedef unsigned long pgprot_t; + +#define pte_val(x) (x) +#define pmd_val(x) (x) +#define pgd_val(x) ((x)[0]) +#define pgprot_val(x) (x) + +#define __pte(x) (x) +#define __pmd(x) (x) +#define __pgprot(x) (x) + +#endif /* STRICT_MM_TYPECHECKS */ #endif /* CONFIG_MMU */ diff --git a/trunk/arch/arm/include/asm/percpu.h b/trunk/arch/arm/include/asm/percpu.h deleted file mode 100644 index b4e32d8ec072..000000000000 --- a/trunk/arch/arm/include/asm/percpu.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ARM_PERCPU -#define __ARM_PERCPU - -#include - -#endif diff --git a/trunk/arch/arm/include/asm/pgalloc.h b/trunk/arch/arm/include/asm/pgalloc.h index 3e08fd3fbb6b..22de005f159c 100644 --- a/trunk/arch/arm/include/asm/pgalloc.h +++ b/trunk/arch/arm/include/asm/pgalloc.h @@ -105,9 +105,9 @@ static inline void pte_free(struct mm_struct *mm, pgtable_t pte) } static inline void __pmd_populate(pmd_t *pmdp, phys_addr_t pte, - pmdval_t prot) + unsigned long prot) { - pmdval_t pmdval = (pte + PTE_HWTABLE_OFF) | prot; + unsigned long pmdval = (pte + PTE_HWTABLE_OFF) | prot; pmdp[0] = __pmd(pmdval); pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t)); flush_pmd_entry(pmdp); diff --git a/trunk/arch/arm/include/asm/pgtable-2level-hwdef.h b/trunk/arch/arm/include/asm/pgtable-2level-hwdef.h deleted file mode 100644 index 5cfba15cb401..000000000000 --- a/trunk/arch/arm/include/asm/pgtable-2level-hwdef.h +++ /dev/null @@ -1,93 +0,0 @@ -/* - * arch/arm/include/asm/pgtable-2level-hwdef.h - * - * Copyright (C) 1995-2002 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef _ASM_PGTABLE_2LEVEL_HWDEF_H -#define _ASM_PGTABLE_2LEVEL_HWDEF_H - -/* - * Hardware page table definitions. - * - * + Level 1 descriptor (PMD) - * - common - */ -#define PMD_TYPE_MASK (_AT(pmdval_t, 3) << 0) -#define PMD_TYPE_FAULT (_AT(pmdval_t, 0) << 0) -#define PMD_TYPE_TABLE (_AT(pmdval_t, 1) << 0) -#define PMD_TYPE_SECT (_AT(pmdval_t, 2) << 0) -#define PMD_BIT4 (_AT(pmdval_t, 1) << 4) -#define PMD_DOMAIN(x) (_AT(pmdval_t, (x)) << 5) -#define PMD_PROTECTION (_AT(pmdval_t, 1) << 9) /* v5 */ -/* - * - section - */ -#define PMD_SECT_BUFFERABLE (_AT(pmdval_t, 1) << 2) -#define PMD_SECT_CACHEABLE (_AT(pmdval_t, 1) << 3) -#define PMD_SECT_XN (_AT(pmdval_t, 1) << 4) /* v6 */ -#define PMD_SECT_AP_WRITE (_AT(pmdval_t, 1) << 10) -#define PMD_SECT_AP_READ (_AT(pmdval_t, 1) << 11) -#define PMD_SECT_TEX(x) (_AT(pmdval_t, (x)) << 12) /* v5 */ -#define PMD_SECT_APX (_AT(pmdval_t, 1) << 15) /* v6 */ -#define PMD_SECT_S (_AT(pmdval_t, 1) << 16) /* v6 */ -#define PMD_SECT_nG (_AT(pmdval_t, 1) << 17) /* v6 */ -#define PMD_SECT_SUPER (_AT(pmdval_t, 1) << 18) /* v6 */ -#define PMD_SECT_AF (_AT(pmdval_t, 0)) - -#define PMD_SECT_UNCACHED (_AT(pmdval_t, 0)) -#define PMD_SECT_BUFFERED (PMD_SECT_BUFFERABLE) -#define PMD_SECT_WT (PMD_SECT_CACHEABLE) -#define PMD_SECT_WB (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE) -#define PMD_SECT_MINICACHE (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE) -#define PMD_SECT_WBWA (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE) -#define PMD_SECT_NONSHARED_DEV (PMD_SECT_TEX(2)) - -/* - * - coarse table (not used) - */ - -/* - * + Level 2 descriptor (PTE) - * - common - */ -#define PTE_TYPE_MASK (_AT(pteval_t, 3) << 0) -#define PTE_TYPE_FAULT (_AT(pteval_t, 0) << 0) -#define PTE_TYPE_LARGE (_AT(pteval_t, 1) << 0) -#define PTE_TYPE_SMALL (_AT(pteval_t, 2) << 0) -#define PTE_TYPE_EXT (_AT(pteval_t, 3) << 0) /* v5 */ -#define PTE_BUFFERABLE (_AT(pteval_t, 1) << 2) -#define PTE_CACHEABLE (_AT(pteval_t, 1) << 3) - -/* - * - extended small page/tiny page - */ -#define PTE_EXT_XN (_AT(pteval_t, 1) << 0) /* v6 */ -#define PTE_EXT_AP_MASK (_AT(pteval_t, 3) << 4) -#define PTE_EXT_AP0 (_AT(pteval_t, 1) << 4) -#define PTE_EXT_AP1 (_AT(pteval_t, 2) << 4) -#define PTE_EXT_AP_UNO_SRO (_AT(pteval_t, 0) << 4) -#define PTE_EXT_AP_UNO_SRW (PTE_EXT_AP0) -#define PTE_EXT_AP_URO_SRW (PTE_EXT_AP1) -#define PTE_EXT_AP_URW_SRW (PTE_EXT_AP1|PTE_EXT_AP0) -#define PTE_EXT_TEX(x) (_AT(pteval_t, (x)) << 6) /* v5 */ -#define PTE_EXT_APX (_AT(pteval_t, 1) << 9) /* v6 */ -#define PTE_EXT_COHERENT (_AT(pteval_t, 1) << 9) /* XScale3 */ -#define PTE_EXT_SHARED (_AT(pteval_t, 1) << 10) /* v6 */ -#define PTE_EXT_NG (_AT(pteval_t, 1) << 11) /* v6 */ - -/* - * - small page - */ -#define PTE_SMALL_AP_MASK (_AT(pteval_t, 0xff) << 4) -#define PTE_SMALL_AP_UNO_SRO (_AT(pteval_t, 0x00) << 4) -#define PTE_SMALL_AP_UNO_SRW (_AT(pteval_t, 0x55) << 4) -#define PTE_SMALL_AP_URO_SRW (_AT(pteval_t, 0xaa) << 4) -#define PTE_SMALL_AP_URW_SRW (_AT(pteval_t, 0xff) << 4) - -#define PHYS_MASK (~0UL) - -#endif diff --git a/trunk/arch/arm/include/asm/pgtable-2level-types.h b/trunk/arch/arm/include/asm/pgtable-2level-types.h deleted file mode 100644 index 66cb5b0e89c5..000000000000 --- a/trunk/arch/arm/include/asm/pgtable-2level-types.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * arch/arm/include/asm/pgtable-2level-types.h - * - * Copyright (C) 1995-2003 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _ASM_PGTABLE_2LEVEL_TYPES_H -#define _ASM_PGTABLE_2LEVEL_TYPES_H - -#include - -typedef u32 pteval_t; -typedef u32 pmdval_t; - -#undef STRICT_MM_TYPECHECKS - -#ifdef STRICT_MM_TYPECHECKS -/* - * These are used to make use of C type-checking.. - */ -typedef struct { pteval_t pte; } pte_t; -typedef struct { pmdval_t pmd; } pmd_t; -typedef struct { pmdval_t pgd[2]; } pgd_t; -typedef struct { pteval_t pgprot; } pgprot_t; - -#define pte_val(x) ((x).pte) -#define pmd_val(x) ((x).pmd) -#define pgd_val(x) ((x).pgd[0]) -#define pgprot_val(x) ((x).pgprot) - -#define __pte(x) ((pte_t) { (x) } ) -#define __pmd(x) ((pmd_t) { (x) } ) -#define __pgprot(x) ((pgprot_t) { (x) } ) - -#else -/* - * .. while these make it easier on the compiler - */ -typedef pteval_t pte_t; -typedef pmdval_t pmd_t; -typedef pmdval_t pgd_t[2]; -typedef pteval_t pgprot_t; - -#define pte_val(x) (x) -#define pmd_val(x) (x) -#define pgd_val(x) ((x)[0]) -#define pgprot_val(x) (x) - -#define __pte(x) (x) -#define __pmd(x) (x) -#define __pgprot(x) (x) - -#endif /* STRICT_MM_TYPECHECKS */ - -#endif /* _ASM_PGTABLE_2LEVEL_TYPES_H */ diff --git a/trunk/arch/arm/include/asm/pgtable-2level.h b/trunk/arch/arm/include/asm/pgtable-2level.h deleted file mode 100644 index 470457e1cfc5..000000000000 --- a/trunk/arch/arm/include/asm/pgtable-2level.h +++ /dev/null @@ -1,143 +0,0 @@ -/* - * arch/arm/include/asm/pgtable-2level.h - * - * Copyright (C) 1995-2002 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef _ASM_PGTABLE_2LEVEL_H -#define _ASM_PGTABLE_2LEVEL_H - -/* - * Hardware-wise, we have a two level page table structure, where the first - * level has 4096 entries, and the second level has 256 entries. Each entry - * is one 32-bit word. Most of the bits in the second level entry are used - * by hardware, and there aren't any "accessed" and "dirty" bits. - * - * Linux on the other hand has a three level page table structure, which can - * be wrapped to fit a two level page table structure easily - using the PGD - * and PTE only. However, Linux also expects one "PTE" table per page, and - * at least a "dirty" bit. - * - * Therefore, we tweak the implementation slightly - we tell Linux that we - * have 2048 entries in the first level, each of which is 8 bytes (iow, two - * hardware pointers to the second level.) The second level contains two - * hardware PTE tables arranged contiguously, preceded by Linux versions - * which contain the state information Linux needs. We, therefore, end up - * with 512 entries in the "PTE" level. - * - * This leads to the page tables having the following layout: - * - * pgd pte - * | | - * +--------+ - * | | +------------+ +0 - * +- - - - + | Linux pt 0 | - * | | +------------+ +1024 - * +--------+ +0 | Linux pt 1 | - * | |-----> +------------+ +2048 - * +- - - - + +4 | h/w pt 0 | - * | |-----> +------------+ +3072 - * +--------+ +8 | h/w pt 1 | - * | | +------------+ +4096 - * - * See L_PTE_xxx below for definitions of bits in the "Linux pt", and - * PTE_xxx for definitions of bits appearing in the "h/w pt". - * - * PMD_xxx definitions refer to bits in the first level page table. - * - * The "dirty" bit is emulated by only granting hardware write permission - * iff the page is marked "writable" and "dirty" in the Linux PTE. This - * means that a write to a clean page will cause a permission fault, and - * the Linux MM layer will mark the page dirty via handle_pte_fault(). - * For the hardware to notice the permission change, the TLB entry must - * be flushed, and ptep_set_access_flags() does that for us. - * - * The "accessed" or "young" bit is emulated by a similar method; we only - * allow accesses to the page if the "young" bit is set. Accesses to the - * page will cause a fault, and handle_pte_fault() will set the young bit - * for us as long as the page is marked present in the corresponding Linux - * PTE entry. Again, ptep_set_access_flags() will ensure that the TLB is - * up to date. - * - * However, when the "young" bit is cleared, we deny access to the page - * by clearing the hardware PTE. Currently Linux does not flush the TLB - * for us in this case, which means the TLB will retain the transation - * until either the TLB entry is evicted under pressure, or a context - * switch which changes the user space mapping occurs. - */ -#define PTRS_PER_PTE 512 -#define PTRS_PER_PMD 1 -#define PTRS_PER_PGD 2048 - -#define PTE_HWTABLE_PTRS (PTRS_PER_PTE) -#define PTE_HWTABLE_OFF (PTE_HWTABLE_PTRS * sizeof(pte_t)) -#define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u32)) - -/* - * PMD_SHIFT determines the size of the area a second-level page table can map - * PGDIR_SHIFT determines what a third-level page table entry can map - */ -#define PMD_SHIFT 21 -#define PGDIR_SHIFT 21 - -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) -#define PGDIR_SIZE (1UL << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) - -/* - * section address mask and size definitions. - */ -#define SECTION_SHIFT 20 -#define SECTION_SIZE (1UL << SECTION_SHIFT) -#define SECTION_MASK (~(SECTION_SIZE-1)) - -/* - * ARMv6 supersection address mask and size definitions. - */ -#define SUPERSECTION_SHIFT 24 -#define SUPERSECTION_SIZE (1UL << SUPERSECTION_SHIFT) -#define SUPERSECTION_MASK (~(SUPERSECTION_SIZE-1)) - -#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) - -/* - * "Linux" PTE definitions. - * - * We keep two sets of PTEs - the hardware and the linux version. - * This allows greater flexibility in the way we map the Linux bits - * onto the hardware tables, and allows us to have YOUNG and DIRTY - * bits. - * - * The PTE table pointer refers to the hardware entries; the "Linux" - * entries are stored 1024 bytes below. - */ -#define L_PTE_PRESENT (_AT(pteval_t, 1) << 0) -#define L_PTE_YOUNG (_AT(pteval_t, 1) << 1) -#define L_PTE_FILE (_AT(pteval_t, 1) << 2) /* only when !PRESENT */ -#define L_PTE_DIRTY (_AT(pteval_t, 1) << 6) -#define L_PTE_RDONLY (_AT(pteval_t, 1) << 7) -#define L_PTE_USER (_AT(pteval_t, 1) << 8) -#define L_PTE_XN (_AT(pteval_t, 1) << 9) -#define L_PTE_SHARED (_AT(pteval_t, 1) << 10) /* shared(v6), coherent(xsc3) */ - -/* - * These are the memory types, defined to be compatible with - * pre-ARMv6 CPUs cacheable and bufferable bits: XXCB - */ -#define L_PTE_MT_UNCACHED (_AT(pteval_t, 0x00) << 2) /* 0000 */ -#define L_PTE_MT_BUFFERABLE (_AT(pteval_t, 0x01) << 2) /* 0001 */ -#define L_PTE_MT_WRITETHROUGH (_AT(pteval_t, 0x02) << 2) /* 0010 */ -#define L_PTE_MT_WRITEBACK (_AT(pteval_t, 0x03) << 2) /* 0011 */ -#define L_PTE_MT_MINICACHE (_AT(pteval_t, 0x06) << 2) /* 0110 (sa1100, xscale) */ -#define L_PTE_MT_WRITEALLOC (_AT(pteval_t, 0x07) << 2) /* 0111 */ -#define L_PTE_MT_DEV_SHARED (_AT(pteval_t, 0x04) << 2) /* 0100 */ -#define L_PTE_MT_DEV_NONSHARED (_AT(pteval_t, 0x0c) << 2) /* 1100 */ -#define L_PTE_MT_DEV_WC (_AT(pteval_t, 0x09) << 2) /* 1001 */ -#define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 0x0b) << 2) /* 1011 */ -#define L_PTE_MT_MASK (_AT(pteval_t, 0x0f) << 2) - -#endif /* _ASM_PGTABLE_2LEVEL_H */ diff --git a/trunk/arch/arm/include/asm/pgtable-hwdef.h b/trunk/arch/arm/include/asm/pgtable-hwdef.h index 183111164ce9..fd1521d5cb9d 100644 --- a/trunk/arch/arm/include/asm/pgtable-hwdef.h +++ b/trunk/arch/arm/include/asm/pgtable-hwdef.h @@ -10,6 +10,81 @@ #ifndef _ASMARM_PGTABLE_HWDEF_H #define _ASMARM_PGTABLE_HWDEF_H -#include +/* + * Hardware page table definitions. + * + * + Level 1 descriptor (PMD) + * - common + */ +#define PMD_TYPE_MASK (3 << 0) +#define PMD_TYPE_FAULT (0 << 0) +#define PMD_TYPE_TABLE (1 << 0) +#define PMD_TYPE_SECT (2 << 0) +#define PMD_BIT4 (1 << 4) +#define PMD_DOMAIN(x) ((x) << 5) +#define PMD_PROTECTION (1 << 9) /* v5 */ +/* + * - section + */ +#define PMD_SECT_BUFFERABLE (1 << 2) +#define PMD_SECT_CACHEABLE (1 << 3) +#define PMD_SECT_XN (1 << 4) /* v6 */ +#define PMD_SECT_AP_WRITE (1 << 10) +#define PMD_SECT_AP_READ (1 << 11) +#define PMD_SECT_TEX(x) ((x) << 12) /* v5 */ +#define PMD_SECT_APX (1 << 15) /* v6 */ +#define PMD_SECT_S (1 << 16) /* v6 */ +#define PMD_SECT_nG (1 << 17) /* v6 */ +#define PMD_SECT_SUPER (1 << 18) /* v6 */ + +#define PMD_SECT_UNCACHED (0) +#define PMD_SECT_BUFFERED (PMD_SECT_BUFFERABLE) +#define PMD_SECT_WT (PMD_SECT_CACHEABLE) +#define PMD_SECT_WB (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE) +#define PMD_SECT_MINICACHE (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE) +#define PMD_SECT_WBWA (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE) +#define PMD_SECT_NONSHARED_DEV (PMD_SECT_TEX(2)) + +/* + * - coarse table (not used) + */ + +/* + * + Level 2 descriptor (PTE) + * - common + */ +#define PTE_TYPE_MASK (3 << 0) +#define PTE_TYPE_FAULT (0 << 0) +#define PTE_TYPE_LARGE (1 << 0) +#define PTE_TYPE_SMALL (2 << 0) +#define PTE_TYPE_EXT (3 << 0) /* v5 */ +#define PTE_BUFFERABLE (1 << 2) +#define PTE_CACHEABLE (1 << 3) + +/* + * - extended small page/tiny page + */ +#define PTE_EXT_XN (1 << 0) /* v6 */ +#define PTE_EXT_AP_MASK (3 << 4) +#define PTE_EXT_AP0 (1 << 4) +#define PTE_EXT_AP1 (2 << 4) +#define PTE_EXT_AP_UNO_SRO (0 << 4) +#define PTE_EXT_AP_UNO_SRW (PTE_EXT_AP0) +#define PTE_EXT_AP_URO_SRW (PTE_EXT_AP1) +#define PTE_EXT_AP_URW_SRW (PTE_EXT_AP1|PTE_EXT_AP0) +#define PTE_EXT_TEX(x) ((x) << 6) /* v5 */ +#define PTE_EXT_APX (1 << 9) /* v6 */ +#define PTE_EXT_COHERENT (1 << 9) /* XScale3 */ +#define PTE_EXT_SHARED (1 << 10) /* v6 */ +#define PTE_EXT_NG (1 << 11) /* v6 */ + +/* + * - small page + */ +#define PTE_SMALL_AP_MASK (0xff << 4) +#define PTE_SMALL_AP_UNO_SRO (0x00 << 4) +#define PTE_SMALL_AP_UNO_SRW (0x55 << 4) +#define PTE_SMALL_AP_URO_SRW (0xaa << 4) +#define PTE_SMALL_AP_URW_SRW (0xff << 4) #endif diff --git a/trunk/arch/arm/include/asm/pgtable.h b/trunk/arch/arm/include/asm/pgtable.h index 8ade1840c6f2..5750704e0271 100644 --- a/trunk/arch/arm/include/asm/pgtable.h +++ b/trunk/arch/arm/include/asm/pgtable.h @@ -24,8 +24,6 @@ #include #include -#include - /* * Just any arbitrary offset to the start of the vmalloc VM area: the * current 8MB value just means that there will be a 8MB "hole" after the @@ -43,6 +41,79 @@ #define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) #endif +/* + * Hardware-wise, we have a two level page table structure, where the first + * level has 4096 entries, and the second level has 256 entries. Each entry + * is one 32-bit word. Most of the bits in the second level entry are used + * by hardware, and there aren't any "accessed" and "dirty" bits. + * + * Linux on the other hand has a three level page table structure, which can + * be wrapped to fit a two level page table structure easily - using the PGD + * and PTE only. However, Linux also expects one "PTE" table per page, and + * at least a "dirty" bit. + * + * Therefore, we tweak the implementation slightly - we tell Linux that we + * have 2048 entries in the first level, each of which is 8 bytes (iow, two + * hardware pointers to the second level.) The second level contains two + * hardware PTE tables arranged contiguously, preceded by Linux versions + * which contain the state information Linux needs. We, therefore, end up + * with 512 entries in the "PTE" level. + * + * This leads to the page tables having the following layout: + * + * pgd pte + * | | + * +--------+ + * | | +------------+ +0 + * +- - - - + | Linux pt 0 | + * | | +------------+ +1024 + * +--------+ +0 | Linux pt 1 | + * | |-----> +------------+ +2048 + * +- - - - + +4 | h/w pt 0 | + * | |-----> +------------+ +3072 + * +--------+ +8 | h/w pt 1 | + * | | +------------+ +4096 + * + * See L_PTE_xxx below for definitions of bits in the "Linux pt", and + * PTE_xxx for definitions of bits appearing in the "h/w pt". + * + * PMD_xxx definitions refer to bits in the first level page table. + * + * The "dirty" bit is emulated by only granting hardware write permission + * iff the page is marked "writable" and "dirty" in the Linux PTE. This + * means that a write to a clean page will cause a permission fault, and + * the Linux MM layer will mark the page dirty via handle_pte_fault(). + * For the hardware to notice the permission change, the TLB entry must + * be flushed, and ptep_set_access_flags() does that for us. + * + * The "accessed" or "young" bit is emulated by a similar method; we only + * allow accesses to the page if the "young" bit is set. Accesses to the + * page will cause a fault, and handle_pte_fault() will set the young bit + * for us as long as the page is marked present in the corresponding Linux + * PTE entry. Again, ptep_set_access_flags() will ensure that the TLB is + * up to date. + * + * However, when the "young" bit is cleared, we deny access to the page + * by clearing the hardware PTE. Currently Linux does not flush the TLB + * for us in this case, which means the TLB will retain the transation + * until either the TLB entry is evicted under pressure, or a context + * switch which changes the user space mapping occurs. + */ +#define PTRS_PER_PTE 512 +#define PTRS_PER_PMD 1 +#define PTRS_PER_PGD 2048 + +#define PTE_HWTABLE_PTRS (PTRS_PER_PTE) +#define PTE_HWTABLE_OFF (PTE_HWTABLE_PTRS * sizeof(pte_t)) +#define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u32)) + +/* + * PMD_SHIFT determines the size of the area a second-level page table can map + * PGDIR_SHIFT determines what a third-level page table entry can map + */ +#define PMD_SHIFT 21 +#define PGDIR_SHIFT 21 + #define LIBRARY_TEXT_START 0x0c000000 #ifndef __ASSEMBLY__ @@ -53,6 +124,12 @@ extern void __pgd_error(const char *file, int line, pgd_t); #define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte) #define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd) #define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd) +#endif /* !__ASSEMBLY__ */ + +#define PMD_SIZE (1UL << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE-1)) +#define PGDIR_SIZE (1UL << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) /* * This is the lowest virtual address we can permit any user space @@ -61,6 +138,60 @@ extern void __pgd_error(const char *file, int line, pgd_t); */ #define FIRST_USER_ADDRESS PAGE_SIZE +#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) + +/* + * section address mask and size definitions. + */ +#define SECTION_SHIFT 20 +#define SECTION_SIZE (1UL << SECTION_SHIFT) +#define SECTION_MASK (~(SECTION_SIZE-1)) + +/* + * ARMv6 supersection address mask and size definitions. + */ +#define SUPERSECTION_SHIFT 24 +#define SUPERSECTION_SIZE (1UL << SUPERSECTION_SHIFT) +#define SUPERSECTION_MASK (~(SUPERSECTION_SIZE-1)) + +/* + * "Linux" PTE definitions. + * + * We keep two sets of PTEs - the hardware and the linux version. + * This allows greater flexibility in the way we map the Linux bits + * onto the hardware tables, and allows us to have YOUNG and DIRTY + * bits. + * + * The PTE table pointer refers to the hardware entries; the "Linux" + * entries are stored 1024 bytes below. + */ +#define L_PTE_PRESENT (_AT(pteval_t, 1) << 0) +#define L_PTE_YOUNG (_AT(pteval_t, 1) << 1) +#define L_PTE_FILE (_AT(pteval_t, 1) << 2) /* only when !PRESENT */ +#define L_PTE_DIRTY (_AT(pteval_t, 1) << 6) +#define L_PTE_RDONLY (_AT(pteval_t, 1) << 7) +#define L_PTE_USER (_AT(pteval_t, 1) << 8) +#define L_PTE_XN (_AT(pteval_t, 1) << 9) +#define L_PTE_SHARED (_AT(pteval_t, 1) << 10) /* shared(v6), coherent(xsc3) */ + +/* + * These are the memory types, defined to be compatible with + * pre-ARMv6 CPUs cacheable and bufferable bits: XXCB + */ +#define L_PTE_MT_UNCACHED (_AT(pteval_t, 0x00) << 2) /* 0000 */ +#define L_PTE_MT_BUFFERABLE (_AT(pteval_t, 0x01) << 2) /* 0001 */ +#define L_PTE_MT_WRITETHROUGH (_AT(pteval_t, 0x02) << 2) /* 0010 */ +#define L_PTE_MT_WRITEBACK (_AT(pteval_t, 0x03) << 2) /* 0011 */ +#define L_PTE_MT_MINICACHE (_AT(pteval_t, 0x06) << 2) /* 0110 (sa1100, xscale) */ +#define L_PTE_MT_WRITEALLOC (_AT(pteval_t, 0x07) << 2) /* 0111 */ +#define L_PTE_MT_DEV_SHARED (_AT(pteval_t, 0x04) << 2) /* 0100 */ +#define L_PTE_MT_DEV_NONSHARED (_AT(pteval_t, 0x0c) << 2) /* 1100 */ +#define L_PTE_MT_DEV_WC (_AT(pteval_t, 0x09) << 2) /* 1001 */ +#define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 0x0b) << 2) /* 1011 */ +#define L_PTE_MT_MASK (_AT(pteval_t, 0x0f) << 2) + +#ifndef __ASSEMBLY__ + /* * The pgprot_* and protection_map entries will be fixed up in runtime * to include the cachable and bufferable bits based on memory policy, @@ -196,10 +327,10 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; static inline pte_t *pmd_page_vaddr(pmd_t pmd) { - return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK); + return __va(pmd_val(pmd) & PAGE_MASK); } -#define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK)) +#define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd))) /* we don't need complex calculations here as the pmd is folded into the pgd */ #define pmd_addr_end(addr,end) (end) @@ -220,7 +351,7 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) #define pte_offset_map(pmd,addr) (__pte_map(pmd) + pte_index(addr)) #define pte_unmap(pte) __pte_unmap(pte) -#define pte_pfn(pte) ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT) +#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT) #define pfn_pte(pfn,prot) __pte(__pfn_to_phys(pfn) | pgprot_val(prot)) #define pte_page(pte) pfn_to_page(pte_pfn(pte)) diff --git a/trunk/arch/arm/include/asm/poll.h b/trunk/arch/arm/include/asm/poll.h deleted file mode 100644 index c98509d3149e..000000000000 --- a/trunk/arch/arm/include/asm/poll.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/trunk/arch/arm/include/asm/resource.h b/trunk/arch/arm/include/asm/resource.h deleted file mode 100644 index 734b581b5b6a..000000000000 --- a/trunk/arch/arm/include/asm/resource.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ARM_RESOURCE_H -#define _ARM_RESOURCE_H - -#include - -#endif diff --git a/trunk/arch/arm/include/asm/sections.h b/trunk/arch/arm/include/asm/sections.h deleted file mode 100644 index 2b8c5160388f..000000000000 --- a/trunk/arch/arm/include/asm/sections.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/trunk/arch/arm/include/asm/siginfo.h b/trunk/arch/arm/include/asm/siginfo.h deleted file mode 100644 index 5e21852e6039..000000000000 --- a/trunk/arch/arm/include/asm/siginfo.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASMARM_SIGINFO_H -#define _ASMARM_SIGINFO_H - -#include - -#endif diff --git a/trunk/arch/arm/include/asm/sizes.h b/trunk/arch/arm/include/asm/sizes.h deleted file mode 100644 index 154b89b81d3e..000000000000 --- a/trunk/arch/arm/include/asm/sizes.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -/* Size definitions - * Copyright (C) ARM Limited 1998. All rights reserved. - */ -#include - -#define SZ_48M (SZ_32M + SZ_16M) diff --git a/trunk/arch/arm/include/asm/smp.h b/trunk/arch/arm/include/asm/smp.h index 0a17b62538c2..e42d96a45d3e 100644 --- a/trunk/arch/arm/include/asm/smp.h +++ b/trunk/arch/arm/include/asm/smp.h @@ -32,11 +32,6 @@ extern void show_ipi_list(struct seq_file *, int); */ asmlinkage void do_IPI(int ipinr, struct pt_regs *regs); -/* - * Called from C code, this handles an IPI. - */ -void handle_IPI(int ipinr, struct pt_regs *regs); - /* * Setup the set of possible CPUs (via set_cpu_possible) */ @@ -70,12 +65,6 @@ extern void platform_secondary_init(unsigned int cpu); */ extern void platform_smp_prepare_cpus(unsigned int); -/* - * Logical CPU mapping. - */ -extern int __cpu_logical_map[NR_CPUS]; -#define cpu_logical_map(cpu) __cpu_logical_map[cpu] - /* * Initial data for bringing up a secondary CPU. */ diff --git a/trunk/arch/arm/include/asm/system.h b/trunk/arch/arm/include/asm/system.h index ed6b0499a106..832888d0c20c 100644 --- a/trunk/arch/arm/include/asm/system.h +++ b/trunk/arch/arm/include/asm/system.h @@ -62,6 +62,13 @@ #include +#define __exception __attribute__((section(".exception.text"))) +#ifdef CONFIG_FUNCTION_GRAPH_TRACER +#define __exception_irq_entry __irq_entry +#else +#define __exception_irq_entry __exception +#endif + struct thread_info; struct task_struct; diff --git a/trunk/arch/arm/include/asm/tlbflush.h b/trunk/arch/arm/include/asm/tlbflush.h index 02b2f8203982..8077145698ff 100644 --- a/trunk/arch/arm/include/asm/tlbflush.h +++ b/trunk/arch/arm/include/asm/tlbflush.h @@ -471,7 +471,7 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr) * these operations. This is typically used when we are removing * PMD entries. */ -static inline void flush_pmd_entry(void *pmd) +static inline void flush_pmd_entry(pmd_t *pmd) { const unsigned int __tlb_flag = __cpu_tlb_flags; @@ -487,7 +487,7 @@ static inline void flush_pmd_entry(void *pmd) dsb(); } -static inline void clean_pmd_entry(void *pmd) +static inline void clean_pmd_entry(pmd_t *pmd) { const unsigned int __tlb_flag = __cpu_tlb_flags; diff --git a/trunk/arch/arm/include/asm/topology.h b/trunk/arch/arm/include/asm/topology.h index a7e457ed27c3..accbd7cad9b5 100644 --- a/trunk/arch/arm/include/asm/topology.h +++ b/trunk/arch/arm/include/asm/topology.h @@ -1,39 +1,6 @@ #ifndef _ASM_ARM_TOPOLOGY_H #define _ASM_ARM_TOPOLOGY_H -#ifdef CONFIG_ARM_CPU_TOPOLOGY - -#include - -struct cputopo_arm { - int thread_id; - int core_id; - int socket_id; - cpumask_t thread_sibling; - cpumask_t core_sibling; -}; - -extern struct cputopo_arm cpu_topology[NR_CPUS]; - -#define topology_physical_package_id(cpu) (cpu_topology[cpu].socket_id) -#define topology_core_id(cpu) (cpu_topology[cpu].core_id) -#define topology_core_cpumask(cpu) (&cpu_topology[cpu].core_sibling) -#define topology_thread_cpumask(cpu) (&cpu_topology[cpu].thread_sibling) - -#define mc_capable() (cpu_topology[0].socket_id != -1) -#define smt_capable() (cpu_topology[0].thread_id != -1) - -void init_cpu_topology(void); -void store_cpu_topology(unsigned int cpuid); -const struct cpumask *cpu_coregroup_mask(unsigned int cpu); - -#else - -static inline void init_cpu_topology(void) { } -static inline void store_cpu_topology(unsigned int cpuid) { } - -#endif - #include #endif /* _ASM_ARM_TOPOLOGY_H */ diff --git a/trunk/arch/arm/include/asm/unistd.h b/trunk/arch/arm/include/asm/unistd.h index c60a2944f95b..2c04ed5efeb5 100644 --- a/trunk/arch/arm/include/asm/unistd.h +++ b/trunk/arch/arm/include/asm/unistd.h @@ -478,8 +478,8 @@ /* * Unimplemented (or alternatively implemented) syscalls */ -#define __IGNORE_fadvise64_64 -#define __IGNORE_migrate_pages +#define __IGNORE_fadvise64_64 1 +#define __IGNORE_migrate_pages 1 #endif /* __KERNEL__ */ #endif /* __ASM_ARM_UNISTD_H */ diff --git a/trunk/arch/arm/kernel/Makefile b/trunk/arch/arm/kernel/Makefile index 68036eece340..f7887dc53c1f 100644 --- a/trunk/arch/arm/kernel/Makefile +++ b/trunk/arch/arm/kernel/Makefile @@ -29,7 +29,7 @@ obj-$(CONFIG_MODULES) += armksyms.o module.o obj-$(CONFIG_ARTHUR) += arthur.o obj-$(CONFIG_ISA_DMA) += dma-isa.o obj-$(CONFIG_PCI) += bios32.o isa.o -obj-$(CONFIG_ARM_CPU_SUSPEND) += sleep.o +obj-$(CONFIG_PM_SLEEP) += sleep.o obj-$(CONFIG_HAVE_SCHED_CLOCK) += sched_clock.o obj-$(CONFIG_SMP) += smp.o smp_tlb.o obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o @@ -66,7 +66,6 @@ obj-$(CONFIG_IWMMXT) += iwmmxt.o obj-$(CONFIG_CPU_HAS_PMU) += pmu.o obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt -obj-$(CONFIG_ARM_CPU_TOPOLOGY) += topology.o ifneq ($(CONFIG_ARCH_EBSA110),y) obj-y += io.o diff --git a/trunk/arch/arm/kernel/asm-offsets.c b/trunk/arch/arm/kernel/asm-offsets.c index 1429d8989fb9..16baba2e4369 100644 --- a/trunk/arch/arm/kernel/asm-offsets.c +++ b/trunk/arch/arm/kernel/asm-offsets.c @@ -20,7 +20,6 @@ #include #include #include -#include #include /* @@ -93,17 +92,6 @@ int main(void) DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0)); DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs)); BLANK(); -#ifdef CONFIG_CACHE_L2X0 - DEFINE(L2X0_R_PHY_BASE, offsetof(struct l2x0_regs, phy_base)); - DEFINE(L2X0_R_AUX_CTRL, offsetof(struct l2x0_regs, aux_ctrl)); - DEFINE(L2X0_R_TAG_LATENCY, offsetof(struct l2x0_regs, tag_latency)); - DEFINE(L2X0_R_DATA_LATENCY, offsetof(struct l2x0_regs, data_latency)); - DEFINE(L2X0_R_FILTER_START, offsetof(struct l2x0_regs, filter_start)); - DEFINE(L2X0_R_FILTER_END, offsetof(struct l2x0_regs, filter_end)); - DEFINE(L2X0_R_PREFETCH_CTRL, offsetof(struct l2x0_regs, prefetch_ctrl)); - DEFINE(L2X0_R_PWR_CTRL, offsetof(struct l2x0_regs, pwr_ctrl)); - BLANK(); -#endif #ifdef CONFIG_CPU_HAS_ASID DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id)); BLANK(); diff --git a/trunk/arch/arm/kernel/bios32.c b/trunk/arch/arm/kernel/bios32.c index c0d9203fc75e..d6df359408f0 100644 --- a/trunk/arch/arm/kernel/bios32.c +++ b/trunk/arch/arm/kernel/bios32.c @@ -412,9 +412,6 @@ void pcibios_fixup_bus(struct pci_bus *bus) printk(KERN_INFO "PCI: bus%d: Fast back to back transfers %sabled\n", bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis"); } -#ifdef CONFIG_HOTPLUG -EXPORT_SYMBOL(pcibios_fixup_bus); -#endif /* * Convert from Linux-centric to bus-centric addresses for bridge devices. @@ -434,7 +431,6 @@ pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, region->start = res->start - offset; region->end = res->end - offset; } -EXPORT_SYMBOL(pcibios_resource_to_bus); void __devinit pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, @@ -451,7 +447,12 @@ pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, res->start = region->start + offset; res->end = region->end + offset; } + +#ifdef CONFIG_HOTPLUG +EXPORT_SYMBOL(pcibios_fixup_bus); +EXPORT_SYMBOL(pcibios_resource_to_bus); EXPORT_SYMBOL(pcibios_bus_to_resource); +#endif /* * Swizzle the device pin each time we cross a bridge. diff --git a/trunk/arch/arm/kernel/ecard.c b/trunk/arch/arm/kernel/ecard.c index 4dd0edab6a65..d16500110ee9 100644 --- a/trunk/arch/arm/kernel/ecard.c +++ b/trunk/arch/arm/kernel/ecard.c @@ -237,7 +237,7 @@ static void ecard_init_pgtables(struct mm_struct *mm) memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (IO_SIZE / PGDIR_SIZE)); - src_pgd = pgd_offset(mm, (unsigned long)EASI_BASE); + src_pgd = pgd_offset(mm, EASI_BASE); dst_pgd = pgd_offset(mm, EASI_START); memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE)); @@ -674,37 +674,44 @@ static int __init ecard_probeirqhw(void) #define ecard_probeirqhw() (0) #endif -static void __iomem *__ecard_address(ecard_t *ec, card_type_t type, card_speed_t speed) +#ifndef IO_EC_MEMC8_BASE +#define IO_EC_MEMC8_BASE 0 +#endif + +static unsigned int __ecard_address(ecard_t *ec, card_type_t type, card_speed_t speed) { - void __iomem *address = NULL; + unsigned long address = 0; int slot = ec->slot_no; if (ec->slot_no == 8) - return ECARD_MEMC8_BASE; + return IO_EC_MEMC8_BASE; ectcr &= ~(1 << slot); switch (type) { case ECARD_MEMC: if (slot < 4) - address = ECARD_MEMC_BASE + (slot << 14); + address = IO_EC_MEMC_BASE + (slot << 12); break; case ECARD_IOC: if (slot < 4) - address = ECARD_IOC_BASE + (slot << 14); + address = IO_EC_IOC_BASE + (slot << 12); +#ifdef IO_EC_IOC4_BASE else - address = ECARD_IOC4_BASE + ((slot - 4) << 14); + address = IO_EC_IOC4_BASE + ((slot - 4) << 12); +#endif if (address) - address += speed << 19; + address += speed << 17; break; +#ifdef IO_EC_EASI_BASE case ECARD_EASI: - address = ECARD_EASI_BASE + (slot << 24); + address = IO_EC_EASI_BASE + (slot << 22); if (speed == ECARD_FAST) ectcr |= 1 << slot; break; - +#endif default: break; } @@ -983,7 +990,6 @@ ecard_probe(int slot, card_type_t type) ecard_t **ecp; ecard_t *ec; struct ex_ecid cid; - void __iomem *addr; int i, rc; ec = ecard_alloc_card(type, slot); @@ -993,7 +999,7 @@ ecard_probe(int slot, card_type_t type) } rc = -ENODEV; - if ((addr = __ecard_address(ec, type, ECARD_SYNC)) == NULL) + if ((ec->podaddr = __ecard_address(ec, type, ECARD_SYNC)) == 0) goto nodev; cid.r_zero = 1; @@ -1013,7 +1019,7 @@ ecard_probe(int slot, card_type_t type) ec->cid.fiqmask = cid.r_fiqmask; ec->cid.fiqoff = ecard_gets24(cid.r_fiqoff); ec->fiqaddr = - ec->irqaddr = addr; + ec->irqaddr = (void __iomem *)ioaddr(ec->podaddr); if (ec->cid.is) { ec->irqmask = ec->cid.irqmask; @@ -1042,8 +1048,10 @@ ecard_probe(int slot, card_type_t type) set_irq_flags(ec->irq, IRQF_VALID); } +#ifdef IO_EC_MEMC8_BASE if (slot == 8) ec->irq = 11; +#endif #ifdef CONFIG_ARCH_RPC /* On RiscPC, only first two slots have DMA capability */ if (slot < 2) @@ -1089,7 +1097,9 @@ static int __init ecard_init(void) ecard_probe(slot, ECARD_IOC); } +#ifdef IO_EC_MEMC8_BASE ecard_probe(8, ECARD_IOC); +#endif irqhw = ecard_probeirqhw(); diff --git a/trunk/arch/arm/kernel/head.S b/trunk/arch/arm/kernel/head.S index 239703dbdf4f..742b6108a001 100644 --- a/trunk/arch/arm/kernel/head.S +++ b/trunk/arch/arm/kernel/head.S @@ -21,7 +21,6 @@ #include #include #include -#include #ifdef CONFIG_DEBUG_LL #include @@ -39,14 +38,11 @@ #error KERNEL_RAM_VADDR must start at 0xXXXX8000 #endif -#define PG_DIR_SIZE 0x4000 -#define PMD_ORDER 2 - .globl swapper_pg_dir - .equ swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE + .equ swapper_pg_dir, KERNEL_RAM_VADDR - 0x4000 .macro pgtbl, rd, phys - add \rd, \phys, #TEXT_OFFSET - PG_DIR_SIZE + add \rd, \phys, #TEXT_OFFSET - 0x4000 .endm #ifdef CONFIG_XIP_KERNEL @@ -152,11 +148,11 @@ __create_page_tables: pgtbl r4, r8 @ page table address /* - * Clear the swapper page table + * Clear the 16K level 1 swapper page table */ mov r0, r4 mov r3, #0 - add r6, r0, #PG_DIR_SIZE + add r6, r0, #0x4000 1: str r3, [r0], #4 str r3, [r0], #4 str r3, [r0], #4 @@ -175,30 +171,30 @@ __create_page_tables: sub r0, r0, r3 @ virt->phys offset add r5, r5, r0 @ phys __enable_mmu add r6, r6, r0 @ phys __enable_mmu_end - mov r5, r5, lsr #SECTION_SHIFT - mov r6, r6, lsr #SECTION_SHIFT + mov r5, r5, lsr #20 + mov r6, r6, lsr #20 -1: orr r3, r7, r5, lsl #SECTION_SHIFT @ flags + kernel base - str r3, [r4, r5, lsl #PMD_ORDER] @ identity mapping - cmp r5, r6 - addlo r5, r5, #1 @ next section - blo 1b +1: orr r3, r7, r5, lsl #20 @ flags + kernel base + str r3, [r4, r5, lsl #2] @ identity mapping + teq r5, r6 + addne r5, r5, #1 @ next section + bne 1b /* * Now setup the pagetables for our kernel direct * mapped region. */ mov r3, pc - mov r3, r3, lsr #SECTION_SHIFT - orr r3, r7, r3, lsl #SECTION_SHIFT - add r0, r4, #(KERNEL_START & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER) - str r3, [r0, #((KERNEL_START & 0x00f00000) >> SECTION_SHIFT) << PMD_ORDER]! + mov r3, r3, lsr #20 + orr r3, r7, r3, lsl #20 + add r0, r4, #(KERNEL_START & 0xff000000) >> 18 + str r3, [r0, #(KERNEL_START & 0x00f00000) >> 18]! ldr r6, =(KERNEL_END - 1) - add r0, r0, #1 << PMD_ORDER - add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER) + add r0, r0, #4 + add r6, r4, r6, lsr #18 1: cmp r0, r6 - add r3, r3, #1 << SECTION_SHIFT - strls r3, [r0], #1 << PMD_ORDER + add r3, r3, #1 << 20 + strls r3, [r0], #4 bls 1b #ifdef CONFIG_XIP_KERNEL @@ -207,11 +203,11 @@ __create_page_tables: */ add r3, r8, #TEXT_OFFSET orr r3, r3, r7 - add r0, r4, #(KERNEL_RAM_VADDR & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER) - str r3, [r0, #(KERNEL_RAM_VADDR & 0x00f00000) >> (SECTION_SHIFT - PMD_ORDER)]! + add r0, r4, #(KERNEL_RAM_VADDR & 0xff000000) >> 18 + str r3, [r0, #(KERNEL_RAM_VADDR & 0x00f00000) >> 18]! ldr r6, =(_end - 1) add r0, r0, #4 - add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER) + add r6, r4, r6, lsr #18 1: cmp r0, r6 add r3, r3, #1 << 20 strls r3, [r0], #4 @@ -222,12 +218,12 @@ __create_page_tables: * Then map boot params address in r2 or * the first 1MB of ram if boot params address is not specified. */ - mov r0, r2, lsr #SECTION_SHIFT - movs r0, r0, lsl #SECTION_SHIFT + mov r0, r2, lsr #20 + movs r0, r0, lsl #20 moveq r0, r8 sub r3, r0, r8 add r3, r3, #PAGE_OFFSET - add r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER) + add r3, r4, r3, lsr #18 orr r6, r7, r0 str r6, [r3] @@ -240,21 +236,21 @@ __create_page_tables: */ addruart r7, r3 - mov r3, r3, lsr #SECTION_SHIFT - mov r3, r3, lsl #PMD_ORDER + mov r3, r3, lsr #20 + mov r3, r3, lsl #2 add r0, r4, r3 rsb r3, r3, #0x4000 @ PTRS_PER_PGD*sizeof(long) cmp r3, #0x0800 @ limit to 512MB movhi r3, #0x0800 add r6, r0, r3 - mov r3, r7, lsr #SECTION_SHIFT + mov r3, r7, lsr #20 ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags - orr r3, r7, r3, lsl #SECTION_SHIFT + orr r3, r7, r3, lsl #20 1: str r3, [r0], #4 - add r3, r3, #1 << SECTION_SHIFT - cmp r0, r6 - blo 1b + add r3, r3, #1 << 20 + teq r0, r6 + bne 1b #else /* CONFIG_DEBUG_ICEDCC */ /* we don't need any serial debugging mappings for ICEDCC */ @@ -266,7 +262,7 @@ __create_page_tables: * If we're using the NetWinder or CATS, we also need to map * in the 16550-type serial port for the debug messages */ - add r0, r4, #0xff000000 >> (SECTION_SHIFT - PMD_ORDER) + add r0, r4, #0xff000000 >> 18 orr r3, r7, #0x7c000000 str r3, [r0] #endif @@ -276,10 +272,10 @@ __create_page_tables: * Similar reasons here - for debug. This is * only for Acorn RiscPC architectures. */ - add r0, r4, #0x02000000 >> (SECTION_SHIFT - PMD_ORDER) + add r0, r4, #0x02000000 >> 18 orr r3, r7, #0x02000000 str r3, [r0] - add r0, r4, #0xd8000000 >> (SECTION_SHIFT - PMD_ORDER) + add r0, r4, #0xd8000000 >> 18 str r3, [r0] #endif #endif @@ -492,8 +488,13 @@ __fixup_pv_table: add r5, r5, r3 @ adjust table end address add r7, r7, r3 @ adjust __pv_phys_offset address str r8, [r7] @ save computed PHYS_OFFSET to __pv_phys_offset +#ifndef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT mov r6, r3, lsr #24 @ constant for add/sub instructions teq r3, r6, lsl #24 @ must be 16MiB aligned +#else + mov r6, r3, lsr #16 @ constant for add/sub instructions + teq r3, r6, lsl #16 @ must be 64kiB aligned +#endif THUMB( it ne @ cross section branch ) bne __error str r6, [r7, #4] @ save to __pv_offset @@ -509,8 +510,20 @@ ENDPROC(__fixup_pv_table) .text __fixup_a_pv_table: #ifdef CONFIG_THUMB2_KERNEL - lsls r6, #24 - beq 2f +#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT + lsls r0, r6, #24 + lsr r6, #8 + beq 1f + clz r7, r0 + lsr r0, #24 + lsl r0, r7 + bic r0, 0x0080 + lsrs r7, #1 + orrcs r0, #0x0080 + orr r0, r0, r7, lsl #12 +#endif +1: lsls r6, #24 + beq 4f clz r7, r6 lsr r6, #24 lsl r6, r7 @@ -519,25 +532,43 @@ __fixup_a_pv_table: orrcs r6, #0x0080 orr r6, r6, r7, lsl #12 orr r6, #0x4000 - b 2f -1: add r7, r3 - ldrh ip, [r7, #2] + b 4f +2: @ at this point the C flag is always clear + add r7, r3 +#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT + ldrh ip, [r7] + tst ip, 0x0400 @ the i bit tells us LS or MS byte + beq 3f + cmp r0, #0 @ set C flag, and ... + biceq ip, 0x0400 @ immediate zero value has a special encoding + streqh ip, [r7] @ that requires the i bit cleared +#endif +3: ldrh ip, [r7, #2] and ip, 0x8f00 - orr ip, r6 @ mask in offset bits 31-24 + orrcc ip, r6 @ mask in offset bits 31-24 + orrcs ip, r0 @ mask in offset bits 23-16 strh ip, [r7, #2] -2: cmp r4, r5 +4: cmp r4, r5 ldrcc r7, [r4], #4 @ use branch for delay slot - bcc 1b + bcc 2b bx lr #else - b 2f -1: ldr ip, [r7, r3] +#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT + and r0, r6, #255 @ offset bits 23-16 + mov r6, r6, lsr #8 @ offset bits 31-24 +#else + mov r0, #0 @ just in case... +#endif + b 3f +2: ldr ip, [r7, r3] bic ip, ip, #0x000000ff - orr ip, ip, r6 @ mask in offset bits 31-24 + tst ip, #0x400 @ rotate shift tells us LS or MS byte + orrne ip, ip, r6 @ mask in offset bits 31-24 + orreq ip, ip, r0 @ mask in offset bits 23-16 str ip, [r7, r3] -2: cmp r4, r5 +3: cmp r4, r5 ldrcc r7, [r4], #4 @ use branch for delay slot - bcc 1b + bcc 2b mov pc, lr #endif ENDPROC(__fixup_a_pv_table) diff --git a/trunk/arch/arm/kernel/irq.c b/trunk/arch/arm/kernel/irq.c index 53919b230e8b..de3dcab8610b 100644 --- a/trunk/arch/arm/kernel/irq.c +++ b/trunk/arch/arm/kernel/irq.c @@ -35,8 +35,8 @@ #include #include #include +#include -#include #include #include #include diff --git a/trunk/arch/arm/kernel/module.c b/trunk/arch/arm/kernel/module.c index 1e9be5d25e56..cc2020c2c709 100644 --- a/trunk/arch/arm/kernel/module.c +++ b/trunk/arch/arm/kernel/module.c @@ -33,7 +33,7 @@ * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off. */ #undef MODULES_VADDR -#define MODULES_VADDR (((unsigned long)_etext + ~PMD_MASK) & PMD_MASK) +#define MODULES_VADDR (((unsigned long)_etext + ~PGDIR_MASK) & PGDIR_MASK) #endif #ifdef CONFIG_MMU diff --git a/trunk/arch/arm/kernel/perf_event_v7.c b/trunk/arch/arm/kernel/perf_event_v7.c index 6be3e2e4d838..4c851834f68e 100644 --- a/trunk/arch/arm/kernel/perf_event_v7.c +++ b/trunk/arch/arm/kernel/perf_event_v7.c @@ -321,8 +321,8 @@ static const unsigned armv7_a9_perf_map[PERF_COUNT_HW_MAX] = { [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE, - [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_DCACHE_ACCESS, - [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_DCACHE_REFILL, + [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_COHERENT_LINE_HIT, + [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_COHERENT_LINE_MISS, [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES, diff --git a/trunk/arch/arm/kernel/smp.c b/trunk/arch/arm/kernel/smp.c index 35417d0fb8ab..d88ff0230e82 100644 --- a/trunk/arch/arm/kernel/smp.c +++ b/trunk/arch/arm/kernel/smp.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -30,8 +31,6 @@ #include #include #include -#include -#include #include #include #include @@ -40,7 +39,6 @@ #include #include #include -#include /* * as from 2.5, kernels no longer have an init_tasks structure @@ -261,20 +259,6 @@ void __ref cpu_die(void) } #endif /* CONFIG_HOTPLUG_CPU */ -int __cpu_logical_map[NR_CPUS]; - -void __init smp_setup_processor_id(void) -{ - int i; - u32 cpu = is_smp() ? read_cpuid_mpidr() & 0xff : 0; - - cpu_logical_map(0) = cpu; - for (i = 1; i < NR_CPUS; ++i) - cpu_logical_map(i) = i == cpu ? 0 : i; - - printk(KERN_INFO "Booting Linux on physical CPU %d\n", cpu); -} - /* * Called by both boot and secondaries to move global data into * per-processor storage. @@ -284,8 +268,6 @@ static void __cpuinit smp_store_cpu_info(unsigned int cpuid) struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid); cpu_info->loops_per_jiffy = loops_per_jiffy; - - store_cpu_topology(cpuid); } /* @@ -376,8 +358,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus) { unsigned int ncores = num_possible_cpus(); - init_cpu_topology(); - smp_store_cpu_info(smp_processor_id()); /* @@ -479,11 +459,6 @@ static void ipi_timer(void) #ifdef CONFIG_LOCAL_TIMERS asmlinkage void __exception_irq_entry do_local_timer(struct pt_regs *regs) -{ - handle_local_timer(regs); -} - -void handle_local_timer(struct pt_regs *regs) { struct pt_regs *old_regs = set_irq_regs(regs); int cpu = smp_processor_id(); @@ -591,11 +566,6 @@ static void ipi_cpu_stop(unsigned int cpu) * Main handler for inter-processor interrupts */ asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs) -{ - handle_IPI(ipinr, regs); -} - -void handle_IPI(int ipinr, struct pt_regs *regs) { unsigned int cpu = smp_processor_id(); struct pt_regs *old_regs = set_irq_regs(regs); diff --git a/trunk/arch/arm/kernel/smp_scu.c b/trunk/arch/arm/kernel/smp_scu.c index 8f5dd7963356..79ed5e7f204a 100644 --- a/trunk/arch/arm/kernel/smp_scu.c +++ b/trunk/arch/arm/kernel/smp_scu.c @@ -13,7 +13,6 @@ #include #include -#include #define SCU_CTRL 0x00 #define SCU_CONFIG 0x04 @@ -34,19 +33,10 @@ unsigned int __init scu_get_core_count(void __iomem *scu_base) /* * Enable the SCU */ -void scu_enable(void __iomem *scu_base) +void __init scu_enable(void __iomem *scu_base) { u32 scu_ctrl; -#ifdef CONFIG_ARM_ERRATA_764369 - /* Cortex-A9 only */ - if ((read_cpuid(CPUID_ID) & 0xff0ffff0) == 0x410fc090) { - scu_ctrl = __raw_readl(scu_base + 0x30); - if (!(scu_ctrl & 1)) - __raw_writel(scu_ctrl | 0x1, scu_base + 0x30); - } -#endif - scu_ctrl = __raw_readl(scu_base + SCU_CTRL); /* already enabled? */ if (scu_ctrl & 1) diff --git a/trunk/arch/arm/kernel/time.c b/trunk/arch/arm/kernel/time.c index 5a54b95d6bd2..cb634c3e28e9 100644 --- a/trunk/arch/arm/kernel/time.c +++ b/trunk/arch/arm/kernel/time.c @@ -39,11 +39,13 @@ */ static struct sys_timer *system_timer; -#if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE) || \ - defined(CONFIG_NVRAM) || defined(CONFIG_NVRAM_MODULE) +#if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE) /* this needs a better home */ DEFINE_SPINLOCK(rtc_lock); + +#ifdef CONFIG_RTC_DRV_CMOS_MODULE EXPORT_SYMBOL(rtc_lock); +#endif #endif /* pc-style 'CMOS' RTC support */ /* change this if you have some constant time drift */ diff --git a/trunk/arch/arm/kernel/topology.c b/trunk/arch/arm/kernel/topology.c deleted file mode 100644 index 1040c00405d0..000000000000 --- a/trunk/arch/arm/kernel/topology.c +++ /dev/null @@ -1,148 +0,0 @@ -/* - * arch/arm/kernel/topology.c - * - * Copyright (C) 2011 Linaro Limited. - * Written by: Vincent Guittot - * - * based on arch/sh/kernel/topology.c - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#define MPIDR_SMP_BITMASK (0x3 << 30) -#define MPIDR_SMP_VALUE (0x2 << 30) - -#define MPIDR_MT_BITMASK (0x1 << 24) - -/* - * These masks reflect the current use of the affinity levels. - * The affinity level can be up to 16 bits according to ARM ARM - */ - -#define MPIDR_LEVEL0_MASK 0x3 -#define MPIDR_LEVEL0_SHIFT 0 - -#define MPIDR_LEVEL1_MASK 0xF -#define MPIDR_LEVEL1_SHIFT 8 - -#define MPIDR_LEVEL2_MASK 0xFF -#define MPIDR_LEVEL2_SHIFT 16 - -struct cputopo_arm cpu_topology[NR_CPUS]; - -const struct cpumask *cpu_coregroup_mask(unsigned int cpu) -{ - return &cpu_topology[cpu].core_sibling; -} - -/* - * store_cpu_topology is called at boot when only one cpu is running - * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, - * which prevents simultaneous write access to cpu_topology array - */ -void store_cpu_topology(unsigned int cpuid) -{ - struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; - unsigned int mpidr; - unsigned int cpu; - - /* If the cpu topology has been already set, just return */ - if (cpuid_topo->core_id != -1) - return; - - mpidr = read_cpuid_mpidr(); - - /* create cpu topology mapping */ - if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) { - /* - * This is a multiprocessor system - * multiprocessor format & multiprocessor mode field are set - */ - - if (mpidr & MPIDR_MT_BITMASK) { - /* core performance interdependency */ - cpuid_topo->thread_id = (mpidr >> MPIDR_LEVEL0_SHIFT) - & MPIDR_LEVEL0_MASK; - cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL1_SHIFT) - & MPIDR_LEVEL1_MASK; - cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL2_SHIFT) - & MPIDR_LEVEL2_MASK; - } else { - /* largely independent cores */ - cpuid_topo->thread_id = -1; - cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL0_SHIFT) - & MPIDR_LEVEL0_MASK; - cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL1_SHIFT) - & MPIDR_LEVEL1_MASK; - } - } else { - /* - * This is an uniprocessor system - * we are in multiprocessor format but uniprocessor system - * or in the old uniprocessor format - */ - cpuid_topo->thread_id = -1; - cpuid_topo->core_id = 0; - cpuid_topo->socket_id = -1; - } - - /* update core and thread sibling masks */ - for_each_possible_cpu(cpu) { - struct cputopo_arm *cpu_topo = &cpu_topology[cpu]; - - if (cpuid_topo->socket_id == cpu_topo->socket_id) { - cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); - if (cpu != cpuid) - cpumask_set_cpu(cpu, - &cpuid_topo->core_sibling); - - if (cpuid_topo->core_id == cpu_topo->core_id) { - cpumask_set_cpu(cpuid, - &cpu_topo->thread_sibling); - if (cpu != cpuid) - cpumask_set_cpu(cpu, - &cpuid_topo->thread_sibling); - } - } - } - smp_wmb(); - - printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n", - cpuid, cpu_topology[cpuid].thread_id, - cpu_topology[cpuid].core_id, - cpu_topology[cpuid].socket_id, mpidr); -} - -/* - * init_cpu_topology is called at boot when only one cpu is running - * which prevent simultaneous write access to cpu_topology array - */ -void init_cpu_topology(void) -{ - unsigned int cpu; - - /* init core mask */ - for_each_possible_cpu(cpu) { - struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]); - - cpu_topo->thread_id = -1; - cpu_topo->core_id = -1; - cpu_topo->socket_id = -1; - cpumask_clear(&cpu_topo->core_sibling); - cpumask_clear(&cpu_topo->thread_sibling); - } - smp_wmb(); -} diff --git a/trunk/arch/arm/kernel/traps.c b/trunk/arch/arm/kernel/traps.c index 210382555af1..bc9f9da782cb 100644 --- a/trunk/arch/arm/kernel/traps.c +++ b/trunk/arch/arm/kernel/traps.c @@ -27,7 +27,6 @@ #include #include -#include #include #include #include diff --git a/trunk/arch/arm/kernel/vmlinux.lds.S b/trunk/arch/arm/kernel/vmlinux.lds.S index 4e66f62b8d41..bf977f8514f6 100644 --- a/trunk/arch/arm/kernel/vmlinux.lds.S +++ b/trunk/arch/arm/kernel/vmlinux.lds.S @@ -23,10 +23,8 @@ #if defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK) #define ARM_EXIT_KEEP(x) x -#define ARM_EXIT_DISCARD(x) #else #define ARM_EXIT_KEEP(x) -#define ARM_EXIT_DISCARD(x) x #endif OUTPUT_ARCH(arm) @@ -41,11 +39,6 @@ jiffies = jiffies_64 + 4; SECTIONS { /* - * XXX: The linker does not define how output sections are - * assigned to input sections when there are multiple statements - * matching the same input section name. There is no documented - * order of matching. - * * unwind exit sections must be discarded before the rest of the * unwind sections get included. */ @@ -54,9 +47,6 @@ SECTIONS *(.ARM.extab.exit.text) ARM_CPU_DISCARD(*(.ARM.exidx.cpuexit.text)) ARM_CPU_DISCARD(*(.ARM.extab.cpuexit.text)) - ARM_EXIT_DISCARD(EXIT_TEXT) - ARM_EXIT_DISCARD(EXIT_DATA) - EXIT_CALL #ifndef CONFIG_HOTPLUG *(.ARM.exidx.devexit.text) *(.ARM.extab.devexit.text) @@ -68,8 +58,6 @@ SECTIONS #ifndef CONFIG_SMP_ON_UP *(.alt.smp.init) #endif - *(.discard) - *(.discard.*) } #ifdef CONFIG_XIP_KERNEL @@ -291,6 +279,9 @@ SECTIONS STABS_DEBUG .comment 0 : { *(.comment) } + + /* Default discards */ + DISCARDS } /* diff --git a/trunk/arch/arm/lib/uaccess_with_memcpy.c b/trunk/arch/arm/lib/uaccess_with_memcpy.c index 025f742dd4df..8b9b13649f81 100644 --- a/trunk/arch/arm/lib/uaccess_with_memcpy.c +++ b/trunk/arch/arm/lib/uaccess_with_memcpy.c @@ -17,7 +17,6 @@ #include #include /* for in_atomic() */ #include -#include #include #include diff --git a/trunk/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/trunk/arch/arm/mach-cns3xxx/include/mach/entry-macro.S index d87bfc397d39..6bd83ed90afe 100644 --- a/trunk/arch/arm/mach-cns3xxx/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-cns3xxx/include/mach/entry-macro.S @@ -8,6 +8,7 @@ * published by the Free Software Foundation. */ +#include #include .macro disable_fiq diff --git a/trunk/arch/arm/mach-cns3xxx/include/mach/system.h b/trunk/arch/arm/mach-cns3xxx/include/mach/system.h index 4f16c9b79f78..58bb03ae3cf4 100644 --- a/trunk/arch/arm/mach-cns3xxx/include/mach/system.h +++ b/trunk/arch/arm/mach-cns3xxx/include/mach/system.h @@ -13,6 +13,7 @@ #include #include +#include static inline void arch_idle(void) { diff --git a/trunk/arch/arm/mach-cns3xxx/include/mach/uncompress.h b/trunk/arch/arm/mach-cns3xxx/include/mach/uncompress.h index a91b6058ab4f..de8ead9b91f7 100644 --- a/trunk/arch/arm/mach-cns3xxx/include/mach/uncompress.h +++ b/trunk/arch/arm/mach-cns3xxx/include/mach/uncompress.h @@ -8,6 +8,7 @@ */ #include +#include #include #define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00)) diff --git a/trunk/arch/arm/mach-cns3xxx/pcie.c b/trunk/arch/arm/mach-cns3xxx/pcie.c index 0f8fca48a5ed..06fd25d70aec 100644 --- a/trunk/arch/arm/mach-cns3xxx/pcie.c +++ b/trunk/arch/arm/mach-cns3xxx/pcie.c @@ -49,7 +49,7 @@ static struct cns3xxx_pcie *sysdata_to_cnspci(void *sysdata) return &cns3xxx_pcie[root->domain]; } -static struct cns3xxx_pcie *pdev_to_cnspci(const struct pci_dev *dev) +static struct cns3xxx_pcie *pdev_to_cnspci(struct pci_dev *dev) { return sysdata_to_cnspci(dev->sysdata); } diff --git a/trunk/arch/arm/mach-davinci/board-da850-evm.c b/trunk/arch/arm/mach-davinci/board-da850-evm.c index 008d51407cd7..bd5394537c88 100644 --- a/trunk/arch/arm/mach-davinci/board-da850-evm.c +++ b/trunk/arch/arm/mach-davinci/board-da850-evm.c @@ -115,32 +115,6 @@ static struct spi_board_info da850evm_spi_info[] = { }, }; -#ifdef CONFIG_MTD -static void da850_evm_m25p80_notify_add(struct mtd_info *mtd) -{ - char *mac_addr = davinci_soc_info.emac_pdata->mac_addr; - size_t retlen; - - if (!strcmp(mtd->name, "MAC-Address")) { - mtd->read(mtd, 0, ETH_ALEN, &retlen, mac_addr); - if (retlen == ETH_ALEN) - pr_info("Read MAC addr from SPI Flash: %pM\n", - mac_addr); - } -} - -static struct mtd_notifier da850evm_spi_notifier = { - .add = da850_evm_m25p80_notify_add, -}; - -static void da850_evm_setup_mac_addr(void) -{ - register_mtd_user(&da850evm_spi_notifier); -} -#else -static void da850_evm_setup_mac_addr(void) { } -#endif - static struct mtd_partition da850_evm_norflash_partition[] = { { .name = "bootloaders + env", @@ -1270,8 +1244,6 @@ static __init void da850_evm_init(void) if (ret) pr_warning("da850_evm_init: sata registration failed: %d\n", ret); - - da850_evm_setup_mac_addr(); } #ifdef CONFIG_SERIAL_8250_CONSOLE diff --git a/trunk/arch/arm/mach-davinci/include/mach/psc.h b/trunk/arch/arm/mach-davinci/include/mach/psc.h index fa59c097223d..47fd0bc3d3e7 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/psc.h +++ b/trunk/arch/arm/mach-davinci/include/mach/psc.h @@ -243,7 +243,7 @@ #define PSC_STATE_DISABLE 2 #define PSC_STATE_ENABLE 3 -#define MDSTAT_STATE_MASK 0x3f +#define MDSTAT_STATE_MASK 0x1f #define MDCTL_FORCE BIT(31) #ifndef __ASSEMBLER__ diff --git a/trunk/arch/arm/mach-davinci/sleep.S b/trunk/arch/arm/mach-davinci/sleep.S index 5f1e045a3ad1..fb5e72b532b0 100644 --- a/trunk/arch/arm/mach-davinci/sleep.S +++ b/trunk/arch/arm/mach-davinci/sleep.S @@ -217,11 +217,7 @@ ddr2clk_stop_done: ENDPROC(davinci_ddr_psc_config) CACHE_FLUSH: -#ifdef CONFIG_CPU_V6 - .word v6_flush_kern_cache_all -#else - .word arm926_flush_kern_cache_all -#endif + .word arm926_flush_kern_cache_all ENTRY(davinci_cpu_suspend_sz) .word . - davinci_cpu_suspend diff --git a/trunk/arch/arm/mach-dove/common.c b/trunk/arch/arm/mach-dove/common.c index a9e0dae86a26..83dce859886d 100644 --- a/trunk/arch/arm/mach-dove/common.c +++ b/trunk/arch/arm/mach-dove/common.c @@ -158,7 +158,7 @@ void __init dove_spi0_init(void) void __init dove_spi1_init(void) { - orion_spi_1_init(DOVE_SPI1_PHYS_BASE, get_tclk()); + orion_spi_init(DOVE_SPI1_PHYS_BASE, get_tclk()); } /***************************************************************************** diff --git a/trunk/arch/arm/mach-ebsa110/include/mach/io.h b/trunk/arch/arm/mach-ebsa110/include/mach/io.h index 44679db672fb..f68daa632af0 100644 --- a/trunk/arch/arm/mach-ebsa110/include/mach/io.h +++ b/trunk/arch/arm/mach-ebsa110/include/mach/io.h @@ -13,6 +13,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#define IO_SPACE_LIMIT 0xffff + u8 __inb8(unsigned int port); void __outb8(u8 val, unsigned int port); diff --git a/trunk/arch/arm/mach-exynos4/Kconfig b/trunk/arch/arm/mach-exynos4/Kconfig index fc1f92dfbea8..0c77ab99fa16 100644 --- a/trunk/arch/arm/mach-exynos4/Kconfig +++ b/trunk/arch/arm/mach-exynos4/Kconfig @@ -12,7 +12,6 @@ if ARCH_EXYNOS4 config CPU_EXYNOS4210 bool select S3C_PL330_DMA - select ARM_CPU_SUSPEND if PM help Enable EXYNOS4210 CPU support diff --git a/trunk/arch/arm/mach-exynos4/clock.c b/trunk/arch/arm/mach-exynos4/clock.c index 86964d2e9e1b..1561b036a9bf 100644 --- a/trunk/arch/arm/mach-exynos4/clock.c +++ b/trunk/arch/arm/mach-exynos4/clock.c @@ -899,7 +899,8 @@ static struct clksrc_clk clksrcs[] = { .reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 28, .size = 4 }, }, { .clk = { - .name = "sclk_cam0", + .name = "sclk_cam", + .devname = "exynos4-fimc.0", .enable = exynos4_clksrc_mask_cam_ctrl, .ctrlbit = (1 << 16), }, @@ -908,7 +909,8 @@ static struct clksrc_clk clksrcs[] = { .reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 16, .size = 4 }, }, { .clk = { - .name = "sclk_cam1", + .name = "sclk_cam", + .devname = "exynos4-fimc.1", .enable = exynos4_clksrc_mask_cam_ctrl, .ctrlbit = (1 << 20), }, @@ -1158,7 +1160,7 @@ void __init_or_cpufreq exynos4_setup_clocks(void) vpllsrc = clk_get_rate(&clk_vpllsrc.clk); vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0), - __raw_readl(S5P_VPLL_CON1), pll_4650c); + __raw_readl(S5P_VPLL_CON1), pll_4650); clk_fout_apll.ops = &exynos4_fout_apll_ops; clk_fout_mpll.rate = mpll; diff --git a/trunk/arch/arm/mach-exynos4/mct.c b/trunk/arch/arm/mach-exynos4/mct.c index ddd86864fb83..1ae059b7ad7b 100644 --- a/trunk/arch/arm/mach-exynos4/mct.c +++ b/trunk/arch/arm/mach-exynos4/mct.c @@ -132,18 +132,12 @@ static cycle_t exynos4_frc_read(struct clocksource *cs) return ((cycle_t)hi << 32) | lo; } -static void exynos4_frc_resume(struct clocksource *cs) -{ - exynos4_mct_frc_start(0, 0); -} - struct clocksource mct_frc = { .name = "mct-frc", .rating = 400, .read = exynos4_frc_read, .mask = CLOCKSOURCE_MASK(64), .flags = CLOCK_SOURCE_IS_CONTINUOUS, - .resume = exynos4_frc_resume, }; static void __init exynos4_clocksource_init(void) @@ -395,11 +389,9 @@ static void exynos4_mct_tick_init(struct clock_event_device *evt) } /* Setup the local clock events for a CPU */ -int __cpuinit local_timer_setup(struct clock_event_device *evt) +void __cpuinit local_timer_setup(struct clock_event_device *evt) { exynos4_mct_tick_init(evt); - - return 0; } int local_timer_ack(void) diff --git a/trunk/arch/arm/mach-exynos4/platsmp.c b/trunk/arch/arm/mach-exynos4/platsmp.c index 0c90896ad9a0..7c2282c6ba81 100644 --- a/trunk/arch/arm/mach-exynos4/platsmp.c +++ b/trunk/arch/arm/mach-exynos4/platsmp.c @@ -106,8 +106,6 @@ void __cpuinit platform_secondary_init(unsigned int cpu) */ spin_lock(&boot_lock); spin_unlock(&boot_lock); - - set_cpu_online(cpu, true); } int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) @@ -193,10 +191,12 @@ void __init smp_init_cpus(void) ncores = scu_base ? scu_get_core_count(scu_base) : 1; /* sanity check */ - if (ncores > nr_cpu_ids) { - pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", - ncores, nr_cpu_ids); - ncores = nr_cpu_ids; + if (ncores > NR_CPUS) { + printk(KERN_WARNING + "EXYNOS4: no. of cores (%d) greater than configured " + "maximum of %d - clipping\n", + ncores, NR_CPUS); + ncores = NR_CPUS; } for (i = 0; i < ncores; i++) diff --git a/trunk/arch/arm/mach-exynos4/setup-keypad.c b/trunk/arch/arm/mach-exynos4/setup-keypad.c index 7862bfb5933d..1ee0ebff111f 100644 --- a/trunk/arch/arm/mach-exynos4/setup-keypad.c +++ b/trunk/arch/arm/mach-exynos4/setup-keypad.c @@ -19,16 +19,15 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) if (rows > 8) { /* Set all the necessary GPX2 pins: KP_ROW[0~7] */ - s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3), - S3C_GPIO_PULL_UP); + s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3)); /* Set all the necessary GPX3 pins: KP_ROW[8~] */ - s3c_gpio_cfgall_range(EXYNOS4_GPX3(0), (rows - 8), - S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); + s3c_gpio_cfgrange_nopull(EXYNOS4_GPX3(0), (rows - 8), + S3C_GPIO_SFN(3)); } else { /* Set all the necessary GPX2 pins: KP_ROW[x] */ - s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), rows, S3C_GPIO_SFN(3), - S3C_GPIO_PULL_UP); + s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), rows, + S3C_GPIO_SFN(3)); } /* Set all the necessary GPX1 pins to special-function 3: KP_COL[x] */ diff --git a/trunk/arch/arm/mach-footbridge/include/mach/io.h b/trunk/arch/arm/mach-footbridge/include/mach/io.h index 15a70396c27d..32e4cc397c28 100644 --- a/trunk/arch/arm/mach-footbridge/include/mach/io.h +++ b/trunk/arch/arm/mach-footbridge/include/mach/io.h @@ -23,6 +23,8 @@ #define PCIO_SIZE 0x00100000 #define PCIO_BASE MMU_IO(0xff000000, 0x7c000000) +#define IO_SPACE_LIMIT 0xffff + /* * Translation of various region addresses to virtual addresses */ diff --git a/trunk/arch/arm/mach-integrator/include/mach/io.h b/trunk/arch/arm/mach-integrator/include/mach/io.h index 37beed3fa3ed..f21bb5493dd9 100644 --- a/trunk/arch/arm/mach-integrator/include/mach/io.h +++ b/trunk/arch/arm/mach-integrator/include/mach/io.h @@ -20,6 +20,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#define IO_SPACE_LIMIT 0xffff + /* * WARNING: this has to mirror definitions in platform.h */ diff --git a/trunk/arch/arm/mach-integrator/integrator_ap.c b/trunk/arch/arm/mach-integrator/integrator_ap.c index 8cdc730dcb3a..fcf0ae95651f 100644 --- a/trunk/arch/arm/mach-integrator/integrator_ap.c +++ b/trunk/arch/arm/mach-integrator/integrator_ap.c @@ -32,7 +32,6 @@ #include #include #include -#include