From 761493a2f431477f56199cae3726672c30fe23c7 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Sun, 30 Oct 2011 23:04:31 +1000 Subject: [PATCH] --- yaml --- r: 282606 b: refs/heads/master c: 6805979fa9090b2c69c645cf19bba9a2849f336b h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/nouveau/nv50_pm.c | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index be3e58205f44..54b8d7b768a0 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 06784090ecb3f925616fc797164a74b03d5c0968 +refs/heads/master: 6805979fa9090b2c69c645cf19bba9a2849f336b diff --git a/trunk/drivers/gpu/drm/nouveau/nv50_pm.c b/trunk/drivers/gpu/drm/nouveau/nv50_pm.c index 53b6c6c75744..ab8cfad5a9b0 100644 --- a/trunk/drivers/gpu/drm/nouveau/nv50_pm.c +++ b/trunk/drivers/gpu/drm/nouveau/nv50_pm.c @@ -562,8 +562,11 @@ nv50_pm_clocks_set(struct drm_device *dev, void *data) } nv_mask(dev, 0x00c040, 0x0c000c00, info->amast); - /* core/shader: switch core to dom6, shader to hclk */ - if (dev_priv->chipset == 0x50) + /* core/shader: make sure sclk/nvclk are disconnected from their + * plls (nvclk to dom6, sclk to hclk), modify the plls, and + * reconnect sclk/nvclk to their new clock source + */ + if (dev_priv->chipset < 0x92) nv_mask(dev, 0x00c040, 0x001000b0, 0x00100080); /* grrr! */ else nv_mask(dev, 0x00c040, 0x000000b3, 0x00000081);