From 788cb0f41775d838af255f8bf1156e5f8c3a96e1 Mon Sep 17 00:00:00 2001
From: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date: Fri, 13 Apr 2012 16:31:40 -0300
Subject: [PATCH] --- yaml --- r: 307352 b: refs/heads/master c:
 0aa534df05b9f44795e2cac7383d5c68fdd11440 h: refs/heads/master v: v3

---
 [refs]                                 | 2 +-
 trunk/drivers/gpu/drm/i915/intel_drv.h | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/[refs] b/[refs]
index a7b059868540..b3693ec6db03 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: e04c735029bc133466b89265a0745a226d0eac23
+refs/heads/master: 0aa534df05b9f44795e2cac7383d5c68fdd11440
diff --git a/trunk/drivers/gpu/drm/i915/intel_drv.h b/trunk/drivers/gpu/drm/i915/intel_drv.h
index 7c323c5843d2..3205a774ec4b 100644
--- a/trunk/drivers/gpu/drm/i915/intel_drv.h
+++ b/trunk/drivers/gpu/drm/i915/intel_drv.h
@@ -267,8 +267,8 @@ struct dip_infoframe {
 			uint8_t ITC_EC_Q_SC;
 			/* PB4 - VIC 6:0 */
 			uint8_t VIC;
-			/* PB5 - PR 3:0 */
-			uint8_t PR;
+			/* PB5 - YQ 7:6, CN 5:4, PR 3:0 */
+			uint8_t YQ_CN_PR;
 			/* PB6 to PB13 */
 			uint16_t top_bar_end;
 			uint16_t bottom_bar_start;