From 79ae59c0741fa0ee6544120ab05f233713e1c601 Mon Sep 17 00:00:00 2001
From: Matt Carlson <mcarlson@broadcom.com>
Date: Wed, 25 Feb 2009 14:21:20 +0000
Subject: [PATCH] --- yaml --- r: 132144 b: refs/heads/master c:
 9f8ac0b7b063be77f0de7a27fe5e6a0aa2cce58d h: refs/heads/master v: v3

---
 [refs]                  | 2 +-
 trunk/drivers/net/tg3.c | 3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/[refs] b/[refs]
index 3937eb2b5ec4..820461743ac2 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: fb13d9f9e450bceafd88ac8a98f7a98e8096a5fe
+refs/heads/master: 9f8ac0b7b063be77f0de7a27fe5e6a0aa2cce58d
diff --git a/trunk/drivers/net/tg3.c b/trunk/drivers/net/tg3.c
index b080f9493d83..dabdf59f8016 100644
--- a/trunk/drivers/net/tg3.c
+++ b/trunk/drivers/net/tg3.c
@@ -1473,7 +1473,8 @@ static void tg3_phy_toggle_apd(struct tg3 *tp, bool enable)
 {
 	u32 reg;
 
-	if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
+	if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ||
+	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
 		return;
 
 	reg = MII_TG3_MISC_SHDW_WREN |