From 7a64e04cbecb4e9a97cb9b86721d85af8a13d4b6 Mon Sep 17 00:00:00 2001
From: Russell King <rmk+kernel@arm.linux.org.uk>
Date: Wed, 15 Dec 2010 21:49:42 +0000
Subject: [PATCH] --- yaml --- r: 225839 b: refs/heads/master c:
 e3f4c0ab916334e861fc49eeb2673a8c13e978e7 h: refs/heads/master i:   225837:
 3192c4d2cc1126610263e1f5eb512f9ec6abafc4   225835:
 d8d339ca2ab3d6751fe2e891d92ee3d2f47ccfa1   225831:
 a359121271967f2ee6c107b9c83c8f72a4956972   225823:
 c6a06bee3d17eed3a657aeb78bf2f0f5b0dfb286 v: v3

---
 [refs]                            |  2 +-
 trunk/arch/arm/Kconfig            |  1 +
 trunk/arch/arm/mach-tegra/timer.c | 23 +++++++++++++++++++++--
 3 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/[refs] b/[refs]
index 5e34dbea1357..75d162ea3a69 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 5094b92f1c7d0f21c5d4411ba7415bac0684210f
+refs/heads/master: e3f4c0ab916334e861fc49eeb2673a8c13e978e7
diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig
index 0e1a9667a869..ec7b0274d46a 100644
--- a/trunk/arch/arm/Kconfig
+++ b/trunk/arch/arm/Kconfig
@@ -570,6 +570,7 @@ config ARCH_TEGRA
 	select GENERIC_CLOCKEVENTS
 	select GENERIC_GPIO
 	select HAVE_CLK
+	select HAVE_SCHED_CLOCK
 	select COMMON_CLKDEV
 	select ARCH_HAS_BARRIERS if CACHE_L2X0
 	select ARCH_HAS_CPUFREQ
diff --git a/trunk/arch/arm/mach-tegra/timer.c b/trunk/arch/arm/mach-tegra/timer.c
index c52bd84652e5..7b8ad1f98f44 100644
--- a/trunk/arch/arm/mach-tegra/timer.c
+++ b/trunk/arch/arm/mach-tegra/timer.c
@@ -26,10 +26,10 @@
 #include <linux/clocksource.h>
 #include <linux/clk.h>
 #include <linux/io.h>
-#include <linux/cnt32_to_63.h>
 
 #include <asm/mach/time.h>
 #include <asm/localtimer.h>
+#include <asm/sched_clock.h>
 
 #include <mach/iomap.h>
 #include <mach/irqs.h>
@@ -111,9 +111,25 @@ static struct clocksource tegra_clocksource = {
 	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
+static DEFINE_CLOCK_DATA(cd);
+
+/*
+ * Constants generated by clocks_calc_mult_shift(m, s, 1MHz, NSEC_PER_SEC, 60).
+ * This gives a resolution of about 1us and a wrap period of about 1h11min.
+ */
+#define SC_MULT		4194304000u
+#define SC_SHIFT	22
+
 unsigned long long notrace sched_clock(void)
 {
-	return cnt32_to_63(timer_readl(TIMERUS_CNTR_1US)) * 1000;
+	u32 cyc = timer_readl(TIMERUS_CNTR_1US);
+	return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
+}
+
+static void notrace tegra_update_sched_clock(void)
+{
+	u32 cyc = timer_readl(TIMERUS_CNTR_1US);
+	update_sched_clock(&cd, cyc, (u32)~0);
 }
 
 static irqreturn_t tegra_timer_interrupt(int irq, void *dev_id)
@@ -158,6 +174,9 @@ static void __init tegra_init_timer(void)
 		WARN(1, "Unknown clock rate");
 	}
 
+	init_fixed_sched_clock(&cd, tegra_update_sched_clock, 32,
+			       1000000, SC_MULT, SC_SHIFT);
+
 	if (clocksource_register_hz(&tegra_clocksource, 1000000)) {
 		printk(KERN_ERR "Failed to register clocksource\n");
 		BUG();