From 7aeee7b8eaf9a0f57d116fdb20018432d2a43ab1 Mon Sep 17 00:00:00 2001 From: Zhao Yakui Date: Wed, 14 Oct 2009 09:11:25 +0800 Subject: [PATCH] --- yaml --- r: 168461 b: refs/heads/master c: f059d2ad69b056aeabad4460f706a3df2f77ce50 h: refs/heads/master i: 168459: ce08c7a6d296bcd81235c05d67c5e30ab3f4245a v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/drm_edid.c | 15 +++++++++++++++ 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 147216225dba..db37558653f5 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a77f171843d466d4af0d527bcb2d314fafa8afd7 +refs/heads/master: f059d2ad69b056aeabad4460f706a3df2f77ce50 diff --git a/trunk/drivers/gpu/drm/drm_edid.c b/trunk/drivers/gpu/drm/drm_edid.c index 3c0d2b3aed76..cea665d86dd3 100644 --- a/trunk/drivers/gpu/drm/drm_edid.c +++ b/trunk/drivers/gpu/drm/drm_edid.c @@ -626,6 +626,12 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, return NULL; } + /* it is incorrect if hsync/vsync width is zero */ + if (!hsync_pulse_width || !vsync_pulse_width) { + DRM_DEBUG_KMS("Incorrect Detailed timing. " + "Wrong Hsync/Vsync pulse width\n"); + return NULL; + } mode = drm_mode_create(dev); if (!mode) return NULL; @@ -647,6 +653,15 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, mode->vsync_end = mode->vsync_start + vsync_pulse_width; mode->vtotal = mode->vdisplay + vblank; + /* perform the basic check for the detailed timing */ + if (mode->hsync_end > mode->htotal || + mode->vsync_end > mode->vtotal) { + drm_mode_destroy(dev, mode); + DRM_DEBUG_KMS("Incorrect detailed timing. " + "Sync is beyond the blank.\n"); + return NULL; + } + drm_mode_set_name(mode); if (pt->misc & DRM_EDID_PT_INTERLACED)