diff --git a/[refs] b/[refs] index 7e75a70b0fcf..39beae9b7e4f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: dcb0789bb344b76fdeb32876f1e498a5cd19ecc1 +refs/heads/master: fef5ba3ae9760fdc2688b7160fa056e7ef2700bb diff --git a/trunk/drivers/staging/et131x/et1310_address_map.h b/trunk/drivers/staging/et131x/et1310_address_map.h index e57109345d16..5f6a7b549677 100644 --- a/trunk/drivers/staging/et131x/et1310_address_map.h +++ b/trunk/drivers/staging/et131x/et1310_address_map.h @@ -892,25 +892,13 @@ typedef union _RXMAC_UNI_PF_ADDR3_t { /* * structure for Error reg in rxmac address map. * located at address 0x409C + * + * 31-4: unused + * 3: mif + * 2: async + * 1: pkt_filter + * 0: mcif */ -typedef union _RXMAC_ERROR_REG_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserve:28; /* bits 4-31 */ - u32 mif:1; /* bit 3 */ - u32 async:1; /* bit 2 */ - u32 pkt_filter:1; /* bit 1 */ - u32 mcif:1; /* bit 0 */ -#else - u32 mcif:1; /* bit 0 */ - u32 pkt_filter:1; /* bit 1 */ - u32 async:1; /* bit 2 */ - u32 mif:1; /* bit 3 */ - u32 reserve:28; /* bits 4-31 */ -#endif - } bits; -} RXMAC_ERROR_REG_t, *PRXMAC_ERROR_REG_t; /* * Rx MAC Module of JAGCore Address Mapping @@ -956,7 +944,7 @@ typedef struct _RXMAC_t { /* Location: */ u32 space_avail; /* 0x4094 */ u32 mif_ctrl; /* 0x4098 */ - RXMAC_ERROR_REG_t err_reg; /* 0x409C */ + u32 err_reg; /* 0x409C */ } RXMAC_t, *PRXMAC_t; /* END OF RXMAC REGISTER ADDRESS MAP */ diff --git a/trunk/drivers/staging/et131x/et131x_isr.c b/trunk/drivers/staging/et131x/et131x_isr.c index 5ff8665e687b..87c8de636711 100644 --- a/trunk/drivers/staging/et131x/et131x_isr.c +++ b/trunk/drivers/staging/et131x/et131x_isr.c @@ -441,7 +441,7 @@ void et131x_isr_handler(struct work_struct *work) dev_warn(&etdev->pdev->dev, "RXMAC interrupt, error 0x%08x. Requesting reset\n", - readl(&iomem->rxmac.err_reg.value)); + readl(&iomem->rxmac.err_reg)); dev_warn(&etdev->pdev->dev, "Enable 0x%08x, Diag 0x%08x\n",