diff --git a/[refs] b/[refs]
index 802816a7650f..04435d3e57d9 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: ca57802e521de54341efc8a56f70571f79ffac72
+refs/heads/master: b21b6e7aab9d0ee97f6d3cf3654fda4348b3b7ea
diff --git a/trunk/drivers/gpu/drm/radeon/evergreen.c b/trunk/drivers/gpu/drm/radeon/evergreen.c
index fd5e0025b656..f77e33262274 100644
--- a/trunk/drivers/gpu/drm/radeon/evergreen.c
+++ b/trunk/drivers/gpu/drm/radeon/evergreen.c
@@ -2460,11 +2460,6 @@ static void evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
 
 	evergreen_print_gpu_status_regs(rdev);
 
-	evergreen_mc_stop(rdev, &save);
-	if (evergreen_mc_wait_for_idle(rdev)) {
-		dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
-	}
-
 	/* Disable CP parsing/prefetching */
 	WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);
 
@@ -2475,6 +2470,13 @@ static void evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
 		WREG32(DMA_RB_CNTL, tmp);
 	}
 
+	udelay(50);
+
+	evergreen_mc_stop(rdev, &save);
+	if (evergreen_mc_wait_for_idle(rdev)) {
+		dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
+	}
+
 	if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE)) {
 		grbm_soft_reset |= SOFT_RESET_DB |
 			SOFT_RESET_CB |