From 7c0e19848e6b7e7e108f4edc4bc7aa459fec0523 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 19 Oct 2010 17:06:49 +0200 Subject: [PATCH] --- yaml --- r: 225976 b: refs/heads/master c: 59bdd133561a432c4655146e283caf85fa64c2fb h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-pxa/balloon3.c | 8 ++++++-- trunk/arch/arm/mach-pxa/include/mach/balloon3.h | 2 +- 3 files changed, 8 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 88a4930d9b56..ff1a664514da 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 1b9169d8a0fe2b41fbbb8d152c8108190865f3cf +refs/heads/master: 59bdd133561a432c4655146e283caf85fa64c2fb diff --git a/trunk/arch/arm/mach-pxa/balloon3.c b/trunk/arch/arm/mach-pxa/balloon3.c index d4649c0e23f6..ccb2d0cebcc3 100644 --- a/trunk/arch/arm/mach-pxa/balloon3.c +++ b/trunk/arch/arm/mach-pxa/balloon3.c @@ -612,9 +612,13 @@ static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip) BALLOON3_NAND_CONTROL_REG); } +static int balloon3_nand_dev_ready(struct mtd_info *mtd) +{ + return __raw_readl(BALLOON3_NAND_STAT_REG) & BALLOON3_NAND_STAT_RNB; +} + static int balloon3_nand_probe(struct platform_device *pdev) { - void __iomem *temp_map; uint16_t ver; int ret; @@ -684,7 +688,7 @@ struct platform_nand_data balloon3_nand_pdata = { }, .ctrl = { .hwcontrol = 0, - .dev_ready = 0, + .dev_ready = balloon3_nand_dev_ready, .select_chip = balloon3_nand_select_chip, .cmd_ctrl = balloon3_nand_cmd_ctl, .probe = balloon3_nand_probe, diff --git a/trunk/arch/arm/mach-pxa/include/mach/balloon3.h b/trunk/arch/arm/mach-pxa/include/mach/balloon3.h index f6c81ea51487..7074e76146c9 100644 --- a/trunk/arch/arm/mach-pxa/include/mach/balloon3.h +++ b/trunk/arch/arm/mach-pxa/include/mach/balloon3.h @@ -37,7 +37,7 @@ enum balloon3_features { #define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000) #define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000) #define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010) -#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00010) +#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00014) #define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014) /* fpga/cpld interrupt control register */