From 7d8c67461492479687f859aa73733af8bc752abd Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 22 Feb 2010 05:18:10 +0000 Subject: [PATCH] --- yaml --- r: 181227 b: refs/heads/master c: 16afc9fb0298a66da25ee015eb3c8a8f55e3744a h: refs/heads/master i: 181225: f68e0030f8fa6f0f249fc8a920d234eed4dcb363 181223: f14cb84b6fef4ddcb705139402b2d6686d8d4744 v: v3 --- [refs] | 2 +- trunk/arch/sh/boards/mach-ecovec24/setup.c | 5 +++++ trunk/arch/sh/boards/mach-se/7724/setup.c | 15 ++++++++++----- 3 files changed, 16 insertions(+), 6 deletions(-) diff --git a/[refs] b/[refs] index b86522faecee..6df96aee21b8 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 6f26d19fce5907cdd0fd953ac1a1d0b1e6e5982c +refs/heads/master: 16afc9fb0298a66da25ee015eb3c8a8f55e3744a diff --git a/trunk/arch/sh/boards/mach-ecovec24/setup.c b/trunk/arch/sh/boards/mach-ecovec24/setup.c index a17dbb3ac73f..6f2e8a78b461 100644 --- a/trunk/arch/sh/boards/mach-ecovec24/setup.c +++ b/trunk/arch/sh/boards/mach-ecovec24/setup.c @@ -1105,6 +1105,11 @@ static int __init arch_setup(void) gpio_request(GPIO_FN_FSIOBLRCK, NULL); gpio_request(GPIO_FN_CLKAUDIOBO, NULL); + /* set SPU2 clock to 83.4 MHz */ + clk = clk_get(NULL, "spu_clk"); + clk_set_rate(clk, clk_round_rate(clk, 83333333)); + clk_put(clk); + /* change parent of FSI B */ clk = clk_get(NULL, "fsib_clk"); clk_register(&fsimckb_clk); diff --git a/trunk/arch/sh/boards/mach-se/7724/setup.c b/trunk/arch/sh/boards/mach-se/7724/setup.c index 50e4d1599576..1f6cf8604943 100644 --- a/trunk/arch/sh/boards/mach-se/7724/setup.c +++ b/trunk/arch/sh/boards/mach-se/7724/setup.c @@ -586,7 +586,7 @@ arch_initcall(arch_setup); static int __init devices_setup(void) { u16 sw = __raw_readw(SW4140); /* select camera, monitor */ - struct clk *fsia_clk; + struct clk *clk; /* register board specific self-refresh code */ sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF, @@ -755,13 +755,18 @@ static int __init devices_setup(void) gpio_request(GPIO_FN_CLKAUDIOBO, NULL); gpio_request(GPIO_FN_FSIIASD, NULL); + /* set SPU2 clock to 83.4 MHz */ + clk = clk_get(NULL, "spu_clk"); + clk_set_rate(clk, clk_round_rate(clk, 83333333)); + clk_put(clk); + /* change parent of FSI A */ - fsia_clk = clk_get(NULL, "fsia_clk"); + clk = clk_get(NULL, "fsia_clk"); clk_register(&fsimcka_clk); - clk_set_parent(fsia_clk, &fsimcka_clk); - clk_set_rate(fsia_clk, 11000); + clk_set_parent(clk, &fsimcka_clk); + clk_set_rate(clk, 11000); clk_set_rate(&fsimcka_clk, 11000); - clk_put(fsia_clk); + clk_put(clk); /* SDHI0 connected to cn7 */ gpio_request(GPIO_FN_SDHI0CD, NULL);