From 7e771ff6c4740a4c251e54c617e1a8947f84e497 Mon Sep 17 00:00:00 2001 From: Robin Getz Date: Tue, 5 May 2009 17:14:39 +0000 Subject: [PATCH] --- yaml --- r: 148563 b: refs/heads/master c: a17c7f6f5b3b3f91ff7121c33bea8748c415ab15 h: refs/heads/master i: 148561: 199b9dab159ed76f571da7d3e606af9d57b9e6b0 148559: b0ee20e80db09d1a387787f380199c090c9b9af0 v: v3 --- [refs] | 2 +- trunk/arch/blackfin/kernel/cplb-mpu/cplbinit.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index c0230751b6c8..51c826da6aeb 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 8af7ffa0d5460586e0f06b2f045a6a2631224b61 +refs/heads/master: a17c7f6f5b3b3f91ff7121c33bea8748c415ab15 diff --git a/trunk/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/trunk/arch/blackfin/kernel/cplb-mpu/cplbinit.c index 3e329a6ce041..c006a44527bf 100644 --- a/trunk/arch/blackfin/kernel/cplb-mpu/cplbinit.c +++ b/trunk/arch/blackfin/kernel/cplb-mpu/cplbinit.c @@ -64,7 +64,7 @@ void __init generate_cplb_tables_cpu(unsigned int cpu) dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; icplb_tbl[cpu][i_i].addr = 0; - icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_1KB; + icplb_tbl[cpu][i_i++].data = CPLB_VALID | i_cache | CPLB_USER_RD | PAGE_SIZE_1KB; /* Cover kernel memory with 4M pages. */ addr = 0;