From 7f466853f82ccdb7363bae2d3b04dc82a18d4623 Mon Sep 17 00:00:00 2001 From: "Downing, Thomas" Date: Wed, 27 Jul 2005 11:44:09 -0700 Subject: [PATCH] --- yaml --- r: 5139 b: refs/heads/master c: c41b72d5bd590e6ff781d6bdfc71595f3996bacf h: refs/heads/master i: 5137: 4e54f0685b28f7634e3ce233ecadd50e221b8cc6 5135: 4c1c90118eef8564bf55498030e66c0b67df77c5 v: v3 --- [refs] | 2 +- trunk/arch/ppc/syslib/m82xx_pci.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 06aa419939a8..26cc906ff0ce 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 3a1ce8aa2d9611a779c308fbf332ae86217b0df6 +refs/heads/master: c41b72d5bd590e6ff781d6bdfc71595f3996bacf diff --git a/trunk/arch/ppc/syslib/m82xx_pci.c b/trunk/arch/ppc/syslib/m82xx_pci.c index 5e7a7edcea74..9db58c587b46 100644 --- a/trunk/arch/ppc/syslib/m82xx_pci.c +++ b/trunk/arch/ppc/syslib/m82xx_pci.c @@ -238,9 +238,9 @@ pq2ads_setup_pci(struct pci_controller *hose) * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]), * and local bus for PCI (SIUMCR [LBPC]). */ - immap->im_siu_conf.siu_82xx.sc_siumcr = (immap->im_siu_conf.sc_siumcr & - ~(SIUMCR_L2PC11 | SIUMCR_LBPC11 | SIUMCR_CS10PC11 | SIUMCR_APPC11) | - SIUMCR_BBD | SIUMCR_LBPC01 | SIUMCR_DPPC11 | SIUMCR_APPC10; + immap->im_siu_conf.siu_82xx.sc_siumcr = (immap->im_siu_conf.siu_82xx.sc_siumcr & + ~(SIUMCR_L2CPC11 | SIUMCR_LBPC11 | SIUMCR_CS10PC11 | SIUMCR_APPC11) | + SIUMCR_BBD | SIUMCR_LBPC01 | SIUMCR_DPPC11 | SIUMCR_APPC10); #endif /* Enable PCI */ immap->im_pci.pci_gcr = cpu_to_le32(PCIGCR_PCI_BUS_EN);