From 808de3d6a6a715ac7659ef532feb5f681667da0e Mon Sep 17 00:00:00 2001 From: Jim Lin Date: Tue, 18 Sep 2012 16:42:17 +0800 Subject: [PATCH] --- yaml --- r: 326120 b: refs/heads/master c: 45c2da62199bcea380273b2fba7fa16c1ff27a30 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/include/linux/usb/ehci_def.h | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index a0761611536c..f9e46dbf289a 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 8d733e26c076f47e7774c0e5baa74c9b1c01199a +refs/heads/master: 45c2da62199bcea380273b2fba7fa16c1ff27a30 diff --git a/trunk/include/linux/usb/ehci_def.h b/trunk/include/linux/usb/ehci_def.h index 9a446302b658..daec99af5d54 100644 --- a/trunk/include/linux/usb/ehci_def.h +++ b/trunk/include/linux/usb/ehci_def.h @@ -171,18 +171,18 @@ struct ehci_regs { #define USBMODE_CM_HC (3<<0) /* host controller mode */ #define USBMODE_CM_IDLE (0<<0) /* idle state */ - u32 reserved4[7]; + u32 reserved4[6]; /* Moorestown has some non-standard registers, partially due to the fact that * its EHCI controller has both TT and LPM support. HOSTPCx are extensions to * PORTSCx */ /* HOSTPC: offset 0x84 */ - u32 hostpc[0]; /* HOSTPC extension */ + u32 hostpc[1]; /* HOSTPC extension */ #define HOSTPC_PHCD (1<<22) /* Phy clock disable */ #define HOSTPC_PSPD (3<<25) /* Port speed detection */ - u32 reserved5[17]; + u32 reserved5[16]; /* USBMODE_EX: offset 0xc8 */ u32 usbmode_ex; /* USB Device mode extension */