From 809d6d9a0f865845e5dcdc42b4be5a33f7a267f9 Mon Sep 17 00:00:00 2001 From: Joerg Roedel Date: Sun, 2 Dec 2012 15:40:56 +0100 Subject: [PATCH] --- yaml --- r: 347501 b: refs/heads/master c: 310aa95078443c7b7b56c60dbc55b7a11b946edb h: refs/heads/master i: 347499: 3e744ad4f3cc1eaac0e17b3c40a8cf3b544c3225 v: v3 --- [refs] | 2 +- trunk/drivers/iommu/amd_iommu.c | 10 ---------- 2 files changed, 1 insertion(+), 11 deletions(-) diff --git a/[refs] b/[refs] index 1e19f4766685..f9a949c075c3 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 954e3dd8308501bb00cae4ed655968282dc65314 +refs/heads/master: 310aa95078443c7b7b56c60dbc55b7a11b946edb diff --git a/trunk/drivers/iommu/amd_iommu.c b/trunk/drivers/iommu/amd_iommu.c index 98d74ab564b6..c1c74e030a58 100644 --- a/trunk/drivers/iommu/amd_iommu.c +++ b/trunk/drivers/iommu/amd_iommu.c @@ -57,16 +57,6 @@ * physically contiguous memory regions it is mapping into page sizes * that we support. * - * Traditionally the IOMMU core just handed us the mappings directly, - * after making sure the size is an order of a 4KiB page and that the - * mapping has natural alignment. - * - * To retain this behavior, we currently advertise that we support - * all page sizes that are an order of 4KiB. - * - * If at some point we'd like to utilize the IOMMU core's new behavior, - * we could change this to advertise the real page sizes we support. - * * 512GB Pages are not supported due to a hardware bug */ #define AMD_IOMMU_PGSIZES ((~0xFFFUL) & ~(2ULL << 38))